spi: zynqmp_qspi: Add QSPI driver support for ZynqMP

PATCH New Siva Durga Prasad Paladugu 2 participants 3 messages May 23, 2016 – May 25, 2016

Subsystems (2)

SPI Arm/Zynq architecture

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Siva Durga Prasad Paladugu

author

2016-05-23 12:04 UTC #0 lore raw

PATCH 1/2 spi: zynqmp_qspi: Add QSPI driver support for ZynqMP

This adds QSPI driver support for ZynqMP platform
This driver supports all spi flash commands in
qspi single mode.

Signed-off-by Siva Durga Prasad Paladugu <[email protected]>

---
 drivers/spi/Kconfig       |    9 +
 drivers/spi/Makefile      |    1 +
 drivers/spi/zynqmp_qspi.c |  704 +++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 714 insertions(+), 0 deletions(-)
 create mode 100644 drivers/spi/zynqmp_qspi.c

drivers/spi/Kconfig +9 -0

index f0258f8..25a98a6 100644
@@ -155,6 +155,15 @@ config ZYNQ_QSPI
 	  Zynq QSPI IP core. This IP is used to connect the flash in
 	  4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel.
 
+config ZYNQMP_QSPI
+	bool "ZynqMP QSPI driver"
+	depends on ARCH_ZYNQMP
+	help
+	  Enable the ZynqMP Quad-SPI (QSPI) driver. This driver can be
+	  used to access the SPI NOR flash on platforms embedding this
+	  ZynqMP QSPI IP core. This IP is used to connect the flash in
+	  4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel.
+
 config OMAP3_SPI
 	bool "McSPI driver for OMAP"
 	help

drivers/spi/Makefile +1 -0

index 3eca745..b47103f 100644
@@ -51,3 +51,4 @@ obj-$(CONFIG_TI_QSPI) += ti_qspi.o
 obj-$(CONFIG_XILINX_SPI) += xilinx_spi.o
 obj-$(CONFIG_ZYNQ_SPI) += zynq_spi.o
 obj-$(CONFIG_ZYNQ_QSPI) += zynq_qspi.o
+obj-$(CONFIG_ZYNQMP_QSPI) += zynqmp_qspi.o

drivers/spi/zynqmp_qspi.c new file +704 -0

704 lines not on this page · raw message

Signature · 1 line

1.7.1

Siva Durga Prasad Paladugu

author

2016-05-23 12:04 UTC #1 lore raw

PATCH 2/2 spi: zynqmp_qspi: Add qspi driver support for ZynqMP boards

Added the qspi driver support for respective ZynqMP boards ZCU102, ZCU102 RevB and DC1 boards.

Signed-off-by Siva Durga Prasad Paladugu <[email protected]>

---
 configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig |    4 ++++
 configs/xilinx_zynqmp_zcu102_defconfig           |    4 ++++
 configs/xilinx_zynqmp_zcu102_revB_defconfig      |    4 ++++
 3 files changed, 12 insertions(+), 0 deletions(-)

configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +4 -0

index cc08b03..164b156 100644
@@ -3,6 +3,9 @@ CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm015_dc1"
 CONFIG_ARCH_ZYNQMP=y
 CONFIG_DM_I2C=y
 CONFIG_DM_GPIO=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_ZYNQMP_QSPI=y
 CONFIG_ZYNQMP_USB=y
 CONFIG_SYS_TEXT_BASE=0x8000000
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm015-dc1"

@@ -28,6 +31,7 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_SF=y
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SYS_I2C_CADENCE=y

configs/xilinx_zynqmp_zcu102_defconfig +4 -0

index 6f1cff8..64c032d 100644
@@ -2,6 +2,9 @@ CONFIG_ARM=y
 CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu102"
 CONFIG_ARCH_ZYNQMP=y
 CONFIG_DM_GPIO=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_ZYNQMP_QSPI=y
 CONFIG_ZYNQMP_USB=y
 CONFIG_SYS_TEXT_BASE=0x8000000
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102"

@@ -27,6 +30,7 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_SF=y
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM_MMC=y

configs/xilinx_zynqmp_zcu102_revB_defconfig +4 -0

index a8982a0..39e341c 100644
@@ -2,6 +2,9 @@ CONFIG_ARM=y
 CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu102"
 CONFIG_ARCH_ZYNQMP=y
 CONFIG_DM_GPIO=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_ZYNQMP_QSPI=y
 CONFIG_ZYNQMP_USB=y
 CONFIG_SYS_TEXT_BASE=0x8000000
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-revB"

@@ -27,6 +30,7 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_SF=y
 CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM_MMC=y

Signature · 1 line

1.7.1

Michal Simek

2016-05-25 14:55 UTC #2 lore raw

PATCH 2/2 spi: zynqmp_qspi: Add qspi driver support for ZynqMP boards

Quoted 10 lines · Siva Durga Prasad Paladugu

Added the qspi driver support for respective ZynqMP boards ZCU102, ZCU102 RevB and DC1 boards.
Signed-off-by Siva Durga Prasad Paladugu <[email protected]>
---
 configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig |    4 ++++
 configs/xilinx_zynqmp_zcu102_defconfig           |    4 ++++
 configs/xilinx_zynqmp_zcu102_revB_defconfig      |    4 ++++
 3 files changed, 12 insertions(+), 0 deletions(-)

On zcu102 it is not working.

ZynqMP> sf probe
SF: Timeout!
Failed to initialize SPI flash at 0:0 (error -22)

Thanks,
Michal

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