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MIPS: provide a default u-boot-spl.lds

PATCH New Daniel Schwierzeck 2 participants 9 messages May 26, 2016 – May 30, 2016 MIPS

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#0 lore raw

PATCH 1/1 MIPS: provide a default u-boot-spl.lds

Provide a default linker script for SPL binaries. Start address and size of text section and BSS section are configurable. All sections are arranged in a way that only relevant sections are kept in the code section for maximum size reduction. All other sections are kept but moved outside the code section to help with debugging.

---

 arch/mips/cpu/u-boot-spl.lds | 83 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 83 insertions(+)
 create mode 100644 arch/mips/cpu/u-boot-spl.lds
arch/mips/cpu/u-boot-spl.lds new file +83 -0
new file mode 100644
index 0000000..e18074b
@@ -0,0 +1,83 @@
+/*
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+MEMORY { .spl_mem : ORIGIN = CONFIG_SPL_TEXT_BASE, \
+		LENGTH = CONFIG_SPL_MAX_SIZE }
+MEMORY { .bss_mem : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
+		LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
+
+OUTPUT_ARCH(mips)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text : {
+		*(.text*)
+	} > .spl_mem
+
+	. = ALIGN(4);
+	.rodata : {
+		*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+	} > .spl_mem
+
+	. = ALIGN(4);
+	.data : {
+		*(SORT_BY_ALIGNMENT(.data*))
+		*(SORT_BY_ALIGNMENT(.sdata*))
+	} > .spl_mem
+
+	. = ALIGN(4);
+	__image_copy_end = .;
+
+	.bss (NOLOAD) : {
+		__bss_start = .;
+		*(.bss*)
+		*(.sbss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end = .;
+	} > .bss_mem
+
+	.rel.dyn (NOLOAD) : {
+		*(.rel.dyn)
+	}
+
+	.dynsym : {
+		*(.dynsym)
+	}
+
+	.dynbss : {
+		*(.dynbss)
+	}
+
+	.dynstr : {
+		*(.dynstr)
+	}
+
+	.dynamic : {
+		*(.dynamic)
+	}
+
+	.plt : {
+		*(.plt)
+	}
+
+	.interp : {
+		*(.interp)
+	}
+
+	.gnu : {
+		*(.gnu*)
+	}
+
+	.MIPS.stubs : {
+		*(.MIPS.stubs)
+	}
+
+	.hash : {
+		*(.hash)
+	}
+}
Signature · 1 line
2.7.4
#1 lore raw

PATCH 1/1 MIPS: provide a default u-boot-spl.lds

Quoted 8 lines · Daniel Schwierzeck

Provide a default linker script for SPL binaries. Start address and size of text section and BSS section are configurable. All sections are arranged in a way that only relevant sections are kept in the code section for maximum size reduction. All other sections are kept but moved outside the code section to help with debugging.

I'm worried this will blow when you enable DM in SPL, since DM uses special section(s) to keep the driver linked lists in. You'll probably need to add something like KEEP(*(SORT(.u_boot_list*))); somewhere in there.

Quoted 96 lines

---

 arch/mips/cpu/u-boot-spl.lds | 83 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 83 insertions(+)
 create mode 100644 arch/mips/cpu/u-boot-spl.lds
arch/mips/cpu/u-boot-spl.lds new file +83 -0
new file mode 100644
index 0000000..e18074b
@@ -0,0 +1,83 @@
+/*
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+MEMORY { .spl_mem : ORIGIN = CONFIG_SPL_TEXT_BASE, \
+		LENGTH = CONFIG_SPL_MAX_SIZE }
+MEMORY { .bss_mem : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
+		LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
+
+OUTPUT_ARCH(mips)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text : {
+		*(.text*)
+	} > .spl_mem
+
+	. = ALIGN(4);
+	.rodata : {
+		*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+	} > .spl_mem
+
+	. = ALIGN(4);
+	.data : {
+		*(SORT_BY_ALIGNMENT(.data*))
+		*(SORT_BY_ALIGNMENT(.sdata*))
+	} > .spl_mem
+
+	. = ALIGN(4);
+	__image_copy_end = .;
+
+	.bss (NOLOAD) : {
+		__bss_start = .;
+		*(.bss*)
+		*(.sbss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end = .;
+	} > .bss_mem
+
+	.rel.dyn (NOLOAD) : {
+		*(.rel.dyn)
+	}
+
+	.dynsym : {
+		*(.dynsym)
+	}
+
+	.dynbss : {
+		*(.dynbss)
+	}
+
+	.dynstr : {
+		*(.dynstr)
+	}
+
+	.dynamic : {
+		*(.dynamic)
+	}
+
+	.plt : {
+		*(.plt)
+	}
+
+	.interp : {
+		*(.interp)
+	}
+
+	.gnu : {
+		*(.gnu*)
+	}
+
+	.MIPS.stubs : {
+		*(.MIPS.stubs)
+	}
+
+	.hash : {
+		*(.hash)
+	}
+}
Signature · 2 lines
Best regards,
Marek Vasut
#2 lore raw

PATCH 1/1 MIPS: provide a default u-boot-spl.lds

Am 26.05.2016 um 14:08 schrieb Marek Vasut:

Quoted 8 lines · Daniel Schwierzeck
Quoted 7 lines

Provide a default linker script for SPL binaries. Start address and size of text section and BSS section are configurable. All sections are arranged in a way that only relevant sections are kept in the code section for maximum size reduction. All other sections are kept but moved outside the code section to help with debugging.

Quoted 7 lines
Quoted 1 line

I'm worried this will blow when you enable DM in SPL, since DM uses special section(s) to keep the driver linked lists in. You'll probably need to add something like KEEP(*(SORT(.u_boot_list*))); somewhere in there.

why should this blow? But you are right, u_boot_list is missing.

Signature · 9 lines
- Daniel

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#3 lore raw

PATCH 1/1 MIPS: provide a default u-boot-spl.lds

Quoted 13 lines · Daniel Schwierzeck

Am 26.05.2016 um 14:08 schrieb Marek Vasut:

Quoted 10 lines · Daniel Schwierzeck
Quoted 8 lines

Provide a default linker script for SPL binaries. Start address and size of text section and BSS section are configurable. All sections are arranged in a way that only relevant sections are kept in the code section for maximum size reduction. All other sections are kept but moved outside the code section to help with debugging.

Quoted 7 lines
Quoted 5 lines

I'm worried this will blow when you enable DM in SPL, since DM uses special section(s) to keep the driver linked lists in. You'll probably need to add something like KEEP(*(SORT(.u_boot_list*))); somewhere in there.

why should this blow?

Because the u-boot driver list will be discarded by linker and that will lead either to linker complaining about it or scary bugs at runtime.

But you are right, u_boot_list is missing.

Quoted 1 line

:)

Signature · 2 lines
Best regards,
Marek Vasut
#4 lore raw

PATCH v2 1/1 MIPS: provide a default u-boot-spl.lds

In reply to Daniel Schwierzeck

Provide a default linker script for SPL binaries. Start address and size of text section and BSS section are configurable. All sections are arranged in a way that only relevant sections are kept in the code section for maximum size reduction. All other sections are kept but moved outside the code section to help with debugging.

---

Changes in v2:
- add missing section .u_boot_list

 arch/mips/config.mk          |  5 ++-
 arch/mips/cpu/u-boot-spl.lds | 90 ++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 93 insertions(+), 2 deletions(-)
 create mode 100644 arch/mips/cpu/u-boot-spl.lds
arch/mips/config.mk +3 -2
index 609a998..dcd3460 100644
@@ -65,7 +65,7 @@ else
 PF_ABICALLS			:= -mabicalls
 PF_PIC				:= -fpic
 PF_PIE				:= -pie
-PF_OBJCOPY			:= -j .got -j .u_boot_list -j .rel.dyn -j .padding
+PF_OBJCOPY			:= -j .got -j .rel.dyn -j .padding
 PF_OBJCOPY			+= -j .dtb.init.rodata
 endif
 
@@ -74,4 +74,5 @@ PLATFORM_CPPFLAGS		+= -msoft-float
 PLATFORM_LDFLAGS		+= -G 0 -static -n -nostdlib
 PLATFORM_RELFLAGS		+= -ffunction-sections -fdata-sections
 LDFLAGS_FINAL			+= --gc-sections $(PF_PIE)
-OBJCOPYFLAGS			+= -j .text -j .rodata -j .data $(PF_OBJCOPY)
+OBJCOPYFLAGS			+= -j .text -j .rodata -j .data -j .u_boot_list
+OBJCOPYFLAGS			+= $(PF_OBJCOPY)
arch/mips/cpu/u-boot-spl.lds new file +90 -0

90 lines not on this page · raw message

Signature · 1 line
2.7.4
#5 lore raw

PATCH v2 1/1 MIPS: provide a default u-boot-spl.lds

Quoted 67 lines · Daniel Schwierzeck

Provide a default linker script for SPL binaries. Start address and size of text section and BSS section are configurable. All sections are arranged in a way that only relevant sections are kept in the code section for maximum size reduction. All other sections are kept but moved outside the code section to help with debugging.

---

Changes in v2:
- add missing section .u_boot_list

 arch/mips/config.mk          |  5 ++-
 arch/mips/cpu/u-boot-spl.lds | 90 ++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 93 insertions(+), 2 deletions(-)
 create mode 100644 arch/mips/cpu/u-boot-spl.lds
arch/mips/config.mk +3 -2
index 609a998..dcd3460 100644
@@ -65,7 +65,7 @@ else
 PF_ABICALLS			:= -mabicalls
 PF_PIC				:= -fpic
 PF_PIE				:= -pie
-PF_OBJCOPY			:= -j .got -j .u_boot_list -j .rel.dyn -j .padding
+PF_OBJCOPY			:= -j .got -j .rel.dyn -j .padding
 PF_OBJCOPY			+= -j .dtb.init.rodata
 endif
 
@@ -74,4 +74,5 @@ PLATFORM_CPPFLAGS		+= -msoft-float
 PLATFORM_LDFLAGS		+= -G 0 -static -n -nostdlib
 PLATFORM_RELFLAGS		+= -ffunction-sections -fdata-sections
 LDFLAGS_FINAL			+= --gc-sections $(PF_PIE)
-OBJCOPYFLAGS			+= -j .text -j .rodata -j .data $(PF_OBJCOPY)
+OBJCOPYFLAGS			+= -j .text -j .rodata -j .data -j .u_boot_list
+OBJCOPYFLAGS			+= $(PF_OBJCOPY)
arch/mips/cpu/u-boot-spl.lds new file +22 -0
new file mode 100644
index 0000000..07004ea
@@ -0,0 +1,90 @@
+/*
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+MEMORY { .spl_mem : ORIGIN = CONFIG_SPL_TEXT_BASE, \
+		LENGTH = CONFIG_SPL_MAX_SIZE }
+MEMORY { .bss_mem : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
+		LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
+
+OUTPUT_ARCH(mips)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text : {
+		*(.text*)
+	} > .spl_mem
+
+	. = ALIGN(4);
+	.rodata : {

arch/mips/cpu/u-boot-spl.lds line 32

Quoted 10 lines
arch/mips/cpu/u-boot-spl.lds new file +10 -0
+		*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+	} > .spl_mem
+
+	. = ALIGN(4);
+	.data : {
+		*(SORT_BY_ALIGNMENT(.data*))
+		*(SORT_BY_ALIGNMENT(.sdata*))
+	} > .spl_mem
+
+#ifdef CONFIG_SPL_DM

Is the ifdef really necessary ? I think if the list is empty, the u_boot_list will just be an zero-length symbol and since both this and the image_copy_end are 4-byte aligned, there will be no wasted space.

Quoted 59 lines
arch/mips/cpu/u-boot-spl.lds new file +58 -0
+	. = ALIGN(4);
+	.u_boot_list : {
+		KEEP(*(SORT(.u_boot_list*)));
+	} > .spl_mem
+#endif
+
+	. = ALIGN(4);
+	__image_copy_end = .;
+
+	.bss (NOLOAD) : {
+		__bss_start = .;
+		*(.bss*)
+		*(.sbss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end = .;
+	} > .bss_mem
+
+	.rel.dyn (NOLOAD) : {
+		*(.rel.dyn)
+	}
+
+	.dynsym : {
+		*(.dynsym)
+	}
+
+	.dynbss : {
+		*(.dynbss)
+	}
+
+	.dynstr : {
+		*(.dynstr)
+	}
+
+	.dynamic : {
+		*(.dynamic)
+	}
+
+	.plt : {
+		*(.plt)
+	}
+
+	.interp : {
+		*(.interp)
+	}
+
+	.gnu : {
+		*(.gnu*)
+	}
+
+	.MIPS.stubs : {
+		*(.MIPS.stubs)
+	}
+
+	.hash : {
+		*(.hash)
+	}
+}
Signature · 2 lines
Best regards,
Marek Vasut
#6 lore raw

PATCH v2 1/1 MIPS: provide a default u-boot-spl.lds

Am 26.05.2016 um 17:17 schrieb Marek Vasut:

Quoted 74 lines · Daniel Schwierzeck
Quoted 73 lines

Provide a default linker script for SPL binaries. Start address and size of text section and BSS section are configurable. All sections are arranged in a way that only relevant sections are kept in the code section for maximum size reduction. All other sections are kept but moved outside the code section to help with debugging.

---

Changes in v2:
- add missing section .u_boot_list

 arch/mips/config.mk          |  5 ++-
 arch/mips/cpu/u-boot-spl.lds | 90 ++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 93 insertions(+), 2 deletions(-)
 create mode 100644 arch/mips/cpu/u-boot-spl.lds
arch/mips/config.mk +3 -2
index 609a998..dcd3460 100644
@@ -65,7 +65,7 @@ else
 PF_ABICALLS			:= -mabicalls
 PF_PIC				:= -fpic
 PF_PIE				:= -pie
-PF_OBJCOPY			:= -j .got -j .u_boot_list -j .rel.dyn -j .padding
+PF_OBJCOPY			:= -j .got -j .rel.dyn -j .padding
 PF_OBJCOPY			+= -j .dtb.init.rodata
 endif
 
@@ -74,4 +74,5 @@ PLATFORM_CPPFLAGS		+= -msoft-float
 PLATFORM_LDFLAGS		+= -G 0 -static -n -nostdlib
 PLATFORM_RELFLAGS		+= -ffunction-sections -fdata-sections
 LDFLAGS_FINAL			+= --gc-sections $(PF_PIE)
-OBJCOPYFLAGS			+= -j .text -j .rodata -j .data $(PF_OBJCOPY)
+OBJCOPYFLAGS			+= -j .text -j .rodata -j .data -j .u_boot_list
+OBJCOPYFLAGS			+= $(PF_OBJCOPY)
arch/mips/cpu/u-boot-spl.lds new file +28 -0
new file mode 100644
index 0000000..07004ea
@@ -0,0 +1,90 @@
+/*
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+MEMORY { .spl_mem : ORIGIN = CONFIG_SPL_TEXT_BASE, \
+		LENGTH = CONFIG_SPL_MAX_SIZE }
+MEMORY { .bss_mem : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
+		LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
+
+OUTPUT_ARCH(mips)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text : {
+		*(.text*)
+	} > .spl_mem
+
+	. = ALIGN(4);
+	.rodata : {
+		*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+	} > .spl_mem
+
+	. = ALIGN(4);
+	.data : {
+		*(SORT_BY_ALIGNMENT(.data*))
Quoted 8 lines

arch/mips/cpu/u-boot-spl.lds line 32

Quoted 4 lines
arch/mips/cpu/u-boot-spl.lds new file +4 -0
+		*(SORT_BY_ALIGNMENT(.sdata*))
+	} > .spl_mem
+
+#ifdef CONFIG_SPL_DM

Is the ifdef really necessary ? I think if the list is empty, the u_boot_list will just be an zero-length symbol and since both this and the image_copy_end are 4-byte aligned, there will be no wasted space.

yes, I also tested it with your with your CI20 patches. If I disable CONFIG_SPL_DM, there still is u_boot_list entry from the MMC driver which would waste 120 Bytes.

Quoted 62 lines
Quoted 60 lines
arch/mips/cpu/u-boot-spl.lds new file +58 -0
+	. = ALIGN(4);
+	.u_boot_list : {
+		KEEP(*(SORT(.u_boot_list*)));
+	} > .spl_mem
+#endif
+
+	. = ALIGN(4);
+	__image_copy_end = .;
+
+	.bss (NOLOAD) : {
+		__bss_start = .;
+		*(.bss*)
+		*(.sbss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end = .;
+	} > .bss_mem
+
+	.rel.dyn (NOLOAD) : {
+		*(.rel.dyn)
+	}
+
+	.dynsym : {
+		*(.dynsym)
+	}
+
+	.dynbss : {
+		*(.dynbss)
+	}
+
+	.dynstr : {
+		*(.dynstr)
+	}
+
+	.dynamic : {
+		*(.dynamic)
+	}
+
+	.plt : {
+		*(.plt)
+	}
+
+	.interp : {
+		*(.interp)
+	}
+
+	.gnu : {
+		*(.gnu*)
+	}
+
+	.MIPS.stubs : {
+		*(.MIPS.stubs)
+	}
+
+	.hash : {
+		*(.hash)
+	}
+}
Signature · 9 lines
- Daniel

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#7 lore raw

PATCH v2 1/1 MIPS: provide a default u-boot-spl.lds

Quoted 86 lines · Daniel Schwierzeck

Am 26.05.2016 um 17:17 schrieb Marek Vasut:

Quoted 74 lines · Daniel Schwierzeck
Quoted 73 lines

Provide a default linker script for SPL binaries. Start address and size of text section and BSS section are configurable. All sections are arranged in a way that only relevant sections are kept in the code section for maximum size reduction. All other sections are kept but moved outside the code section to help with debugging.

---

Changes in v2:
- add missing section .u_boot_list

 arch/mips/config.mk          |  5 ++-
 arch/mips/cpu/u-boot-spl.lds | 90 ++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 93 insertions(+), 2 deletions(-)
 create mode 100644 arch/mips/cpu/u-boot-spl.lds
arch/mips/config.mk +3 -2
index 609a998..dcd3460 100644
@@ -65,7 +65,7 @@ else
 PF_ABICALLS			:= -mabicalls
 PF_PIC				:= -fpic
 PF_PIE				:= -pie
-PF_OBJCOPY			:= -j .got -j .u_boot_list -j .rel.dyn -j .padding
+PF_OBJCOPY			:= -j .got -j .rel.dyn -j .padding
 PF_OBJCOPY			+= -j .dtb.init.rodata
 endif
 
@@ -74,4 +74,5 @@ PLATFORM_CPPFLAGS		+= -msoft-float
 PLATFORM_LDFLAGS		+= -G 0 -static -n -nostdlib
 PLATFORM_RELFLAGS		+= -ffunction-sections -fdata-sections
 LDFLAGS_FINAL			+= --gc-sections $(PF_PIE)
-OBJCOPYFLAGS			+= -j .text -j .rodata -j .data $(PF_OBJCOPY)
+OBJCOPYFLAGS			+= -j .text -j .rodata -j .data -j .u_boot_list
+OBJCOPYFLAGS			+= $(PF_OBJCOPY)
arch/mips/cpu/u-boot-spl.lds new file +28 -0
new file mode 100644
index 0000000..07004ea
@@ -0,0 +1,90 @@
+/*
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+MEMORY { .spl_mem : ORIGIN = CONFIG_SPL_TEXT_BASE, \
+		LENGTH = CONFIG_SPL_MAX_SIZE }
+MEMORY { .bss_mem : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
+		LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
+
+OUTPUT_ARCH(mips)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text : {
+		*(.text*)
+	} > .spl_mem
+
+	. = ALIGN(4);
+	.rodata : {
+		*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+	} > .spl_mem
+
+	. = ALIGN(4);
+	.data : {
+		*(SORT_BY_ALIGNMENT(.data*))
Quoted 8 lines

arch/mips/cpu/u-boot-spl.lds line 32

Quoted 4 lines
arch/mips/cpu/u-boot-spl.lds new file +4 -0
+		*(SORT_BY_ALIGNMENT(.sdata*))
+	} > .spl_mem
+
+#ifdef CONFIG_SPL_DM

Is the ifdef really necessary ? I think if the list is empty, the u_boot_list will just be an zero-length symbol and since both this and the image_copy_end are 4-byte aligned, there will be no wasted space.

Quoted 3 lines

yes, I also tested it with your with your CI20 patches. If I disable CONFIG_SPL_DM, there still is u_boot_list entry from the MMC driver which would waste 120 Bytes.

Awwwww, precious 120 bytes. Ok, keep this as is:

Quoted 62 lines
Quoted 61 lines
Quoted 59 lines
arch/mips/cpu/u-boot-spl.lds new file +58 -0
+	. = ALIGN(4);
+	.u_boot_list : {
+		KEEP(*(SORT(.u_boot_list*)));
+	} > .spl_mem
+#endif
+
+	. = ALIGN(4);
+	__image_copy_end = .;
+
+	.bss (NOLOAD) : {
+		__bss_start = .;
+		*(.bss*)
+		*(.sbss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end = .;
+	} > .bss_mem
+
+	.rel.dyn (NOLOAD) : {
+		*(.rel.dyn)
+	}
+
+	.dynsym : {
+		*(.dynsym)
+	}
+
+	.dynbss : {
+		*(.dynbss)
+	}
+
+	.dynstr : {
+		*(.dynstr)
+	}
+
+	.dynamic : {
+		*(.dynamic)
+	}
+
+	.plt : {
+		*(.plt)
+	}
+
+	.interp : {
+		*(.interp)
+	}
+
+	.gnu : {
+		*(.gnu*)
+	}
+
+	.MIPS.stubs : {
+		*(.MIPS.stubs)
+	}
+
+	.hash : {
+		*(.hash)
+	}
+}
Signature · 2 lines
Best regards,
Marek Vasut
#8 lore raw

PATCH v2 1/1 MIPS: provide a default u-boot-spl.lds

In reply to Daniel Schwierzeck

Am 26.05.2016 um 15:28 schrieb Daniel Schwierzeck:

Quoted 11 lines

Provide a default linker script for SPL binaries. Start address and size of text section and BSS section are configurable. All sections are arranged in a way that only relevant sections are kept in the code section for maximum size reduction. All other sections are kept but moved outside the code section to help with debugging.

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Quoted 8 lines

Changes in v2:
- add missing section .u_boot_list

 arch/mips/config.mk          |  5 ++-
 arch/mips/cpu/u-boot-spl.lds | 90 ++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 93 insertions(+), 2 deletions(-)
 create mode 100644 arch/mips/cpu/u-boot-spl.lds

applied to u-boot-mips

Signature · 9 lines
- Daniel

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