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arm: Fix SCFG ICID reg addresses

PATCH New Vincent Siles 2 participants 4 messages May 18, 2016 – Jun 4, 2016

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#0 lore raw

PATCH v3 1/3 arm: Fix SCFG ICID reg addresses

On the LS102x boards, in order to initialize the ICID values of masters, the dev_stream_id array holds absolute offsets from the base of SCFG.

In ls102xa_config_ssmu_stream_id, the base pointer is cast to uint32_t * before adding the offset, leading to an invalid address. Casting it to void * solves the issue.

---

Changes in v3: None
Changes in v2: None

 board/freescale/common/ls102xa_stream_id.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
board/freescale/common/ls102xa_stream_id.c +2 -2
index f434269..39e7b30 100644
@@ -10,11 +10,11 @@
 
 void ls102xa_config_smmu_stream_id(struct smmu_stream_id *id, uint32_t num)
 {
-	uint32_t *scfg = (uint32_t *)CONFIG_SYS_FSL_SCFG_ADDR;
+	void *scfg = (void *)CONFIG_SYS_FSL_SCFG_ADDR;
 	int i;
 
 	for (i = 0; i < num; i++)
-		out_be32(scfg + id[i].offset, id[i].stream_id);
+		out_be32((u32 *)(scfg + id[i].offset), id[i].stream_id);
 }
 
 void ls1021x_config_caam_stream_id(struct liodn_id_table *tbl, int size)
Signature · 1 line
1.9.1
#1 lore raw

PATCH v3 2/3 arm: uniform usage of u32 in ls102x caam config

Mix usage of uint32_t and u32 fixed in favor of u32

---

Changes in v3: None
Changes in v2: None

 board/freescale/common/ls102xa_stream_id.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
board/freescale/common/ls102xa_stream_id.c +1 -1
index 39e7b30..3d5404e 100644
@@ -28,6 +28,6 @@ void ls1021x_config_caam_stream_id(struct liodn_id_table *tbl, int size)
 		else
 			liodn = tbl[i].id[0];
 
-		out_le32((uint32_t *)(tbl[i].reg_offset), liodn);
+		out_le32((u32 *)(tbl[i].reg_offset), liodn);
 	}
 }
Signature · 1 line
1.9.1
#2 lore raw

PATCH v3 3/3 Fix ICID setup

In reply to Vincent Siles

LS102A ref manual dictates that ICID have to be written to the MSB of the ICID register, not to the LSB.

---

Changes in v3:
- Fix another issue with ICID setup: the value is not written at the correct location (LSB instead of MSB)

Changes in v2:
- Casting to void * instead of u8 *
- Splitted commit into two seperate ones

 board/freescale/common/ls102xa_stream_id.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)
board/freescale/common/ls102xa_stream_id.c +5 -2
index 3d5404e..0abaffb 100644
@@ -12,9 +12,12 @@ void ls102xa_config_smmu_stream_id(struct smmu_stream_id *id, uint32_t num)
 {
 	void *scfg = (void *)CONFIG_SYS_FSL_SCFG_ADDR;
 	int i;
+	u32 icid;
 
-	for (i = 0; i < num; i++)
-		out_be32((u32 *)(scfg + id[i].offset), id[i].stream_id);
+	for (i = 0; i < num; i++) {
+		icid = (id[i].stream_id & 0xff) << 24;
+		out_be32((u32 *)(scfg + id[i].offset), icid);
+	}
 }
 
 void ls1021x_config_caam_stream_id(struct liodn_id_table *tbl, int size)
Signature · 1 line
1.9.1
Applied
#3 lore raw

PATCH v3 3/3 Fix ICID setup

Quoted 10 lines · Vincent Siles

LS102A ref manual dictates that ICID have to be written to the MSB of the ICID register, not to the LSB.

---

Changes in v3:
- Fix another issue with ICID setup: the value is not written at the correct location (LSB instead of MSB)

Quoted 7 lines

Changes in v2:
- Casting to void * instead of u8 *
- Splitted commit into two seperate ones

 board/freescale/common/ls102xa_stream_id.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

Applied to fsl-qoriq master branch. Awaiting upstream. Thanks.

York