ARM: dts: BCM5310x switch support
cover ARM: dts: BCM5310x switch support
Hi all,
This patch series adds the Device Tree changes needed to enable the Switch Register Access Block found on Broadcom BCM5301x SoCs.
First patch adds the SRAB block and the GMAC as child nodes of the BCMA bus so we get proper device_node/struct device parenting. The second patch defines the SRAB interrupts, and the last one defines the switch ports layouts according to the new DSA binding accepted in net-next:
The B53 driver binding is defined here:
Florian Fainelli (3):
ARM: dts: Enable SRAB switch and GMACs on 5301x DTS
ARM: dts: BCM5301X: Add SRAB interrupts
ARM: dts: BCM5310x: Enable switch ports on SmartRG SR400AC
arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts | 40 +++++++++++++++++++++++++ arch/arm/boot/dts/bcm5301x.dtsi | 42 +++++++++++++++++++++++++++ 2 files changed, 82 insertions(+)
Signature · 1 line
2.7.4
PATCH 1/3 ARM: dts: Enable SRAB switch and GMACs on 5301x DTS
Add the Switch Register Access Block which is a special piece of hardware allowing us to perform indirect read/writes towards the integrated BCM5301X Ethernet switch.
We also add the 4 Gigabit MAC Device Tree nodes within the brcm,bus-axi bus node to get proper binding between the BCMA instantiated core and the Device Tree nodes. We will need that to be able to reference Ethernet Device Tree nodes in a future patch adding the switch ports layout.
--- arch/arm/boot/dts/bcm5301x.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+)
arch/arm/boot/dts/bcm5301x.dtsi +27 -0
@@ -239,6 +239,22 @@ status = "disabled"; }; }; + + gmac0: ethernet at 24000 { + reg = <0x24000 0x800>; + }; + + gmac1: ethernet at 25000 { + reg = <0x25000 0x800>; + }; + + gmac2: ethernet at 26000 { + reg = <0x26000 0x800>; + }; + + gmac3: ethernet at 27000 { + reg = <0x27000 0x800>; + }; }; lcpll0: lcpll0 at 1800c100 {
@@ -260,6 +276,17 @@ "sata2"; }; + srab: srab at 18007000 { + compatible = "brcm,bcm5301x-srab"; + reg = <0x18007000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + + /* ports are defined in board DTS */ + }; + nand: nand at 18028000 { compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand"; reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
Signature · 1 line
2.7.4
PATCH 2/3 ARM: dts: BCM5301X: Add SRAB interrupts
In reply to Florian FainelliAdd interrupt mapping for the Switch Register Access Block. Only 12 interrupts are usable at the moment even though up to 32 are dedicated to the SRAB.
--- arch/arm/boot/dts/bcm5301x.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
arch/arm/boot/dts/bcm5301x.dtsi +15 -0
@@ -153,6 +153,21 @@ /* ChipCommon */ <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, + /* Switch Register Access Block */ + <0x00007000 0 &gic GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, + <0x00007000 1 &gic GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, + <0x00007000 2 &gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, + <0x00007000 3 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, + <0x00007000 4 &gic GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, + <0x00007000 5 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, + <0x00007000 6 &gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, + <0x00007000 7 &gic GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, + <0x00007000 8 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, + <0x00007000 9 &gic GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, + <0x00007000 10 &gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, + <0x00007000 11 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, + <0x00007000 12 &gic GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, + /* PCIe Controller 0 */ <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
Signature · 1 line
2.7.4
PATCH 3/3 ARM: dts: BCM5310x: Enable switch ports on SmartRG SR400AC
In reply to Florian FainelliDefine the port mapping for the SmartRG SR400ACE device.
--- arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts | 40 +++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)
arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts +40 -0
@@ -126,3 +126,43 @@ &spi_nor { status = "okay"; }; + +&srab { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + switch0port0: port at 0 { + reg = <0>; + label = "lan4"; + }; + + switch0port1: port at 1 { + reg = <1>; + label = "lan3"; + }; + + switch0port2: port at 2 { + reg = <2>; + label = "lan2"; + }; + + switch0port3: port at 3 { + reg = <3>; + label = "lan1"; + }; + + switch0port4: port at 4 { + reg = <4>; + label = "wan"; + }; + + switch0port5: port at 5 { + reg = <5>; + label = "cpu"; + ethernet = <&gmac0>; + }; + }; +};
Signature · 1 line
2.7.4
PATCH 3/3 ARM: dts: BCM5310x: Enable switch ports on SmartRG SR400AC
Quoted 14 lines · Florian Fainelli
Define the port mapping for the SmartRG SR400ACE device.
Signed-off-by Florian Fainelli <[email protected]>--- arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts | 40 +++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts +0
-0@@ -126,3 +126,43 @@ &spi_nor { status = "okay";
arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts line 137
Quoted 10 lines
arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts +9
-0}; + +&srab { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + switch0port0: port at 0 {
Hi Florian
You don't need the labels, since you don't have any phandles pointing at them.
Other than that, great to see a board using the new switch driver.
Andrew
cover ARM: dts: BCM5310x switch support
In reply to Florian FainelliQuoted 12 lines · Florian Fainelli
Hi all,
This patch series adds the Device Tree changes needed to enable the Switch Register Access Block found on Broadcom BCM5301x SoCs.
First patch adds the SRAB block and the GMAC as child nodes of the BCMA bus so we get proper device_node/struct device parenting. The second patch defines the SRAB interrupts, and the last one defines the switch ports layouts according to the new DSA binding accepted in net-next:
Quoted 8 lines
The B53 driver binding is defined here:
Florian Fainelli (3):
ARM: dts: Enable SRAB switch and GMACs on 5301x DTS
ARM: dts: BCM5301X: Add SRAB interrupts
ARM: dts: BCM5310x: Enable switch ports on SmartRG SR400AC
Applied with Andrew's Reviewed-by tag and removed the labels in patch 3, thanks
Signature · 1 line
Florian