various Gateworks Ventana fixes and enhancements

index 874bb04..3aeb0df 100644
@@ -281,6 +281,8 @@
 	\
 	"mtdparts=" MTDPARTS_DEFAULT "\0" \
 	"mtdids=" MTDIDS_DEFAULT "\0" \
+	"disk=0\0" \
+	"part=1\0" \
 	\
 	"fdt_high=0xffffffff\0" \
 	"fdt_addr=0x18000000\0" \

@@ -304,8 +306,8 @@
 	"uimage=uImage\0" \
 	"mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \
 	"mmc_boot=" \
-		"setenv fsload 'ext2load mmc 0:1'; " \
-		"mmc dev 0 && mmc rescan && " \
+		"setenv fsload \"ext2load mmc ${disk}:${part}\"; " \
+		"mmc dev ${disk} && mmc rescan && " \
 		"setenv dtype mmc; run loadscript; " \
 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
 			"setenv bootargs console=${console},${baudrate} " \

@@ -319,7 +321,8 @@
 		"fi\0" \
 	\
 	"sata_boot=" \
-		"setenv fsload 'ext2load sata 0:1'; sata init && " \
+		"setenv fsload \"ext2load sata ${disk}:${part}\"; " \
+		"sata init && " \
 		"setenv dtype sata; run loadscript; " \
 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
 			"setenv bootargs console=${console},${baudrate} " \

@@ -332,7 +335,8 @@
 			"fi; " \
 		"fi\0" \
 	"usb_boot=" \
-		"setenv fsload 'ext2load usb 0:1'; usb start && usb dev 0 && " \
+		"setenv fsload \"ext2load usb ${disk}:${part}\"; " \
+		"usb start && usb dev ${disk} && " \
 		"setenv dtype usb; run loadscript; " \
 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
 			"setenv bootargs console=${console},${baudrate} " \

index 3aeb0df..e57b120 100644
@@ -287,14 +287,19 @@
 	"fdt_high=0xffffffff\0" \
 	"fdt_addr=0x18000000\0" \
 	"initrd_high=0xffffffff\0" \
+	"fixfdt=" \
+		"fdt addr ${fdt_addr}\0" \
 	"bootdir=boot\0" \
 	"loadfdt=" \
-		"if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \
-			"echo Loaded DTB from ${bootdir}/${fdt_file}; " \
-		"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \
-			"echo Loaded DTB from ${bootdir}/${fdt_file1}; " \
-		"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \
-			"echo Loaded DTB from ${bootdir}/${fdt_file2}; " \
+		"if ${fsload} ${fdt_addr} boot/${fdt_file}; then " \
+			"echo Loaded DTB from boot/${fdt_file}; " \
+			"run fixfdt; " \
+		"elif ${fsload} ${fdt_addr} boot/${fdt_file1}; then " \
+			"echo Loaded DTB from boot/${fdt_file1}; " \
+			"run fixfdt; " \
+		"elif ${fsload} ${fdt_addr} boot/${fdt_file2}; then " \
+			"echo Loaded DTB from boot/${fdt_file2}; " \
+			"run fixfdt; " \
 		"fi\0" \
 	\
 	"script=6x_bootscript-ventana\0" \

@@ -313,7 +318,7 @@
 			"setenv bootargs console=${console},${baudrate} " \
 				"root=/dev/mmcblk0p1 rootfstype=ext4 " \
 				"rootwait rw ${video} ${extra}; " \
-			"if run loadfdt && fdt addr ${fdt_addr}; then " \
+			"if run loadfdt; then " \
 				"bootm ${loadaddr} - ${fdt_addr}; " \
 			"else " \
 				"bootm; " \

@@ -328,7 +333,7 @@
 			"setenv bootargs console=${console},${baudrate} " \
 				"root=/dev/sda1 rootfstype=ext4 " \
 				"rootwait rw ${video} ${extra}; " \
-			"if run loadfdt && fdt addr ${fdt_addr}; then " \
+			"if run loadfdt; then " \
 				"bootm ${loadaddr} - ${fdt_addr}; " \
 			"else " \
 				"bootm; " \

@@ -342,7 +347,7 @@
 			"setenv bootargs console=${console},${baudrate} " \
 				"root=/dev/sda1 rootfstype=ext4 " \
 				"rootwait rw ${video} ${extra}; " \
-			"if run loadfdt && fdt addr ${fdt_addr}; then " \
+			"if run loadfdt; then " \
 				"bootm ${loadaddr} - ${fdt_addr}; " \
 			"else " \
 				"bootm; " \

@@ -405,7 +410,7 @@
 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
 			"setenv bootargs console=${console},${baudrate} " \
 				"root=${root} ${video} ${extra}; " \
-			"if run loadfdt && fdt addr ${fdt_addr}; then " \
+			"if run loadfdt; then " \
 				"ubifsumount; " \
 				"bootm ${loadaddr} - ${fdt_addr}; " \
 			"else " \

index e57b120..dff4303 100644
@@ -291,14 +291,14 @@
 		"fdt addr ${fdt_addr}\0" \
 	"bootdir=boot\0" \
 	"loadfdt=" \
-		"if ${fsload} ${fdt_addr} boot/${fdt_file}; then " \
-			"echo Loaded DTB from boot/${fdt_file}; " \
+		"if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \
+			"echo Loaded DTB from ${bootdir}/${fdt_file}; " \
 			"run fixfdt; " \
-		"elif ${fsload} ${fdt_addr} boot/${fdt_file1}; then " \
-			"echo Loaded DTB from boot/${fdt_file1}; " \
+		"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \
+			"echo Loaded DTB from ${bootdir}/${fdt_file1}; " \
 			"run fixfdt; " \
-		"elif ${fsload} ${fdt_addr} boot/${fdt_file2}; then " \
-			"echo Loaded DTB from boot/${fdt_file2}; " \
+		"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \
+			"echo Loaded DTB from ${bootdir}/${fdt_file2}; " \
 			"run fixfdt; " \
 		"fi\0" \
 	\

index dff4303..fe81cbd 100644
@@ -302,6 +302,7 @@
 			"run fixfdt; " \
 		"fi\0" \
 	\
+	"fs=ext4\0" \
 	"script=6x_bootscript-ventana\0" \
 	"loadscript=" \
 		"if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \

@@ -309,14 +310,14 @@
 		"fi\0" \
 	\
 	"uimage=uImage\0" \
-	"mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \
+	"mmc_root=/dev/mmcblk0p1 rootfstype=${fs} rootwait rw\0" \
 	"mmc_boot=" \
-		"setenv fsload \"ext2load mmc ${disk}:${part}\"; " \
+		"setenv fsload \"${fs}load mmc ${disk}:${part}\"; " \
 		"mmc dev ${disk} && mmc rescan && " \
 		"setenv dtype mmc; run loadscript; " \
 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
 			"setenv bootargs console=${console},${baudrate} " \
-				"root=/dev/mmcblk0p1 rootfstype=ext4 " \
+				"root=/dev/mmcblk0p1 rootfstype=${fs} " \
 				"rootwait rw ${video} ${extra}; " \
 			"if run loadfdt; then " \
 				"bootm ${loadaddr} - ${fdt_addr}; " \

@@ -326,12 +327,12 @@
 		"fi\0" \
 	\
 	"sata_boot=" \
-		"setenv fsload \"ext2load sata ${disk}:${part}\"; " \
+		"setenv fsload \"${fs}load sata ${disk}:${part}\"; " \
 		"sata init && " \
 		"setenv dtype sata; run loadscript; " \
 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
 			"setenv bootargs console=${console},${baudrate} " \
-				"root=/dev/sda1 rootfstype=ext4 " \
+				"root=/dev/sda1 rootfstype=${fs} " \
 				"rootwait rw ${video} ${extra}; " \
 			"if run loadfdt; then " \
 				"bootm ${loadaddr} - ${fdt_addr}; " \

@@ -340,12 +341,12 @@
 			"fi; " \
 		"fi\0" \
 	"usb_boot=" \
-		"setenv fsload \"ext2load usb ${disk}:${part}\"; " \
+		"setenv fsload \"${fs}load usb ${disk}:${part}\"; " \
 		"usb start && usb dev ${disk} && " \
 		"setenv dtype usb; run loadscript; " \
 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
 			"setenv bootargs console=${console},${baudrate} " \
-				"root=/dev/sda1 rootfstype=ext4 " \
+				"root=/dev/sda1 rootfstype=${fs} " \
 				"rootwait rw ${video} ${extra}; " \
 			"if run loadfdt; then " \
 				"bootm ${loadaddr} - ${fdt_addr}; " \

index fe81cbd..435ca0a 100644
@@ -306,7 +306,7 @@
 	"script=6x_bootscript-ventana\0" \
 	"loadscript=" \
 		"if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \
-			"source; " \
+			"source ${loadaddr}; " \
 		"fi\0" \
 	\
 	"uimage=uImage\0" \

index 435ca0a..982ddba 100644
@@ -201,6 +201,7 @@
 
 /* Miscellaneous configurable options */
 #define CONFIG_HWCONFIG
+#define CONFIG_PREBOOT
 
 /* Print Buffer Size */
 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)

index ed42b86..c045d74 100644
@@ -527,9 +527,6 @@ void board_init_f(ulong dummy)
 
 	/* Clear the BSS. */
 	memset(__bss_start, 0, __bss_end - __bss_start);
-
-	/* disable boot watchdog */
-	gsc_boot_wd_disable();
 }
 
 /* called from board_init_r after gd setup if CONFIG_SPL_BOARD_INIT defined */

@@ -575,6 +572,9 @@ int spl_start_uboot(void)
 	i2c_set_bus_num(0);
 	gsc_i2c_read(0x50, 0x0, 1, &ret, 1);
 #endif
+	if (!ret)
+		gsc_boot_wd_disable();
+
 	debug("%s booting %s\n", __func__, ret ? "uboot" : "linux");
 	return ret;
 }

index c045d74..e7f699a 100644
@@ -190,6 +190,20 @@ static struct mx6_ddr3_cfg mt41k256m16ha_125 = {
 	.trasmin = 3500,
 };
 
+/* MT41K512M16HA-125 (8Gb density) */
+static struct mx6_ddr3_cfg mt41k512m16ha_125 = {
+	.mem_speed = 1600,
+	.density = 8,
+	.width = 16,
+	.banks = 8,
+	.rowaddr = 16,
+	.coladdr = 10,
+	.pagesz = 2,
+	.trcd = 1375,
+	.trcmin = 4875,
+	.trasmin = 3500,
+};
+
 /*
  * calibration - these are the various CPU/DDR3 combinations we support
  */

@@ -341,6 +355,19 @@ static struct mx6_mmdc_calibration mx6dq_256x64_mmdc_calib = {
 	.p1_mpwrdlctl = 0X40304239,
 };
 
+static struct mx6_mmdc_calibration mx6dq_512x32_mmdc_calib = {
+	/* write leveling calibration determine */
+	.p0_mpwldectrl0 = 0x002A0025,
+	.p0_mpwldectrl1 = 0x003A002A,
+	/* Read DQS Gating calibration */
+	.p0_mpdgctrl0 = 0x43430356,
+	.p0_mpdgctrl1 = 0x033C0335,
+	/* Read Calibration: DQS delay relative to DQ read access */
+	.p0_mprddlctl = 0x4B373F42,
+	/* Write Calibration: DQ/DM delay relative to DQS write access */
+	.p0_mpwrdlctl = 0x303E3C36,
+};
+
 static void spl_dram_init(int width, int size_mb, int board_model)
 {
 	struct mx6_ddr3_cfg *mem = NULL;

@@ -420,6 +447,11 @@ static void spl_dram_init(int width, int size_mb, int board_model)
 		else
 			calib = &mx6sdl_256x32_mmdc_calib;
 		debug("4gB density\n");
+	} else if (width == 32 && size_mb == 2048) {
+		mem = &mt41k512m16ha_125;
+		if (is_cpu_type(MXC_CPU_MX6Q))
+			calib = &mx6dq_512x32_mmdc_calib;
+		debug("8gB density\n");
 	} else if (width == 64 && size_mb == 512) {
 		mem = &mt41k64m16jt_125;
 		debug("1gB density\n");

index 4f26bfd..2555824 100644
@@ -160,6 +160,48 @@ int gsc_boot_wd_disable(void)
 }
 
 #ifdef CONFIG_CMD_GSC
+static int do_gsc_sleep(cmd_tbl_t *cmdtp, int flag, int argc,
+			char * const argv[])
+{
+	unsigned char reg;
+	unsigned long secs = 0;
+
+	if (argc < 2)
+		return CMD_RET_USAGE;
+
+	secs = simple_strtoul(argv[1], NULL, 10);
+	printf("GSC Sleeping for %ld seconds\n", secs);
+
+	i2c_set_bus_num(0);
+	reg = (secs >> 24) & 0xff;
+	if (gsc_i2c_write(GSC_SC_ADDR, 9, 1, &reg, 1))
+		goto error;
+	reg = (secs >> 16) & 0xff;
+	if (gsc_i2c_write(GSC_SC_ADDR, 8, 1, &reg, 1))
+		goto error;
+	reg = (secs >> 8) & 0xff;
+	if (gsc_i2c_write(GSC_SC_ADDR, 7, 1, &reg, 1))
+		goto error;
+	reg = secs & 0xff;
+	if (gsc_i2c_write(GSC_SC_ADDR, 6, 1, &reg, 1))
+		goto error;
+	if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
+		goto error;
+	reg |= (1 << 2);
+	if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
+		goto error;
+	reg &= ~(1 << 2);
+	reg |= 0x3;
+	if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
+		goto error;
+
+	return CMD_RET_SUCCESS;
+
+error:
+	printf("i2c error\n");
+	return CMD_RET_FAILURE;
+}
+
 static int do_gsc_wd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	unsigned char reg;

@@ -206,13 +248,15 @@ static int do_gsc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	if (strcasecmp(argv[1], "wd") == 0)
 		return do_gsc_wd(cmdtp, flag, --argc, ++argv);
+	else if (strcasecmp(argv[1], "sleep") == 0)
+		return do_gsc_sleep(cmdtp, flag, --argc, ++argv);
 
 	return CMD_RET_USAGE;
 }
 
 U_BOOT_CMD(
 	gsc, 4, 1, do_gsc, "GSC configuration",
-	"[wd enable [30|60]]|[wd disable]\n"
+	"[wd enable [30|60]]|[wd disable]|[sleep <secs>]\n"
 	);
 
 #endif /* CONFIG_CMD_GSC */

index 2555824..c626ba2 100644
@@ -71,6 +71,8 @@ static void read_hwmon(const char *name, uint reg, uint size)
 		puts("fRD\n");
 	} else {
 		ui = buf[0] | (buf[1]<<8) | (buf[2]<<16);
+		if (reg == GSC_HWMON_TEMP && ui > 0x8000)
+			ui -= 0xffff;
 		if (ui == 0xffffff)
 			puts("invalid\n");
 		else

index c626ba2..042f55a 100644
@@ -98,6 +98,12 @@ int gsc_info(int verbose)
 		gsc_i2c_write(GSC_SC_ADDR, GSC_SC_STATUS, 1,
 			      &buf[GSC_SC_STATUS], 1);
 	}
+	if (!gsc_i2c_read(GSC_HWMON_ADDR, GSC_HWMON_TEMP, 1, buf, 2)) {
+		int ui = buf[0] | buf[1]<<8;
+		if (ui > 0x8000)
+			ui -= 0xffff;
+		printf(" board temp at %dC", ui / 10);
+	}
 	puts("\n");
 	if (!verbose)
 		return CMD_RET_SUCCESS;

index 3b7c82b..7a3d96a 100644
@@ -317,6 +317,8 @@ static void enable_lvds(struct display_info_t const *dev)
 	writel(reg, &iomux->gpr[2]);
 
 	/* Enable Backlight */
+	gpio_request(IMX_GPIO_NR(1, 10), "bklt_gpio");
+	gpio_direction_output(IMX_GPIO_NR(1, 10), 0);
 	gpio_request(IMX_GPIO_NR(1, 18), "bklt_en");
 	SETUP_IOMUX_PAD(PAD_SD1_CMD__GPIO1_IO18 | DIO_PAD_CFG);
 	gpio_direction_output(IMX_GPIO_NR(1, 18), 1);

@@ -456,8 +458,7 @@ static void setup_display(void)
 	       <<IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET);
 	writel(reg, &iomux->gpr[3]);
 
-	/* Backlight CABEN on LVDS connector */
-	gpio_request(IMX_GPIO_NR(1, 10), "bklt_gpio");
+	/* LVDS Backlight GPIO on LVDS connector - output low */
 	SETUP_IOMUX_PAD(PAD_SD2_CLK__GPIO1_IO10 | DIO_PAD_CFG);
 	gpio_direction_output(IMX_GPIO_NR(1, 10), 0);
 }

index a20190e..7610381 100644
@@ -760,7 +760,7 @@ void setup_board_gpio(int board, struct ventana_board_info *info)
 					       ctrl);
 			gpio_requestf(cfg->gpio_param, "dio%d", i);
 			gpio_direction_input(cfg->gpio_param);
-		} else if (hwconfig_subarg_cmp("dio2", "mode", "pwm") &&
+		} else if (hwconfig_subarg_cmp(arg, "mode", "pwm") &&
 			   cfg->pwm_padmux) {
 			if (!quiet)
 				printf("DIO%d:  pwm%d\n", i, cfg->pwm_param);

index 7610381..44ee73f 100644
@@ -762,6 +762,11 @@ void setup_board_gpio(int board, struct ventana_board_info *info)
 			gpio_direction_input(cfg->gpio_param);
 		} else if (hwconfig_subarg_cmp(arg, "mode", "pwm") &&
 			   cfg->pwm_padmux) {
+			if (!cfg->pwm_param) {
+				printf("DIO%d:  Error: pwm config invalid\n",
+					i);
+				continue;
+			}
 			if (!quiet)
 				printf("DIO%d:  pwm%d\n", i, cfg->pwm_param);
 			imx_iomux_v3_setup_pad(cfg->pwm_padmux[cputype] |

index 7a3d96a..feb2df8 100644
@@ -21,6 +21,7 @@
 #include <asm/io.h>
 #include <dm.h>
 #include <dm/platform_data/serial_mxc.h>
+#include <hwconfig.h>
 #include <i2c.h>
 #include <fdt_support.h>
 #include <fsl_esdhc.h>

@@ -777,6 +778,16 @@ static int ft_sethdmiinfmt(void *blob, char *mode)
 	return 0;
 }
 
+/* enable a property of a node if the node is found */
+static inline void ft_enable_path(void *blob, const char *path)
+{
+	int i = fdt_path_offset(blob, path);
+	if (i >= 0) {
+		debug("enabling %s\n", path);
+		fdt_status_okay(blob, i);
+	}
+}
+
 /*
  * called prior to booting kernel or by 'fdt boardsetup' command
  *

@@ -920,6 +931,25 @@ int ft_board_setup(void *blob, bd_t *bd)
 		ft_sethdmiinfmt(blob, "yuv422bt656");
 	}
 
+	/* Configure DIO */
+	for (i = 0; i < gpio_cfg[board_type].num_gpios; i++) {
+		struct dio_cfg *cfg = &gpio_cfg[board_type].dio_cfg[i];
+		char arg[10];
+
+		sprintf(arg, "dio%d", i);
+		if (!hwconfig(arg))
+			continue;
+		if (hwconfig_subarg_cmp(arg, "mode", "pwm") && cfg->pwm_param)
+		{
+			char path[48];
+			sprintf(path, "/soc/aips-bus at 02000000/pwm@%08x",
+				0x02080000 + (0x4000 * (cfg->pwm_param - 1)));
+			printf("   Enabling pwm%d for DIO%d\n",
+			       cfg->pwm_param, i);
+			ft_enable_path(blob, path);
+		}
+	}
+
 	/*
 	 * Peripheral Config:
 	 *  remove nodes by alias path if EEPROM config tells us the

index 44ee73f..5a8bacd 100644
@@ -132,8 +132,6 @@ void setup_ventana_i2c(void)
 
 /* common to add baseboards */
 static iomux_v3_cfg_t const gw_gpio_pads[] = {
-	/* MSATA_EN */
-	IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
 	/* RS232_EN# */
 	IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
 };

@@ -183,6 +181,8 @@ static iomux_v3_cfg_t const gw51xx_gpio_pads[] = {
 };
 
 static iomux_v3_cfg_t const gw52xx_gpio_pads[] = {
+	/* MSATA_EN */
+	IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
 	/* PANLEDG# */
 	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
 	/* PANLEDR# */

@@ -212,6 +212,8 @@ static iomux_v3_cfg_t const gw52xx_gpio_pads[] = {
 };
 
 static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {
+	/* MSATA_EN */
+	IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
 	/* CAN_STBY */
 	IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
 	/* USB_HUBRST# */

@@ -241,6 +243,8 @@ static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {
 };
 
 static iomux_v3_cfg_t const gw54xx_gpio_pads[] = {
+	/* MSATA_EN */
+	IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
 	/* CAN_STBY */
 	IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
 	/* PANLEDG# */

@@ -283,6 +287,8 @@ static iomux_v3_cfg_t const gw551x_gpio_pads[] = {
 };
 
 static iomux_v3_cfg_t const gw552x_gpio_pads[] = {
+	/* MSATA_EN */
+	IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
 	/* USBOTG_SEL */
 	IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | DIO_PAD_CFG),
 	/* USB_HUBRST# */

@@ -445,6 +451,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.vidin_en = IMX_GPIO_NR(3, 31),
 		.usb_sel = IMX_GPIO_NR(1, 2),
 		.wdis = IMX_GPIO_NR(7, 12),
+		.msata_en = GP_MSATA_SEL,
 	},
 
 	/* GW53xx */

@@ -489,6 +496,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.gps_shdn = IMX_GPIO_NR(1, 27),
 		.vidin_en = IMX_GPIO_NR(3, 31),
 		.wdis = IMX_GPIO_NR(7, 12),
+		.msata_en = GP_MSATA_SEL,
 	},
 
 	/* GW54xx */

@@ -535,6 +543,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.dioi2c_en = IMX_GPIO_NR(4,  5),
 		.pcie_sson = IMX_GPIO_NR(1, 20),
 		.wdis = IMX_GPIO_NR(5, 17),
+		.msata_en = GP_MSATA_SEL,
 	},
 
 	/* GW551x */

@@ -602,6 +611,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.pcie_rst = IMX_GPIO_NR(1, 29),
 		.usb_sel = IMX_GPIO_NR(1, 7),
 		.wdis = IMX_GPIO_NR(7, 12),
+		.msata_en = GP_MSATA_SEL,
 	},
 };
 

@@ -616,10 +626,6 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
 	gpio_request(GP_USB_OTG_PWR, "usbotg_pwr");
 	gpio_direction_output(GP_USB_OTG_PWR, 0);
 
-	/* MSATA Enable - default to PCI */
-	gpio_request(GP_MSATA_SEL, "msata_en");
-	gpio_direction_output(GP_MSATA_SEL, 0);
-
 	/* RS232_EN# */
 	gpio_request(GP_RS232_EN, "rs232_en");
 	gpio_direction_output(GP_RS232_EN, 0);

@@ -649,6 +655,12 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
 		}
 	}
 
+	/* MSATA Enable - default to PCI */
+	if (gpio_cfg[board].msata_en) {
+		gpio_request(gpio_cfg[board].msata_en, "msata_en");
+		gpio_direction_output(gpio_cfg[board].msata_en, 0);
+	}
+
 	/* Expansion Mezzanine IO */
 	if (gpio_cfg[board].mezz_pwren) {
 		gpio_request(gpio_cfg[board].mezz_pwren, "mezz_pwr");

@@ -718,10 +730,9 @@ void setup_board_gpio(int board, struct ventana_board_info *info)
 	gpio_direction_output(GP_RS232_EN, (hwconfig("rs232")) ? 0 : 1);
 
 	/* MSATA Enable */
-	if (is_cpu_type(MXC_CPU_MX6Q) &&
-	    test_bit(EECONFIG_SATA, info->config)) {
+	if (gpio_cfg[board].msata_en && is_cpu_type(MXC_CPU_MX6Q)) {
 		gpio_direction_output(GP_MSATA_SEL,
-				      (hwconfig("msata")) ?  1 : 0);
+				      (hwconfig("msata")) ? 1 : 0);
 	}
 
 	/* USBOTG Select (PCISKT or FrontPanel) */

@@ -775,8 +786,7 @@ void setup_board_gpio(int board, struct ventana_board_info *info)
 	}
 
 	if (!quiet) {
-		if (is_cpu_type(MXC_CPU_MX6Q) &&
-		    (test_bit(EECONFIG_SATA, info->config))) {
+		if (gpio_cfg[board].msata_en && is_cpu_type(MXC_CPU_MX6Q)) {
 			printf("MSATA: %s\n", (hwconfig("msata") ?
 			       "enabled" : "disabled"));
 		}

index 28f5816..58ad5ff 100644
@@ -76,6 +76,7 @@ struct ventana {
 	int pcie_sson;
 	int usb_sel;
 	int wdis;
+	int msata_en;
 };
 
 extern struct ventana gpio_cfg[GW_UNKNOWN];

index ba15969..e86c98e 100644
@@ -100,43 +100,12 @@ read_eeprom(int bus, struct ventana_board_info *info)
 /* list of config bits that the bootloader will remove from dtb if not set */
 struct ventana_eeprom_config econfig[] = {
 	{ "eth0", "ethernet0", EECONFIG_ETH0 },
-	{ "eth1", "ethernet1", EECONFIG_ETH1 },
-	{ "sata", "ahci0", EECONFIG_SATA },
-	{ "pcie", NULL, EECONFIG_PCIE},
-	{ "lvds0", NULL, EECONFIG_LVDS0 },
-	{ "lvds1", NULL, EECONFIG_LVDS1 },
 	{ "usb0", NULL, EECONFIG_USB0 },
 	{ "usb1", NULL, EECONFIG_USB1 },
 	{ "mmc0", NULL, EECONFIG_SD0 },
 	{ "mmc1", NULL, EECONFIG_SD1 },
 	{ "mmc2", NULL, EECONFIG_SD2 },
 	{ "mmc3", NULL, EECONFIG_SD3 },
-	{ "uart0", NULL, EECONFIG_UART0 },
-	{ "uart1", NULL, EECONFIG_UART1 },
-	{ "uart2", NULL, EECONFIG_UART2 },
-	{ "uart3", NULL, EECONFIG_UART3 },
-	{ "uart4", NULL, EECONFIG_UART4 },
-	{ "ipu0", NULL, EECONFIG_IPU0 },
-	{ "ipu1", NULL, EECONFIG_IPU1 },
-	{ "can0", NULL, EECONFIG_FLEXCAN },
-	{ "i2c0", NULL, EECONFIG_I2C0 },
-	{ "i2c1", NULL, EECONFIG_I2C1 },
-	{ "i2c2", NULL, EECONFIG_I2C2 },
-	{ "vpu", NULL, EECONFIG_VPU },
-	{ "csi0", NULL, EECONFIG_CSI0 },
-	{ "csi1", NULL, EECONFIG_CSI1 },
-	{ "spi0", NULL, EECONFIG_ESPCI0 },
-	{ "spi1", NULL, EECONFIG_ESPCI1 },
-	{ "spi2", NULL, EECONFIG_ESPCI2 },
-	{ "spi3", NULL, EECONFIG_ESPCI3 },
-	{ "spi4", NULL, EECONFIG_ESPCI4 },
-	{ "spi5", NULL, EECONFIG_ESPCI5 },
-	{ "gps", "pps", EECONFIG_GPS },
-	{ "hdmi_in", NULL, EECONFIG_HDMI_IN },
-	{ "hdmi_out", NULL, EECONFIG_HDMI_OUT },
-	{ "cvbs_in", NULL, EECONFIG_VID_IN },
-	{ "cvbs_out", NULL, EECONFIG_VID_OUT },
-	{ "nand", NULL, EECONFIG_NAND },
 	{ /* Sentinel */ }
 };
 

index 5a8bacd..2c3ac93 100644
@@ -316,6 +316,20 @@ static iomux_v3_cfg_t const gw552x_gpio_pads[] = {
 	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
 };
 
+static iomux_v3_cfg_t const gw553x_gpio_pads[] = {
+	/* PANLEDG# */
+	IOMUX_PADS(PAD_KEY_COL2__GPIO4_IO10 | DIO_PAD_CFG),
+	/* PANLEDR# */
+	IOMUX_PADS(PAD_KEY_ROW2__GPIO4_IO11 | DIO_PAD_CFG),
+
+	/* VID_PWR */
+	IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG),
+	/* PCI_RST# */
+	IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),
+	/* PCIESKT_WDIS# */
+	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
+};
+
 
 /*
  * Board Specific GPIO

@@ -613,6 +627,46 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.wdis = IMX_GPIO_NR(7, 12),
 		.msata_en = GP_MSATA_SEL,
 	},
+
+	/* GW553x */
+	{
+		.gpio_pads = gw553x_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw553x_gpio_pads)/2,
+		.dio_cfg = {
+			{
+				{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
+				IMX_GPIO_NR(1, 16),
+				{ 0, 0 },
+				0
+			},
+			{
+				{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
+				IMX_GPIO_NR(1, 19),
+				{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
+				2
+			},
+			{
+				{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
+				IMX_GPIO_NR(1, 17),
+				{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
+				3
+			},
+			{
+				{ IOMUX_PADS(PAD_SD1_CMD__GPIO1_IO18) },
+				IMX_GPIO_NR(1, 18),
+				{ IOMUX_PADS(PAD_SD1_CMD__PWM4_OUT) },
+				4
+			},
+		},
+		.num_gpios = 4,
+		.leds = {
+			IMX_GPIO_NR(4, 10),
+			IMX_GPIO_NR(4, 11),
+		},
+		.pcie_rst = IMX_GPIO_NR(1, 0),
+		.vidin_en = IMX_GPIO_NR(5, 20),
+		.wdis = IMX_GPIO_NR(7, 12),
+	},
 };
 
 void setup_iomux_gpio(int board, struct ventana_board_info *info)

index e86c98e..1382e5d 100644
@@ -87,6 +87,9 @@ read_eeprom(int bus, struct ventana_board_info *info)
 		} else if (info->model[4] == '2') {
 			type = GW552x;
 			break;
+		} else if (info->model[4] == '3') {
+			type = GW553x;
+			break;
 		}
 		/* fall through */
 	default:

index 042f55a..2ca6d5c 100644
@@ -117,7 +117,8 @@ int gsc_info(int verbose)
 	read_hwmon("VDD_HIGH", GSC_HWMON_VDD_HIGH, 3);
 	read_hwmon("VDD_DDR",  GSC_HWMON_VDD_DDR, 3);
 	read_hwmon("VDD_5P0",  GSC_HWMON_VDD_5P0, 3);
-	read_hwmon("VDD_2P5",  GSC_HWMON_VDD_2P5, 3);
+	if (strncasecmp((const char*) ventana_info.model, "GW553", 5))
+		read_hwmon("VDD_2P5",  GSC_HWMON_VDD_2P5, 3);
 	read_hwmon("VDD_1P8",  GSC_HWMON_VDD_1P8, 3);
 	read_hwmon("VDD_IO2",  GSC_HWMON_VDD_IO2, 3);
 	switch (ventana_info.model[3]) {

index feb2df8..15e4bf1 100644
@@ -267,7 +267,9 @@ int board_phy_config(struct phy_device *phydev)
 int board_eth_init(bd_t *bis)
 {
 #ifdef CONFIG_FEC_MXC
-	if (board_type != GW551x && board_type != GW552x) {
+	struct ventana_board_info *info = &ventana_info;
+
+	if (test_bit(EECONFIG_ETH0, info->config)) {
 		setup_iomux_enet(GP_PHY_RST);
 		cpu_eth_init(bis);
 	}

@@ -699,7 +701,9 @@ int misc_init_r(void)
 			setenv("model_base", str);
 			sprintf(fdt, "%s-%s.dtb", cputype, str);
 			setenv("fdt_file1", fdt);
-			if (board_type != GW551x && board_type != GW552x)
+			if (board_type != GW551x &&
+			    board_type != GW552x &&
+			    board_type != GW553x)
 				str[4] = 'x';
 			str[5] = 'x';
 			str[6] = 0;

index daff375..9ffad58 100644
@@ -111,6 +111,7 @@ enum {
 	GW54xx,
 	GW551x,
 	GW552x,
+	GW553x,
 	GW_UNKNOWN,
 	GW_BADCRC,
 };

index 2c3ac93..929dde9 100644
@@ -134,6 +134,8 @@ void setup_ventana_i2c(void)
 static iomux_v3_cfg_t const gw_gpio_pads[] = {
 	/* RS232_EN# */
 	IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
+	/* SD3_VSELECT */
+	IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
 };
 
 /* prototype */

@@ -766,6 +768,11 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
 		gpio_request(gpio_cfg[board].wdis, "wlan_dis");
 		gpio_direction_output(gpio_cfg[board].wdis, 1);
 	}
+
+	/* sense vselect pin to see if we support uhs-i */
+	gpio_request(GP_SD3_VSELECT, "sd3_vselect");
+	gpio_direction_input(GP_SD3_VSELECT);
+	gpio_cfg[board].usd_vsel = !gpio_get_value(GP_SD3_VSELECT);
 }
 
 /* setup GPIO pinmux and default configuration per baseboard and env */

index 58ad5ff..d037767 100644
@@ -17,6 +17,7 @@
 #define GP_SD3_CD	IMX_GPIO_NR(7, 0)
 #define GP_RS232_EN	IMX_GPIO_NR(2, 11)
 #define GP_MSATA_SEL	IMX_GPIO_NR(2, 8)
+#define GP_SD3_VSELECT	IMX_GPIO_NR(6, 14)
 
 #define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |		\
 	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |		\

@@ -77,6 +78,7 @@ struct ventana {
 	int usb_sel;
 	int wdis;
 	int msata_en;
+	bool usd_vsel;
 };
 
 extern struct ventana gpio_cfg[GW_UNKNOWN];

index 15e4bf1..82313e8 100644
@@ -60,8 +60,7 @@ static iomux_v3_cfg_t const usdhc3_pads[] = {
 	IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 	IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 	IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-	/* CD */
-	IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00  | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 };
 
 /* ENET */

@@ -792,6 +791,17 @@ static inline void ft_enable_path(void *blob, const char *path)
 	}
 }
 
+/* remove a property of a node if the node is found */
+static inline void ft_delprop_path(void *blob, const char *path,
+				   const char *name)
+{
+	int i = fdt_path_offset(blob, path);
+	if (i) {
+		debug("removing %s/%s\n", path, name);
+		fdt_delprop(blob, i, name);
+	}
+}
+
 /*
  * called prior to booting kernel or by 'fdt boardsetup' command
  *

@@ -895,6 +905,11 @@ int ft_board_setup(void *blob, bd_t *bd)
 				range[1] = cpu_to_fdt32(23);
 			}
 		}
+
+		/* these have broken usd_vsel */
+		if (strstr((const char *)info->model, "SP318-B") ||
+		    strstr((const char *)info->model, "SP331-B"))
+			gpio_cfg[board_type].usd_vsel = 0;
 	}
 
 	/*

@@ -954,6 +969,13 @@ int ft_board_setup(void *blob, bd_t *bd)
 		}
 	}
 
+	/* remove no-1-8-v if UHS-I support is present */
+	if (gpio_cfg[board_type].usd_vsel) {
+		debug("Enabling UHS-I support\n");
+		ft_delprop_path(blob, "/soc/aips-bus at 02100000/usdhc at 02198000",
+				"no-1-8-v");
+	}
+
 	/*
 	 * Peripheral Config:
 	 *  remove nodes by alias path if EEPROM config tells us the