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sunxi: mmc: increase status register polling rate for data transfers

PATCH Superseded Tobias Doerffel 2 participants 2 messages Jul 5, 2016 – Jul 8, 2016

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PATCH 1/1 sunxi: mmc: increase status register polling rate for data transfers

With a recent bunch of SD3.0 cards in our A20-based board we experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s with previous cards from the same vendor (both 4 GB/class 10). By increasing status register polling rate from 1 kHz to 1 MHz we were able to reach the original transfer rates again. With the old cards we now even reach about 16 MiB/s.

---
 drivers/mmc/sunxi_mmc.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)
drivers/mmc/sunxi_mmc.c +5 -5
index ce2dc4a..36da3b3 100644
@@ -269,18 +269,18 @@ static int mmc_trans_data_by_cpu(struct mmc *mmc, struct mmc_data *data)
 	unsigned i;
 	unsigned *buff = (unsigned int *)(reading ? data->dest : data->src);
 	unsigned byte_cnt = data->blocksize * data->blocks;
-	unsigned timeout_msecs = byte_cnt >> 8;
-	if (timeout_msecs < 2000)
-		timeout_msecs = 2000;
+	unsigned timeout_usecs = ( byte_cnt >> 8 ) * 1000;
+	if (timeout_usecs < 2000000)
+		timeout_usecs = 2000000;
 
 	/* Always read / write data through the CPU */
 	setbits_le32(&mmchost->reg->gctrl, SUNXI_MMC_GCTRL_ACCESS_BY_AHB);
 
 	for (i = 0; i < (byte_cnt >> 2); i++) {
 		while (readl(&mmchost->reg->status) & status_bit) {
-			if (!timeout_msecs--)
+			if (!timeout_usecs--)
 				return -1;
-			udelay(1000);
+			udelay(1);
 		}
 
 		if (reading)
Signature · 1 line
2.1.4
#1 lore raw

PATCH 1/1 sunxi: mmc: increase status register polling rate for data transfers

Hi Tobias,

Quoted 17 lines · Tobias Doerffel

With a recent bunch of SD3.0 cards in our A20-based board we experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s with previous cards from the same vendor (both 4 GB/class 10). By increasing status register polling rate from 1 kHz to 1 MHz we were able to reach the original transfer rates again. With the old cards we now even reach about 16 MiB/s.

---
 drivers/mmc/sunxi_mmc.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)
drivers/mmc/sunxi_mmc.c +0 -0
index ce2dc4a..36da3b3 100644

drivers/mmc/sunxi_mmc.c static int mmc_trans_data_by_cpu(struct mmc *mmc, struct mmc_data *data) · line 272

Quoted 7 lines
drivers/mmc/sunxi_mmc.c +1 -3
@@ -269,18 +269,18 @@ static int mmc_trans_data_by_cpu(struct mmc *mmc, struct mmc_data *data)
 	unsigned i;
 	unsigned *buff = (unsigned int *)(reading ? data->dest : data->src);
 	unsigned byte_cnt = data->blocksize * data->blocks;
-	unsigned timeout_msecs = byte_cnt >> 8;
-	if (timeout_msecs < 2000)
-		timeout_msecs = 2000;
+	unsigned timeout_usecs = ( byte_cnt >> 8 ) * 1000;

ERROR: space prohibited after that open parenthesis '(' #31: FILE: drivers/mmc/sunxi_mmc.c:272:
+ unsigned timeout_usecs = ( byte_cnt >> 8 ) * 1000;

ERROR: space prohibited before that close parenthesis ')' #31: FILE: drivers/mmc/sunxi_mmc.c:272:
+ unsigned timeout_usecs = ( byte_cnt >> 8 ) * 1000;

Best Regards,
Jaehoon Chung

Quoted 17 lines
drivers/mmc/sunxi_mmc.c +4 -2
+	if (timeout_usecs < 2000000)
+		timeout_usecs = 2000000;
 
 	/* Always read / write data through the CPU */
 	setbits_le32(&mmchost->reg->gctrl, SUNXI_MMC_GCTRL_ACCESS_BY_AHB);
 
 	for (i = 0; i < (byte_cnt >> 2); i++) {
 		while (readl(&mmchost->reg->status) & status_bit) {
-			if (!timeout_msecs--)
+			if (!timeout_usecs--)
 				return -1;
-			udelay(1000);
+			udelay(1);
 		}
 
 		if (reading)