rockchip: add the support for evb-rk3288 board

evb-3288 board RK3288-based development board with 2 USB ports, HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet. It also includes on-board 8G eMMC and 2GB of SDRAM. Expansion connector provide access to display pins, I2C, SPI, UART and GPIOs. This add some basic files required to allow the board to output serial messaged and can run command(mmc info etc).

evb-rk3288 also supports booting from eMMC or SD card, the default is eMMC.

Signed-off-by Ziyuan Xu <[email protected]>

---

  arch/arm/dts/Makefile                     |   1 +
  arch/arm/dts/rk3288-evb.dts               |  59 +++++
  arch/arm/dts/rk3288-evb.dtsi              | 379 ++++++++++++++++++++++++++++++
  arch/arm/mach-rockchip/rk3288-board-spl.c |   4 +-
  arch/arm/mach-rockchip/rk3288/Kconfig     |  10 +
  board/evb-rk3288/evb-rk3288/Kconfig       |  15 ++
  board/evb-rk3288/evb-rk3288/MAINTAINERS   |   6 +
  board/evb-rk3288/evb-rk3288/Makefile      |   7 +
  board/evb-rk3288/evb-rk3288/evb-rk3288.c  |  15 ++
  configs/evb-rk3288_defconfig              |  67 ++++++
  doc/README.rockchip                       |   3 +-
  include/configs/evb-rk3288.h              |  26 ++
  12 files changed, 590 insertions(+), 2 deletions(-)

create mode 100644 arch/arm/dts/rk3288-evb.dts create mode 100644 arch/arm/dts/rk3288-evb.dtsi create mode 100644 board/evb-rk3288/evb-rk3288/Kconfig create mode 100644 board/evb-rk3288/evb-rk3288/MAINTAINERS create mode 100644 board/evb-rk3288/evb-rk3288/Makefile create mode 100644 board/evb-rk3288/evb-rk3288/evb-rk3288.c create mode 100644 configs/evb-rk3288_defconfig create mode 100644 include/configs/evb-rk3288.h

arch/arm/dts/Makefile +1 -0

index 5d463ce..493b9da 100644
@@ -31,6 +31,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
  	rk3288-firefly.dtb \
  	rk3288-jerry.dtb \
  	rk3288-rock2-square.dtb \
+	rk3288-evb.dtb \
  	rk3036-sdk.dtb
  dtb-$(CONFIG_ARCH_MESON) += \
  	meson-gxbb-odroidc2.dtb

arch/arm/dts/rk3288-evb.dts new file +59 -0

new file mode 100644
index 0000000..caf24ee
@@ -0,0 +1,59 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+ X11
+ */
+
+/dts-v1/;
+#include "rk3288-evb.dtsi"
+
+/ {
+	model = "Evb-RK3288";
+	compatible = "evb-rk3288,evb-rk3288", "rockchip,rk3288";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+};
+
+&dmc {
+	rockchip,num-channels = <2>;
+	rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
+		0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6
+		0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0
+		0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4
+		0x8 0x1f4>;
+	rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076
+		0x0 0xc3 0x6 0x2>;
+	rockchip,sdram-channel = /bits/ 8 <0x2 0xa 0x3 0x2 0x2 0x0 0xe 0xe>;
+	rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 0>;
+};
+
+&pinctrl {
+	u-boot,dm-pre-reloc;
+};
+
+&pwm1 {
+	status = "okay";
+};
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+	reg-shift = <2>;
+};
+
+&sdmmc {
+	u-boot,dm-pre-reloc;
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};
+
+&gpio3 {
+	u-boot,dm-pre-reloc;
+};
+
+&gpio8 {
+	u-boot,dm-pre-reloc;
+};

arch/arm/dts/rk3288-evb.dtsi new file +379 -0

new file mode 100644
index 0000000..cb7d03e
@@ -0,0 +1,379 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+ X11
+ */
+
+#include "rk3288.dtsi"
+
+/ {
+	memory {
+		reg = <0 0x80000000>;
+	};
+
+	keys: gpio-keys {
+		compatible = "gpio-keys";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		button at 0 {
+			gpio-key,wakeup = <1>;
+			gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+			label = "GPIO Power";
+			linux,code = <116>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pwr_key>;
+		};
+	};
+
+	vcc_sys: vsys-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_sys";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	vcc_flash: flash-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_flash";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vcc_5v: usb-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc_sys>;
+	};
+
+	vcc_host_5v: usb-host-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host_vbus_drv>;
+		regulator-name = "vcc_host_5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		vin-supply = <&vcc_5v>;
+	};
+
+	vcc_otg_5v: usb-otg-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_vbus_drv>;
+		regulator-name = "vcc_otg_5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		vin-supply = <&vcc_5v>;
+	};
+};
+
+&cpu0 {
+	cpu0-supply = <&vdd_cpu>;
+};
+
+&emmc {
+	broken-cd;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
+	vmmc-supply = <&vcc_io>;
+	vqmmc-supply = <&vcc_flash>;
+	status = "okay";
+};
+
+&hdmi {
+	ddc-i2c-bus = <&i2c5>;
+	status = "okay";
+};
+
+&i2c0 {
+	clock-frequency = <400000>;
+	status = "okay";
+
+	vdd_cpu: syr827 at 40 {
+		compatible = "silergy,syr827";
+		fcs,suspend-voltage-selector = <1>;
+		reg = <0x40>;
+		regulator-name = "vdd_cpu";
+		regulator-min-microvolt = <850000>;
+		regulator-max-microvolt = <1350000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc_sys>;
+	};
+
+	vdd_gpu: syr828 at 41 {
+		compatible = "silergy,syr828";
+		fcs,suspend-voltage-selector = <1>;
+		reg = <0x41>;
+		regulator-name = "vdd_gpu";
+		regulator-min-microvolt = <850000>;
+		regulator-max-microvolt = <1350000>;
+		regulator-always-on;
+		vin-supply = <&vcc_sys>;
+	};
+
+	hym8563: hym8563 at 51 {
+		compatible = "haoyu,hym8563";
+		reg = <0x51>;
+		#clock-cells = <0>;
+		clock-frequency = <32768>;
+		clock-output-names = "xin32k";
+		interrupt-parent = <&gpio7>;
+		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&rtc_int>;
+	};
+
+	act8846: act8846 at 5a {
+		compatible = "active-semi,act8846";
+		reg = <0x5a>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwr_hold>;
+		system-power-controller;
+
+		regulators {
+			vcc_ddr: REG1 {
+				regulator-name = "vcc_ddr";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
+				regulator-always-on;
+			};
+
+			vcc_io: REG2 {
+				regulator-name = "vcc_io";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vdd_log: REG3 {
+				regulator-name = "vdd_log";
+				regulator-min-microvolt = <1100000>;
+				regulator-max-microvolt = <1100000>;
+				regulator-always-on;
+			};
+
+			vcc_20: REG4 {
+				regulator-name = "vcc_20";
+				regulator-min-microvolt = <2000000>;
+				regulator-max-microvolt = <2000000>;
+				regulator-always-on;
+			};
+
+			vccio_sd: REG5 {
+				regulator-name = "vccio_sd";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vdd10_lcd: REG6 {
+				regulator-name = "vdd10_lcd";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-always-on;
+			};
+
+			vcca_codec: REG7 {
+				regulator-name = "vcca_codec";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			vcc_tp: REG8 {
+				regulator-name = "vcca_33";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			vccio_pmu: REG9 {
+				regulator-name = "vccio_pmu";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			vdd_10: REG10 {
+				regulator-name = "vdd_10";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-always-on;
+			};
+
+			vcc_18: REG11 {
+				regulator-name = "vcc_18";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+			};
+
+			vcc18_lcd: REG12 {
+				regulator-name = "vcc18_lcd";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+			};
+		};
+	};
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2c4 {
+	status = "okay";
+};
+
+&i2c5 {
+	status = "okay";
+};
+
+&pinctrl {
+	pcfg_output_high: pcfg-output-high {
+		output-high;
+	};
+
+	pcfg_output_low: pcfg-output-low {
+		output-low;
+	};
+
+	act8846 {
+		pwr_hold: pwr-hold {
+			rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_output_high>;
+		};
+	};
+
+	hym8563 {
+		rtc_int: rtc-int {
+			rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	keys {
+		pwr_key: pwr-key {
+			rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	sdmmc {
+		sdmmc_pwr: sdmmc-pwr {
+			rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb_host {
+		host_vbus_drv: host-vbus-drv {
+			rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb_otg {
+		otg_vbus_drv: otg-vbus-drv {
+			rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&saradc {
+	vref-supply = <&vcc_18>;
+	status = "okay";
+};
+
+&sdio0 {
+	broken-cd;
+	bus-width = <4>;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>;
+	vmmc-supply = <&vcc_18>;
+	status = "disabled";
+};
+
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	card-detect-delay = <200>;
+	disable-wp;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
+	vmmc-supply = <&vccio_sd>;
+	status = "okay";
+};
+
+&spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_clk>, <&spi0_cs0>, <&spi0_tx>, <&spi0_rx>, <&spi0_cs1>;
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&uart3 {
+	status = "okay";
+};
+
+&usb_host1 {
+	status = "okay";
+};
+
+&usb_otg {
+	status = "okay";
+};
+
+&vopb {
+	status = "okay";
+};
+
+&vopb_mmu {
+	status = "okay";
+};
+
+&vopl {
+	status = "okay";
+};
+
+&vopl_mmu {
+	status = "okay";
+};
+
+&wdt {
+	status = "okay";
+};

arch/arm/mach-rockchip/rk3288-board-spl.c +3 -1

index 15f1266..773ea42 100644
@@ -114,7 +114,9 @@ static void configure_l2ctlr(void)
  #ifdef CONFIG_SPL_MMC_SUPPORT
  static int configure_emmc(struct udevice *pinctrl)
  {
-#if !defined(CONFIG_TARGET_ROCK2) && !defined(CONFIG_TARGET_FIREFLY_RK3288)
+#if !defined(CONFIG_TARGET_ROCK2) && !defined(CONFIG_TARGET_FIREFLY_RK3288) && \
+	!defined(CONFIG_TARGET_EVB_RK3288)
+
  	struct gpio_desc desc;
  	int ret;
 

arch/arm/mach-rockchip/rk3288/Kconfig +10 -0

index 7215624..031dbfc 100644
@@ -8,6 +8,14 @@ config TARGET_FIREFLY_RK3288
  	  also includes on-board eMMC and 1GB of SDRAM. Expansion connectors
  	  provide access to display pins, I2C, SPI, UART and GPIOs.
 
+config TARGET_EVB_RK3288
+	bool "Evb-RK3288"
+	help
+	  EVB-RK3288 is a RK3288-based development board with 2 USB ports,
+	  HDMI, VGA, micro-SD card, audio, WiFi  and Gigabit Ethernet, It
+	  also includes on-board eMMC and 2GB of SDRAM. Expansion connectors
+	  provide access to display pins, I2C, SPI, UART and GPIOs.
+
  config TARGET_CHROMEBOOK_JERRY
  	bool "Google/Rockchip Veyron-Jerry Chromebook"
  	help

@@ -45,4 +53,6 @@ source "board/firefly/firefly-rk3288/Kconfig"
 
  source "board/radxa/rock2/Kconfig"
 
+source "board/evb-rk3288/evb-rk3288/Kconfig"
+
  endif

board/evb-rk3288/evb-rk3288/Kconfig new file +15 -0

new file mode 100644
index 0000000..b201acb
@@ -0,0 +1,15 @@
+if TARGET_EVB_RK3288
+
+config SYS_BOARD
+	default "evb-rk3288"
+
+config SYS_VENDOR
+	default "evb-rk3288"
+
+config SYS_CONFIG_NAME
+	default "evb-rk3288"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif

board/evb-rk3288/evb-rk3288/MAINTAINERS new file +6 -0

new file mode 100644
index 0000000..222c254
@@ -0,0 +1,6 @@
+EVB-RK3288
+M:	Lin Huang <[email protected]>
+S:	Maintained
+F:	board/evb-rk3288/evb-rk3288
+F:	include/configs/evb-rk3288.h
+F:	configs/evb-rk3288_defconfig

board/evb-rk3288/evb-rk3288/Makefile new file +7 -0

new file mode 100644
index 0000000..c11b657
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2016 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= evb-rk3288.o

board/evb-rk3288/evb-rk3288/evb-rk3288.c new file +15 -0

new file mode 100644
index 0000000..a82f0ae
@@ -0,0 +1,15 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <spl.h>
+
+void board_boot_order(u32 *spl_boot_list)
+{
+	/* eMMC prior to sdcard. */
+	spl_boot_list[0] = BOOT_DEVICE_MMC2;
+	spl_boot_list[1] = BOOT_DEVICE_MMC1;
+}

configs/evb-rk3288_defconfig new file +67 -0

new file mode 100644
index 0000000..41cfedd
@@ -0,0 +1,67 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3288=y
+CONFIG_TARGET_EVB_RK3288=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb"
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_SYSRESET=y
+CONFIG_DM_MMC=y
+CONFIG_ROCKCHIP_DWMMC=y
+CONFIG_PINCTRL=y
+# CONFIG_PINCTRL_FULL is not set
+CONFIG_SPL_PINCTRL=y
+# CONFIG_SPL_PINCTRL_FULL is not set
+CONFIG_ROCKCHIP_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_ACT8846=y
+CONFIG_DM_REGULATOR=y
+CONFIG_REGULATOR_ACT8846=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BASE=0xff690000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_ERRNO_STR=y

doc/README.rockchip +2 -1

index e0572c8..f4e8348 100644
@@ -36,11 +36,12 @@ You will need:
  Building
  ========
 
-At present three RK3288 boards are supported:
+At present four RK3288 boards are supported:
 
     - Firefly RK3288 - use firefly-rk3288 configuration
     - Radxa Rock 2 - use rock2 configuration
     - Hisense Chromebook - use chromebook_jerry configuration
+   - EVB RK3288 - use evb-rk3288 configuration
 
  Two RK3036 board are supported:
 

include/configs/evb-rk3288.h new file +26 -0

new file mode 100644
index 0000000..342557f
@@ -0,0 +1,26 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define ROCKCHIP_DEVICE_SETTINGS
+#include <configs/rk3288_common.h>
+
+#define CONFIG_SPL_MMC_SUPPORT
+
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 1
+/* SPL @ 32k for ~36k
+ * ENV @ 96k
+ * u-boot @ 128K
+ */
+#define CONFIG_ENV_OFFSET (96 * 1024)
+
+#define CONFIG_SYS_WHITE_ON_BLACK
+#define CONFIG_CONSOLE_SCROLL_LINES		10
+
+#endif

evb-3288 board RK3288-based development board with 2 USB ports, HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet. It also includes on-board 8G eMMC and 2GB of SDRAM. Expansion connector provide access to display pins, I2C, SPI, UART and GPIOs. This add some basic files required to allow the board to output serial messaged and can run command(mmc info etc).

evb-rk3288 also supports booting from eMMC or SD card, the default is eMMC.

Signed-off-by Ziyuan Xu <[email protected]>

---

 arch/arm/dts/Makefile                     |   1 +
 arch/arm/dts/rk3288-evb.dts               |  59 +++++
 arch/arm/dts/rk3288-evb.dtsi              | 379 ++++++++++++++++++++++++++++++
 arch/arm/mach-rockchip/rk3288-board-spl.c |   4 +-
 arch/arm/mach-rockchip/rk3288/Kconfig     |  10 +
 board/evb-rk3288/evb-rk3288/Kconfig       |  15 ++
 board/evb-rk3288/evb-rk3288/MAINTAINERS   |   6 +
 board/evb-rk3288/evb-rk3288/Makefile      |   7 +
 board/evb-rk3288/evb-rk3288/evb-rk3288.c  |  15 ++
 configs/evb-rk3288_defconfig              |  67 ++++++
 doc/README.rockchip                       |   3 +-
 include/configs/evb-rk3288.h              |  26 ++
 12 files changed, 590 insertions(+), 2 deletions(-)

 create mode 100644 arch/arm/dts/rk3288-evb.dts
 create mode 100644 arch/arm/dts/rk3288-evb.dtsi
 create mode 100644 board/evb-rk3288/evb-rk3288/Kconfig
 create mode 100644 board/evb-rk3288/evb-rk3288/MAINTAINERS
 create mode 100644 board/evb-rk3288/evb-rk3288/Makefile
 create mode 100644 board/evb-rk3288/evb-rk3288/evb-rk3288.c
 create mode 100644 configs/evb-rk3288_defconfig
 create mode 100644 include/configs/evb-rk3288.h

board/evb-rk3288/evb-rk3288/evb-rk3288.c new file +2 -0

new file mode 100644
index 0000000..a82f0ae
@@ -0,0 +1,15 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd

Quoted 26 lines · Ziyuan Xu

evb-3288 board RK3288-based development board with 2 USB ports, HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet. It also includes on-board 8G eMMC and 2GB of SDRAM. Expansion connector provide access to display pins, I2C, SPI, UART and GPIOs. This add some basic files required to allow the board to output serial messaged and can run command(mmc info etc).

evb-rk3288 also supports booting from eMMC or SD card, the default is eMMC.

Signed-off-by Ziyuan Xu <[email protected]>

---

  arch/arm/dts/Makefile                     |   1 +
  arch/arm/dts/rk3288-evb.dts               |  59 +++++
  arch/arm/dts/rk3288-evb.dtsi              | 379 ++++++++++++++++++++++++++++++
  arch/arm/mach-rockchip/rk3288-board-spl.c |   4 +-
  arch/arm/mach-rockchip/rk3288/Kconfig     |  10 +
  board/evb-rk3288/evb-rk3288/Kconfig       |  15 ++
  board/evb-rk3288/evb-rk3288/MAINTAINERS   |   6 +
  board/evb-rk3288/evb-rk3288/Makefile      |   7 +
  board/evb-rk3288/evb-rk3288/evb-rk3288.c  |  15 ++
  configs/evb-rk3288_defconfig              |  67 ++++++
  doc/README.rockchip                       |   3 +-
  include/configs/evb-rk3288.h              |  26 ++
  12 files changed, 590 insertions(+), 2 deletions(-)

Quoted 9 lines

create mode 100644 arch/arm/dts/rk3288-evb.dts create mode 100644 arch/arm/dts/rk3288-evb.dtsi create mode 100644 board/evb-rk3288/evb-rk3288/Kconfig create mode 100644 board/evb-rk3288/evb-rk3288/MAINTAINERS create mode 100644 board/evb-rk3288/evb-rk3288/Makefile create mode 100644 board/evb-rk3288/evb-rk3288/evb-rk3288.c create mode 100644 configs/evb-rk3288_defconfig create mode 100644 include/configs/evb-rk3288.h

Reviewed-by Simon Glass <[email protected]>

small nit below.

[snip]

Quoted 11 lines

board/evb-rk3288/evb-rk3288/evb-rk3288.c new file +5 -0

new file mode 100644
index 0000000..a82f0ae
@@ -0,0 +1,15 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */

board/evb-rk3288/evb-rk3288/evb-rk3288.c line 12

Quoted 7 lines

board/evb-rk3288/evb-rk3288/evb-rk3288.c new file +7 -0

+
+#include <common.h>
+#include <spl.h>
+
+void board_boot_order(u32 *spl_boot_list)
+{
+       /* eMMC prior to sdcard. */

nit: Can you drop the .?

board/evb-rk3288/evb-rk3288/evb-rk3288.c line 15

Quoted 4 lines

board/evb-rk3288/evb-rk3288/evb-rk3288.c new file +3 -0

+       spl_boot_list[0] = BOOT_DEVICE_MMC2;
+       spl_boot_list[1] = BOOT_DEVICE_MMC1;
+}

snip]

Regards,
Simon