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spi s3c64xx ioclk handling

PATCH New Andi Shyti 6 participants 18 messages Jul 12, 2016 – Jul 18, 2016

Subsystems (6)
Device tree bindings Common clk SPI Arm Samsung Exynos +2 more subsystems
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Andi Shyti

author
#0 lore raw

v3 cover spi s3c64xx ioclk handling

Hi,

this patchset improves the compatibility between the s3c64xx driver and the exynos5433. One point of incompatibility, indeed, was that the SPI controller in exynos5433 is fed by three clocks which need to be handled by the driver. The third clock is the ioclk which support is the main purpose of this patchset.

The last patch was first sent on its own and it was its 5th version, it has been queued to this patchset as there is a dependency with it.

Changelog V1 -> V2:

- patch 1: the exynos5433-spi compatible is placed in alphabetical order compared to exynos7-spi

- patch 1: deprecates exynos7-spi

- patch 2: [new] added the clocks and clock-name documentation in the bindings

- patch 3: fixed some typos, renamed the goto label from err_power_off to err_pm_put add the reviewd-by Krzysztof

- patch 4: new patch

- patch 5: fixed typos in commit message and use low letters for hex numbers

- patch 6: removed one line of comment

- patch 7: added to ensure sequentiality.

Changelog V2 -> V3

- patch 2: reworded the property descriptions

- patch 6: reworded the added comment

- added on all the patches the proper reviewed and acks

Thanks,
Andi

Andi Shyti (7):
bindings: spi-samsung: add exynos5433 spi compatible
bindings: spi-samsung: document the clocks and the clock-name property
spi: s3c64xx: rename goto labels to meaningful names
spi: s3c64xx: use error code from clk_prepare_enable()
spi: s3c64xx: add Exynos5433 compatible for ioclk handling
spi: s3c64xx: restore removed comments
clk: exynos5433: remove CLK_IGNORE_UNUSED flag from SPI clocks

 .../devicetree/bindings/spi/spi-samsung.txt        | 12 ++-
 drivers/clk/samsung/clk-exynos5433.c               |  5 +-
 drivers/spi/spi-s3c64xx.c                          | 90 +++++++++++++++++-----
 3 files changed, 82 insertions(+), 25 deletions(-)
Signature · 1 line
2.8.1
author
#1 lore raw

PATCH v3 1/7 bindings: spi-samsung: add exynos5433 spi compatible

The samsung,exynos5433-spi has some peculiarities that bring the need of creating a new compatible in the binding.

One of those is the 3-clocks controller management where the spi is fed with three clocks: "spi", "busclkN" and "ioclk".

By adding the exynos5433-spi, we deprecate the exynos7 compatible and discourage its use.

Signed-off-by Andi Shyti <[email protected]>
Reviewed-by Michael Turquette <[email protected]>
Reviewed-by Krzysztof Kozlowski <[email protected]>
Reviewed-by Sylwester Nawrocki <[email protected]>
---
 Documentation/devicetree/bindings/spi/spi-samsung.txt | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/spi/spi-samsung.txt +2 -1
index 6dbdeb3..57d5539 100644
@@ -9,7 +9,8 @@ Required SoC Specific Properties:
     - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
     - samsung,s3c6410-spi: for s3c6410 platforms
     - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
-    - samsung,exynos7-spi: for exynos7 platforms
+    - samsung,exynos5433-spi: for exynos5433 compatible controllers
+    - samsung,exynos7-spi: for exynos7 platforms <DEPRECATED>
 
 - reg: physical base address of the controller and length of memory mapped
   region.
Signature · 1 line
2.8.1
maintainer
#2 lore raw

PATCH v3 1/7 bindings: spi-samsung: add exynos5433 spi compatible

Quoted 2 lines · Andi Shyti

The samsung,exynos5433-spi has some peculiarities that bring the need of creating a new compatible in the binding.

Please submit patches using subject lines reflecting the style for the
subsystem. This makes it easier for people to identify relevant
patches.
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maintainer
#3 lore raw

PATCH v3 1/7 bindings: spi-samsung: add exynos5433 spi compatible

In reply to Andi Shyti
Quoted 9 lines · Andi Shyti

The samsung,exynos5433-spi has some peculiarities that bring the need of creating a new compatible in the binding.

One of those is the 3-clocks controller management where the spi is fed with three clocks: "spi", "busclkN" and "ioclk".

By adding the exynos5433-spi, we deprecate the exynos7 compatible and discourage its use.

Quoted 7 lines
Signed-off-by Andi Shyti <[email protected]>
Reviewed-by Michael Turquette <[email protected]>
Reviewed-by Krzysztof Kozlowski <[email protected]>
Reviewed-by Sylwester Nawrocki <[email protected]>
---
 Documentation/devicetree/bindings/spi/spi-samsung.txt | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
Acked-by Rob Herring <[email protected]>
author
#4 lore raw

PATCH v3 2/7 bindings: spi-samsung: document the clocks and the clock-name property

In reply to Andi Shyti

These two properties were not documented but used in the spi dts. Add the related documentation.

Suggested-by Krzysztof Kozlowski <[email protected]>
Signed-off-by Andi Shyti <[email protected]>
Reviewed-by Michael Turquette <[email protected]>
Reviewed-by Krzysztof Kozlowski <[email protected]>
---
 Documentation/devicetree/bindings/spi/spi-samsung.txt | 9 +++++++++
 1 file changed, 9 insertions(+)
Documentation/devicetree/bindings/spi/spi-samsung.txt +9 -0
index 57d5539..f45c6eb 100644
@@ -24,6 +24,15 @@ Required SoC Specific Properties:
 - dma-names: Names for the dma channels. There must be at least one channel
   named "tx" for transmit and named "rx" for receive.
 
+- clocks: specifies the clock IDs provided to the SPI controller; they are
+  required for interacting with the controller itself, for synchronizing the bus
+  and as I/O clock (the latter is required by exynos5433 and exynos7).
+
+- clock-names: string names of the clocks in the 'clocks' property; for all the
+  the devices the names must be "spi", "spi_busclkN" (where N is determined by
+  "samsung,spi-src-clk"), while Exynos5433 should specify a third clock
+  "spi_ioclk" for the I/O clock.
+
 Required Board Specific Properties:
 
 - #address-cells: should be 1.
Signature · 1 line
2.8.1
maintainer
#5 lore raw

PATCH v3 2/7 bindings: spi-samsung: document the clocks and the clock-name property

Quoted 16 lines · Andi Shyti

These two properties were not documented but used in the spi dts. Add the related documentation.

Suggested-by Krzysztof Kozlowski <[email protected]>
Signed-off-by Andi Shyti <[email protected]>
Reviewed-by Michael Turquette <[email protected]>
Reviewed-by Krzysztof Kozlowski <[email protected]>
---
 Documentation/devicetree/bindings/spi/spi-samsung.txt | 9 +++++++++
 1 file changed, 9 insertions(+)
Documentation/devicetree/bindings/spi/spi-samsung.txt +0 -0
index 57d5539..f45c6eb 100644

Documentation/devicetree/bindings/spi/spi-samsung.txt Required SoC Specific Properties: · line 33

Quoted 10 lines
Documentation/devicetree/bindings/spi/spi-samsung.txt +7 -0
@@ -24,6 +24,15 @@ Required SoC Specific Properties:
 - dma-names: Names for the dma channels. There must be at least one channel
   named "tx" for transmit and named "rx" for receive.
 
+- clocks: specifies the clock IDs provided to the SPI controller; they are
+  required for interacting with the controller itself, for synchronizing the bus
+  and as I/O clock (the latter is required by exynos5433 and exynos7).
+
+- clock-names: string names of the clocks in the 'clocks' property; for all the
+  the devices the names must be "spi", "spi_busclkN" (where N is determined by
+  "samsung,spi-src-clk"), while Exynos5433 should specify a third clock

This sounds like you are describing the configuration of the clocks, not the connections. The binding here should list clocks for all possible vaules of N as those are all the input clocks to the block.

Quoted 8 lines
Documentation/devicetree/bindings/spi/spi-samsung.txt +2 -0
+  "spi_ioclk" for the I/O clock.
+
 Required Board Specific Properties:
 
 - #address-cells: should be 1.
Signature · 1 line
2.8.1
maintainer
#6 lore raw

PATCH v3 2/7 bindings: spi-samsung: document the clocks and the clock-name property

Quoted 9 lines · Rob Herring
Quoted 9 lines
Documentation/devicetree/bindings/spi/spi-samsung.txt +0 -0
Quoted 7 lines

index 57d5539..f45c6eb 100644

Documentation/devicetree/bindings/spi/spi-samsung.txt +0 -0
@@ -24,6 +24,15 @@ Required SoC Specific Properties:
 - dma-names: Names for the dma channels. There must be at least one channel
   named "tx" for transmit and named "rx" for receive.
Quoted 13 lines
Quoted 7 lines

Documentation/devicetree/bindings/spi/spi-samsung.txt Required SoC Specific Properties: · line 33

Quoted 7 lines
Documentation/devicetree/bindings/spi/spi-samsung.txt +7 -0
+- clocks: specifies the clock IDs provided to the SPI controller; they are
+  required for interacting with the controller itself, for synchronizing the bus
+  and as I/O clock (the latter is required by exynos5433 and exynos7).
+
+- clock-names: string names of the clocks in the 'clocks' property; for all the
+  the devices the names must be "spi", "spi_busclkN" (where N is determined by
+  "samsung,spi-src-clk"), while Exynos5433 should specify a third clock

This sounds like you are describing the configuration of the clocks, not the connections. The binding here should list clocks for all possible vaules of N as those are all the input clocks to the block.

Quoted 1 line
Quoted 1 line
Documentation/devicetree/bindings/spi/spi-samsung.txt +1 -0
+  "spi_ioclk" for the I/O clock.

I agree we should list all possible spi_busclkN, I must admit I might have introduced some confusion by suggesting wording for clock-names similar to the above while discussing those things internally. Afterwards I came to a similar conclusion all possible input clocks should be listed These will differ depending on the compatible. I checked in documentation of most of related SoCs and for "samsung,s3c6410-spi" or older compatibles possible N is 0..2 (PCLK, USBCLK, PLL clock), for "samsung,s5pv210-spi" and newer possible N is 0 (SCLK_SPI).

It's important to have all the input clocks listed so we have a list of parent clocks to the SPI controller's internal clocks, should we ever decide to model them with the clk API.

--
Thanks,
Sylwester

author
#7 lore raw

PATCH v3 3/7 spi: s3c64xx: rename goto labels to meaningful names

In reply to Andi Shyti

The goto labels of the style of

err4:
err3:
err2:
err1:

are complex to insert in between new errors without renaming all the goto statements. Replace the errX naming style to meaningful names in order to make it easier to insert new goto exit points.

Signed-off-by Andi Shyti <[email protected]>
Reviewed-by Krzysztof Kozlowski <[email protected]>
Reviewed-by Michael Turquette <[email protected]>
---
 drivers/spi/spi-s3c64xx.c | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)
drivers/spi/spi-s3c64xx.c +12 -12
index 6f2e91a..0784a4d 100644
@@ -1071,7 +1071,7 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
 		if (ret < 0) {
 			dev_err(&pdev->dev, "failed to get alias id, errno %d\n",
 				ret);
-			goto err0;
+			goto err_deref_master;
 		}
 		sdd->port_id = ret;
 	} else {

@@ -1109,13 +1109,13 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
 	sdd->regs = devm_ioremap_resource(&pdev->dev, mem_res);
 	if (IS_ERR(sdd->regs)) {
 		ret = PTR_ERR(sdd->regs);
-		goto err0;
+		goto err_deref_master;
 	}
 
 	if (sci->cfg_gpio && sci->cfg_gpio()) {
 		dev_err(&pdev->dev, "Unable to config gpio\n");
 		ret = -EBUSY;
-		goto err0;
+		goto err_deref_master;
 	}
 
 	/* Setup clocks */

@@ -1123,13 +1123,13 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
 	if (IS_ERR(sdd->clk)) {
 		dev_err(&pdev->dev, "Unable to acquire clock 'spi'\n");
 		ret = PTR_ERR(sdd->clk);
-		goto err0;
+		goto err_deref_master;
 	}
 
 	if (clk_prepare_enable(sdd->clk)) {
 		dev_err(&pdev->dev, "Couldn't enable clock 'spi'\n");
 		ret = -EBUSY;
-		goto err0;
+		goto err_deref_master;
 	}
 
 	sprintf(clk_name, "spi_busclk%d", sci->src_clk_nr);

@@ -1138,13 +1138,13 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
 		dev_err(&pdev->dev,
 			"Unable to acquire clock '%s'\n", clk_name);
 		ret = PTR_ERR(sdd->src_clk);
-		goto err2;
+		goto err_disable_clk;
 	}
 
 	if (clk_prepare_enable(sdd->src_clk)) {
 		dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", clk_name);
 		ret = -EBUSY;
-		goto err2;
+		goto err_disable_clk;
 	}
 
 	pm_runtime_set_autosuspend_delay(&pdev->dev, AUTOSUSPEND_TIMEOUT);

@@ -1164,7 +1164,7 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
 	if (ret != 0) {
 		dev_err(&pdev->dev, "Failed to request IRQ %d: %d\n",
 			irq, ret);
-		goto err3;
+		goto err_pm_put;
 	}
 
 	writel(S3C64XX_SPI_INT_RX_OVERRUN_EN | S3C64XX_SPI_INT_RX_UNDERRUN_EN |

@@ -1174,7 +1174,7 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
 	ret = devm_spi_register_master(&pdev->dev, master);
 	if (ret != 0) {
 		dev_err(&pdev->dev, "cannot register SPI master: %d\n", ret);
-		goto err3;
+		goto err_pm_put;
 	}
 
 	dev_dbg(&pdev->dev, "Samsung SoC SPI Driver loaded for Bus SPI-%d with %d Slaves attached\n",

@@ -1188,15 +1188,15 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
 
 	return 0;
 
-err3:
+err_pm_put:
 	pm_runtime_put_noidle(&pdev->dev);
 	pm_runtime_disable(&pdev->dev);
 	pm_runtime_set_suspended(&pdev->dev);
 
 	clk_disable_unprepare(sdd->src_clk);
-err2:
+err_disable_clk:
 	clk_disable_unprepare(sdd->clk);
-err0:
+err_deref_master:
 	spi_master_put(master);
 
 	return ret;
Signature · 1 line
2.8.1
author
#8 lore raw

PATCH v3 4/7 spi: s3c64xx: use error code from clk_prepare_enable()

In reply to Andi Shyti

If clk_prepare_enable() fails do not return -EBUSY but use the value provided by the function itself.

Suggested-by Krzysztof Kozlowski <[email protected]>
Signed-off-by Andi Shyti <[email protected]>
Reviewed-by Michael Turquette <[email protected]>
Reviewed-by Krzysztof Kozlowski <[email protected]>
---
 drivers/spi/spi-s3c64xx.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
drivers/spi/spi-s3c64xx.c +4 -4
index 0784a4d..3a65adf 100644
@@ -1126,9 +1126,9 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
 		goto err_deref_master;
 	}
 
-	if (clk_prepare_enable(sdd->clk)) {
+	ret = clk_prepare_enable(sdd->clk);
+	if (ret) {
 		dev_err(&pdev->dev, "Couldn't enable clock 'spi'\n");
-		ret = -EBUSY;
 		goto err_deref_master;
 	}
 

@@ -1141,9 +1141,9 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
 		goto err_disable_clk;
 	}
 
-	if (clk_prepare_enable(sdd->src_clk)) {
+	ret = clk_prepare_enable(sdd->src_clk);
+	if (ret) {
 		dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", clk_name);
-		ret = -EBUSY;
 		goto err_disable_clk;
 	}
Signature · 1 line
2.8.1
author
#9 lore raw

PATCH v3 5/7 spi: s3c64xx: add Exynos5433 compatible for ioclk handling

In reply to Andi Shyti

The new compatible is related to the Samsung Exynos5433 SoC. The difference between the previous is that in the exynos5433 the SPI controller is driven by three clocks instead of only one.

The new clock (ioclk) is controlling the input/output clock whenever the controller is slave or master.

The presence of the clock line is detected from the compatibility structure (exynos5433_spi_port_config) as a boolean value.

The probe function checks whether the ioclk is present and if so, it acquires.

The runtime suspend and resume functions will handle the clock enabling and disabling as well.

Signed-off-by Andi Shyti <[email protected]>
Reviewed-by Michael Turquette <[email protected]>
Reviewed-by Krzysztof Kozlowski <[email protected]>
---
 drivers/spi/spi-s3c64xx.c | 57 ++++++++++++++++++++++++++++++++++++++++++-----
 1 file changed, 52 insertions(+), 5 deletions(-)
drivers/spi/spi-s3c64xx.c +52 -5
index 3a65adf..6da663f 100644
@@ -156,12 +156,14 @@ struct s3c64xx_spi_port_config {
 	int	quirks;
 	bool	high_speed;
 	bool	clk_from_cmu;
+	bool	clk_ioclk;
 };
 
 /**
  * struct s3c64xx_spi_driver_data - Runtime info holder for SPI driver.
  * @clk: Pointer to the spi clock.
  * @src_clk: Pointer to the clock used to generate SPI signals.
+ * @ioclk: Pointer to the i/o clock between master and slave
  * @master: Pointer to the SPI Protocol master.
  * @cntrlr_info: Platform specific data for the controller this driver manages.
  * @tgl_spi: Pointer to the last CS left untoggled by the cs_change hint.

@@ -181,6 +183,7 @@ struct s3c64xx_spi_driver_data {
 	void __iomem                    *regs;
 	struct clk                      *clk;
 	struct clk                      *src_clk;
+	struct clk                      *ioclk;
 	struct platform_device          *pdev;
 	struct spi_master               *master;
 	struct s3c64xx_spi_info  *cntrlr_info;

@@ -1147,6 +1150,21 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
 		goto err_disable_clk;
 	}
 
+	if (sdd->port_conf->clk_ioclk) {
+		sdd->ioclk = devm_clk_get(&pdev->dev, "spi_ioclk");
+		if (IS_ERR(sdd->ioclk)) {
+			dev_err(&pdev->dev, "Unable to acquire 'ioclk'\n");
+			ret = PTR_ERR(sdd->ioclk);
+			goto err_disable_src_clk;
+		}
+
+		ret = clk_prepare_enable(sdd->ioclk);
+		if (ret) {
+			dev_err(&pdev->dev, "Couldn't enable clock 'ioclk'\n");
+			goto err_disable_src_clk;
+		}
+	}
+
 	pm_runtime_set_autosuspend_delay(&pdev->dev, AUTOSUSPEND_TIMEOUT);
 	pm_runtime_use_autosuspend(&pdev->dev);
 	pm_runtime_set_active(&pdev->dev);

@@ -1193,6 +1211,8 @@ err_pm_put:
 	pm_runtime_disable(&pdev->dev);
 	pm_runtime_set_suspended(&pdev->dev);
 
+	clk_disable_unprepare(sdd->ioclk);
+err_disable_src_clk:
 	clk_disable_unprepare(sdd->src_clk);
 err_disable_clk:
 	clk_disable_unprepare(sdd->clk);

@@ -1211,6 +1231,8 @@ static int s3c64xx_spi_remove(struct platform_device *pdev)
 
 	writel(0, sdd->regs + S3C64XX_SPI_INT_EN);
 
+	clk_disable_unprepare(sdd->ioclk);
+
 	clk_disable_unprepare(sdd->src_clk);
 
 	clk_disable_unprepare(sdd->clk);

@@ -1269,6 +1291,7 @@ static int s3c64xx_spi_runtime_suspend(struct device *dev)
 
 	clk_disable_unprepare(sdd->clk);
 	clk_disable_unprepare(sdd->src_clk);
+	clk_disable_unprepare(sdd->ioclk);
 
 	return 0;
 }

@@ -1279,17 +1302,28 @@ static int s3c64xx_spi_runtime_resume(struct device *dev)
 	struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
 	int ret;
 
+	if (sdd->port_conf->clk_ioclk) {
+		ret = clk_prepare_enable(sdd->ioclk);
+		if (ret != 0)
+			return ret;
+	}
+
 	ret = clk_prepare_enable(sdd->src_clk);
 	if (ret != 0)
-		return ret;
+		goto err_disable_ioclk;
 
 	ret = clk_prepare_enable(sdd->clk);
-	if (ret != 0) {
-		clk_disable_unprepare(sdd->src_clk);
-		return ret;
-	}
+	if (ret != 0)
+		goto err_disable_src_clk;
 
 	return 0;
+
+err_disable_src_clk:
+	clk_disable_unprepare(sdd->src_clk);
+err_disable_ioclk:
+	clk_disable_unprepare(sdd->ioclk);
+
+	return ret;
 }
 #endif /* CONFIG_PM */
 

@@ -1345,6 +1379,16 @@ static struct s3c64xx_spi_port_config exynos7_spi_port_config = {
 	.quirks		= S3C64XX_SPI_QUIRK_CS_AUTO,
 };
 
+static struct s3c64xx_spi_port_config exynos5433_spi_port_config = {
+	.fifo_lvl_mask	= { 0x1ff, 0x7f, 0x7f, 0x7f, 0x7f, 0x1ff},
+	.rx_lvl_offset	= 15,
+	.tx_st_done	= 25,
+	.high_speed	= true,
+	.clk_from_cmu	= true,
+	.clk_ioclk	= true,
+	.quirks		= S3C64XX_SPI_QUIRK_CS_AUTO,
+};
+
 static const struct platform_device_id s3c64xx_spi_driver_ids[] = {
 	{
 		.name		= "s3c2443-spi",

@@ -1375,6 +1419,9 @@ static const struct of_device_id s3c64xx_spi_dt_match[] = {
 	{ .compatible = "samsung,exynos7-spi",
 			.data = (void *)&exynos7_spi_port_config,
 	},
+	{ .compatible = "samsung,exynos5433-spi",
+			.data = (void *)&exynos5433_spi_port_config,
+	},
 	{ },
 };
 MODULE_DEVICE_TABLE(of, s3c64xx_spi_dt_match);
Signature · 1 line
2.8.1
author
#10 lore raw

PATCH v3 6/7 spi: s3c64xx: restore removed comments

In reply to Andi Shyti

Patch a9e93e8 has erroneously removed some comments which are important to understand why the bus frequency is multiplied by two during the spi transfer.

Reword the previous comment to a more appropriate message.

Suggested-by Sylwester Nawrocki <[email protected]>
Signed-off-by Andi Shyti <[email protected]>
Reviewed-by Michael Turquette <[email protected]>
---
 drivers/spi/spi-s3c64xx.c | 1 +
 1 file changed, 1 insertion(+)
drivers/spi/spi-s3c64xx.c +1 -0
index 6da663f..5bedafc 100644
@@ -639,6 +639,7 @@ static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd)
 	writel(val, regs + S3C64XX_SPI_MODE_CFG);
 
 	if (sdd->port_conf->clk_from_cmu) {
+		/* The src_clk clock is divided internally by 2 */
 		clk_set_rate(sdd->src_clk, sdd->cur_speed * 2);
 	} else {
 		/* Configure Clock */
Signature · 1 line
2.8.1
author
#11 lore raw

PATCH v3 7/7 clk: exynos5433: remove CLK_IGNORE_UNUSED flag from SPI clocks

In reply to Andi Shyti

Because the Exynos5433 SPI driver supports the ioclk handling and the following patch:

http://marc.info/?l=linux-kernel&m=146787645626318&w=2

fixes a synchronus abort issue, none of the SPI clocks require any critical handling: remove, then, the CLK_IGNORE_UNUSED flag for the SPI related clocks.

Signed-off-by Andi Shyti <[email protected]>
Reviewed-by Krzysztof Kozlowski <[email protected]>
Reviewed-by Michael Turquette <[email protected]>
Acked-by Sylwester Nawrocki <[email protected]>
---
 drivers/clk/samsung/clk-exynos5433.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)
drivers/clk/samsung/clk-exynos5433.c +2 -3
index c3a5318..fb19525 100644
@@ -1661,8 +1661,7 @@ static struct samsung_gate_clock peric_gate_clks[] __initdata = {
 	GATE(CLK_SCLK_IOCLK_SPI2, "sclk_ioclk_spi2", "ioclk_spi2_clk_in",
 			ENABLE_SCLK_PERIC, 13, CLK_SET_RATE_PARENT, 0),
 	GATE(CLK_SCLK_IOCLK_SPI1, "sclk_ioclk_spi1", "ioclk_spi1_clk_in",
-			ENABLE_SCLK_PERIC, 12,
-			CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),
+			ENABLE_SCLK_PERIC, 12, CLK_SET_RATE_PARENT, 0),
 	GATE(CLK_SCLK_IOCLK_SPI0, "sclk_ioclk_spi0", "ioclk_spi0_clk_in",
 			ENABLE_SCLK_PERIC, 11, CLK_SET_RATE_PARENT, 0),
 	GATE(CLK_SCLK_IOCLK_I2S1_BCLK, "sclk_ioclk_i2s1_bclk",

@@ -1677,7 +1676,7 @@ static struct samsung_gate_clock peric_gate_clks[] __initdata = {
 	GATE(CLK_SCLK_SPI2, "sclk_spi2", "sclk_spi2_peric", ENABLE_SCLK_PERIC,
 			5, CLK_SET_RATE_PARENT, 0),
 	GATE(CLK_SCLK_SPI1, "sclk_spi1", "sclk_spi1_peric", ENABLE_SCLK_PERIC,
-			4, CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),
+			4, CLK_SET_RATE_PARENT, 0),
 	GATE(CLK_SCLK_SPI0, "sclk_spi0", "sclk_spi0_peric", ENABLE_SCLK_PERIC,
 			3, CLK_SET_RATE_PARENT, 0),
 	GATE(CLK_SCLK_UART2, "sclk_uart2", "sclk_uart2_peric",
Signature · 1 line
2.8.1
#12 lore raw

PATCH v3 7/7 clk: exynos5433: remove CLK_IGNORE_UNUSED flag from SPI clocks

Quoting Andi Shyti (2016-07-12 03:02:16)

Quoted 5 lines

Because the Exynos5433 SPI driver supports the ioclk handling and the following patch:

http://marc.info/?l=linux-kernel&m=146787645626318&w=2

Quoted 8 lines

fixes a synchronus abort issue, none of the SPI clocks require any critical handling: remove, then, the CLK_IGNORE_UNUSED flag for the SPI related clocks.

Signed-off-by Andi Shyti <[email protected]>
Reviewed-by Krzysztof Kozlowski <[email protected]>
Reviewed-by Michael Turquette <[email protected]>
Acked-by Sylwester Nawrocki <[email protected]>

Do you want these patches to go through same tree? If not, I can take this patch into clk-next.

Regards,
Mike

Quoted 30 lines
---
 drivers/clk/samsung/clk-exynos5433.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)
drivers/clk/samsung/clk-exynos5433.c +2 -3
index c3a5318..fb19525 100644
@@ -1661,8 +1661,7 @@ static struct samsung_gate_clock peric_gate_clks[] __initdata = {
        GATE(CLK_SCLK_IOCLK_SPI2, "sclk_ioclk_spi2", "ioclk_spi2_clk_in",
                        ENABLE_SCLK_PERIC, 13, CLK_SET_RATE_PARENT, 0),
        GATE(CLK_SCLK_IOCLK_SPI1, "sclk_ioclk_spi1", "ioclk_spi1_clk_in",
-                       ENABLE_SCLK_PERIC, 12,
-                       CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),
+                       ENABLE_SCLK_PERIC, 12, CLK_SET_RATE_PARENT, 0),
        GATE(CLK_SCLK_IOCLK_SPI0, "sclk_ioclk_spi0", "ioclk_spi0_clk_in",
                        ENABLE_SCLK_PERIC, 11, CLK_SET_RATE_PARENT, 0),
        GATE(CLK_SCLK_IOCLK_I2S1_BCLK, "sclk_ioclk_i2s1_bclk",

@@ -1677,7 +1676,7 @@ static struct samsung_gate_clock peric_gate_clks[] __initdata = {
        GATE(CLK_SCLK_SPI2, "sclk_spi2", "sclk_spi2_peric", ENABLE_SCLK_PERIC,
                        5, CLK_SET_RATE_PARENT, 0),
        GATE(CLK_SCLK_SPI1, "sclk_spi1", "sclk_spi1_peric", ENABLE_SCLK_PERIC,
-                       4, CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),
+                       4, CLK_SET_RATE_PARENT, 0),
        GATE(CLK_SCLK_SPI0, "sclk_spi0", "sclk_spi0_peric", ENABLE_SCLK_PERIC,
                        3, CLK_SET_RATE_PARENT, 0),
        GATE(CLK_SCLK_UART2, "sclk_uart2", "sclk_uart2_peric",
Signature · 1 line
2.8.1
author
#13 lore raw

PATCH v3 7/7 clk: exynos5433: remove CLK_IGNORE_UNUSED flag from SPI clocks

Hi Mike,

Quoted 9 lines
Quoted 9 lines

Because the Exynos5433 SPI driver supports the ioclk handling and the following patch:

http://marc.info/?l=linux-kernel&m=146787645626318&w=2

fixes a synchronus abort issue, none of the SPI clocks require any critical handling: remove, then, the CLK_IGNORE_UNUSED flag for the SPI related clocks.

Quoted 7 lines
Quoted 4 lines
Signed-off-by Andi Shyti <[email protected]>
Reviewed-by Krzysztof Kozlowski <[email protected]>
Reviewed-by Michael Turquette <[email protected]>
Acked-by Sylwester Nawrocki <[email protected]>

Do you want these patches to go through same tree? If not, I can take this patch into clk-next.

I think this patchset doesn't apply in your repository, but in Mark Brown's spi/topic/s3c64xx branch. So that I guess Mark should take this patchset.

Sorry, I should have specified it in the cover letter.

Thanks,
Andi

maintainer
#14 lore raw

PATCH v3 7/7 clk: exynos5433: remove CLK_IGNORE_UNUSED flag from SPI clocks

In reply to Michael Turquette
Quoted 3 lines · Michael Turquette

Do you want these patches to go through same tree? If not, I can take this patch into clk-next.

I think this patch can safely go separately through the clk tree, we just need to ensure whole series is merged for same release to avoid regressions. There should be no problems with git bisect since there is no exynos5433 based board dts in mainline yet.

--
Thanks,
Sylwester

#15 lore raw

PATCH v3 7/7 clk: exynos5433: remove CLK_IGNORE_UNUSED flag from SPI clocks

Quoted 9 lines · Sylwester Nawrocki
Quoted 3 lines · Michael Turquette

Do you want these patches to go through same tree? If not, I can take this patch into clk-next.

I think this patch can safely go separately through the clk tree, we just need to ensure whole series is merged for same release to avoid regressions. There should be no problems with git bisect since there is no exynos5433 based board dts in mainline yet.

Ack.

Best regards,
Krzysztof

author
#16 lore raw

PATCH v3 7/7 clk: exynos5433: remove CLK_IGNORE_UNUSED flag from SPI clocks

In reply to Michael Turquette

Hi Mike,

Quoted 9 lines
Quoted 9 lines

Because the Exynos5433 SPI driver supports the ioclk handling and the following patch:

http://marc.info/?l=linux-kernel&m=146787645626318&w=2

fixes a synchronus abort issue, none of the SPI clocks require any critical handling: remove, then, the CLK_IGNORE_UNUSED flag for the SPI related clocks.

Quoted 7 lines
Quoted 4 lines
Signed-off-by Andi Shyti <[email protected]>
Reviewed-by Krzysztof Kozlowski <[email protected]>
Reviewed-by Michael Turquette <[email protected]>
Acked-by Sylwester Nawrocki <[email protected]>

Do you want these patches to go through same tree? If not, I can take this patch into clk-next.

oh yes, as Krzysztof and Sylwester pointed out, the dependency is not that strict as there is no exynos5433 dts yet, so that we wouldn't break anything if patch 7/7 gets in before the others.

If you want to take in your branch the 7/7, please feel free to do so. Only the patches on the drivers/spi/spi-s3c64xx.c file have some dependencies on some previous patches I sent to Mark.

Andi

#17 lore raw

PATCH v3 7/7 clk: exynos5433: remove CLK_IGNORE_UNUSED flag from SPI clocks

In reply to Andi Shyti

Quoting Andi Shyti (2016-07-12 03:02:16)

Quoted 5 lines

Because the Exynos5433 SPI driver supports the ioclk handling and the following patch:

http://marc.info/?l=linux-kernel&m=146787645626318&w=2

Quoted 8 lines

fixes a synchronus abort issue, none of the SPI clocks require any critical handling: remove, then, the CLK_IGNORE_UNUSED flag for the SPI related clocks.

Signed-off-by Andi Shyti <[email protected]>
Reviewed-by Krzysztof Kozlowski <[email protected]>
Reviewed-by Michael Turquette <[email protected]>
Acked-by Sylwester Nawrocki <[email protected]>

Applied towards v4.8.

Regards,
Mike

Quoted 30 lines
---
 drivers/clk/samsung/clk-exynos5433.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)
drivers/clk/samsung/clk-exynos5433.c +2 -3
index c3a5318..fb19525 100644
@@ -1661,8 +1661,7 @@ static struct samsung_gate_clock peric_gate_clks[] __initdata = {
        GATE(CLK_SCLK_IOCLK_SPI2, "sclk_ioclk_spi2", "ioclk_spi2_clk_in",
                        ENABLE_SCLK_PERIC, 13, CLK_SET_RATE_PARENT, 0),
        GATE(CLK_SCLK_IOCLK_SPI1, "sclk_ioclk_spi1", "ioclk_spi1_clk_in",
-                       ENABLE_SCLK_PERIC, 12,
-                       CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),
+                       ENABLE_SCLK_PERIC, 12, CLK_SET_RATE_PARENT, 0),
        GATE(CLK_SCLK_IOCLK_SPI0, "sclk_ioclk_spi0", "ioclk_spi0_clk_in",
                        ENABLE_SCLK_PERIC, 11, CLK_SET_RATE_PARENT, 0),
        GATE(CLK_SCLK_IOCLK_I2S1_BCLK, "sclk_ioclk_i2s1_bclk",

@@ -1677,7 +1676,7 @@ static struct samsung_gate_clock peric_gate_clks[] __initdata = {
        GATE(CLK_SCLK_SPI2, "sclk_spi2", "sclk_spi2_peric", ENABLE_SCLK_PERIC,
                        5, CLK_SET_RATE_PARENT, 0),
        GATE(CLK_SCLK_SPI1, "sclk_spi1", "sclk_spi1_peric", ENABLE_SCLK_PERIC,
-                       4, CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),
+                       4, CLK_SET_RATE_PARENT, 0),
        GATE(CLK_SCLK_SPI0, "sclk_spi0", "sclk_spi0_peric", ENABLE_SCLK_PERIC,
                        3, CLK_SET_RATE_PARENT, 0),
        GATE(CLK_SCLK_UART2, "sclk_uart2", "sclk_uart2_peric",
Signature · 1 line
2.8.1