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ARM: OMAP2+: Fix AM335x RTC External Abort

PATCH New Dave Gerlach 3 participants 8 messages Jul 12, 2016 – Jul 23, 2016

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#0 lore raw

cover ARM: OMAP2+: Fix AM335x RTC External Abort

Hi,
With next-20160711 there is an external abort during boot on am335x platforms from the RTC which is caused by commit 183e2077d007 ("ARM:
AM33xx: fix module_wait_ready without clkctrl register"), log is here [1]. The RTC hwmod is unique in that it has a clkctrl_offs of 0 which is invalid normally, all other hwmods have non-zero offsets. Because of this, we need to flag the hwmod so 0 actually gets used for the offset instead of the just returning 0 and doing nothing.

This series adds a HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET flag and moves the check for validity of the clkctrl_offs value to the omap_hwmod code so that we are able to check both the flag and clkctrl_offs values. This code is shared by all OMAP4+ platforms but shoudl have no affect for anything but RTC on am335x but still boot tested on the following platforms:

AM335x GP EVM: Pass http://pastebin.ubuntu.com/19186160/
Beaglebone Black: Pass http://pastebin.ubuntu.com/19186862/
AM437x GP EVM: Pass http://pastebin.ubuntu.com/19186555/
OMAP4 Panda ES: Pass http://pastebin.ubuntu.com/19186711/
OMAP5 uEVM: Pass http://pastebin.ubuntu.com/19186925/

Regards,
Dave

[1] https://storage.kernelci.org/next/next-20160711/arm-omap2plus_defconfig/lab-baylibre-seattle/boot-am335x-boneblack.html

Dave Gerlach (4):
ARM: OMAP4+: hwmod: Add hwmod flag for HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET
ARM: OMAP2+: AM33XX: Add HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET flag to rtc
hwmod
ARM: OMAP4+: Have _omap4_wait_target_* check for valid clkctrl_offs
ARM: OMAP4+: CM: Remove redundant checks for clkctrl_offs of zero

 arch/arm/mach-omap2/cm33xx.c                            | 6 ------
 arch/arm/mach-omap2/cminst44xx.c                        | 6 ------
 arch/arm/mach-omap2/omap_hwmod.c                        | 8 ++++++++
 arch/arm/mach-omap2/omap_hwmod.h                        | 4 ++++
 arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c | 2 ++
 5 files changed, 14 insertions(+), 12 deletions(-)
Signature · 1 line
2.9.0
#1 lore raw

PATCH 1/4 ARM: OMAP4+: hwmod: Add hwmod flag for HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET

Nearly all modules on OMAP4 and newer platforms have clkctrl offsets that are non-zero except for the RTC on am335x. Because we rely on a clkctrl_offset of zero to indicate no clkctrl_offset being present, lets add a HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET flag to use to indicate hwmods that have a valid clkctrl_offset of 0.

---
 arch/arm/mach-omap2/omap_hwmod.h | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/mach-omap2/omap_hwmod.h +4 -0
index 4041bad79a9a..78904017f18c 100644
@@ -443,8 +443,12 @@ struct omap_hwmod_omap2_prcm {
  * HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT: Some IP blocks don't have a PRCM
  *     module-level context loss register associated with them; this
  *     flag bit should be set in those cases
+ * HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET: Some IP blocks have a valid CLKCTRL
+ *	offset of zero; this flag bit should be set in those cases to
+ *	distinguish from hwmods that have no clkctrl offset.
  */
 #define HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT		(1 << 0)
+#define HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET		(1 << 1)
 
 /**
  * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
Signature · 1 line
2.9.0
#2 lore raw

PATCH 2/4 ARM: OMAP2+: AM33XX: Add HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET flag to rtc hwmod

In reply to Dave Gerlach

The RTC hwmod on AM335x family of SoCs is unique in that the clkctrl_offs in the PRCM is 0. We rely on a clkctrl_offs of zero as indicating no clkctrl is present so we must flag this hwmod with HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET to indicate the 0 clkctrl_offs is in fact valid in this case.

---
 arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c | 2 ++
 1 file changed, 2 insertions(+)
arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c +2 -0
index 55c5878577f4..e2d84aa7f595 100644
@@ -29,6 +29,7 @@
 #define CLKCTRL(oh, clkctrl) ((oh).prcm.omap4.clkctrl_offs = (clkctrl))
 #define RSTCTRL(oh, rstctrl) ((oh).prcm.omap4.rstctrl_offs = (rstctrl))
 #define RSTST(oh, rstst) ((oh).prcm.omap4.rstst_offs = (rstst))
+#define PRCM_FLAGS(oh, flag) ((oh).prcm.omap4.flags = (flag))
 
 /*
  * 'l3' class
@@ -1296,6 +1297,7 @@ static void omap_hwmod_am33xx_clkctrl(void)
 	CLKCTRL(am33xx_i2c1_hwmod, AM33XX_CM_WKUP_I2C0_CLKCTRL_OFFSET);
 	CLKCTRL(am33xx_wd_timer1_hwmod, AM33XX_CM_WKUP_WDT1_CLKCTRL_OFFSET);
 	CLKCTRL(am33xx_rtc_hwmod, AM33XX_CM_RTC_RTC_CLKCTRL_OFFSET);
+	PRCM_FLAGS(am33xx_rtc_hwmod, HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET);
 	CLKCTRL(am33xx_mmc2_hwmod, AM33XX_CM_PER_MMC2_CLKCTRL_OFFSET);
 	CLKCTRL(am33xx_gpmc_hwmod, AM33XX_CM_PER_GPMC_CLKCTRL_OFFSET);
 	CLKCTRL(am33xx_l4_ls_hwmod, AM33XX_CM_PER_L4LS_CLKCTRL_OFFSET);
Signature · 1 line
2.9.0
#3 lore raw

PATCH 3/4 ARM: OMAP4+: Have _omap4_wait_target_* check for valid clkctrl_offs

In reply to Dave Gerlach

Previously the low-level CM call internal to the _omap4_wait_target_ready/disable calls was responsible for checking for a valid clkctrl_offs. Now we must also consider the value of the prcm.omap4.flags because if HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET is set in the flags then clkctrl_offs of 0 is valid.

Let's move this check into the _omap4_wait_target_ready/disable where we have access to both the clkctrl_offs and the flags values and simply return 0 without calling the low level CM call at all, which would have returned 0 anyway if the clktrl_offs was zero.

---
 arch/arm/mach-omap2/omap_hwmod.c | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm/mach-omap2/omap_hwmod.c +8 -0
index 5b709383381c..1052b29697b8 100644
@@ -1053,6 +1053,10 @@ static int _omap4_wait_target_disable(struct omap_hwmod *oh)
 	if (oh->flags & HWMOD_NO_IDLEST)
 		return 0;
 
+	if (!oh->prcm.omap4.clkctrl_offs &&
+	    !(oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET))
+		return 0;
+
 	return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
 					oh->clkdm->cm_inst,
 					oh->prcm.omap4.clkctrl_offs, 0);
@@ -2971,6 +2975,10 @@ static int _omap4_wait_target_ready(struct omap_hwmod *oh)
 	if (!_find_mpu_rt_port(oh))
 		return 0;
 
+	if (!oh->prcm.omap4.clkctrl_offs &&
+	    !(oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET))
+		return 0;
+
 	/* XXX check module SIDLEMODE, hardreset status */
 
 	return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
Signature · 1 line
2.9.0
maintainer
#4 lore raw

PATCH 3/4 ARM: OMAP4+: Have _omap4_wait_target_* check for valid clkctrl_offs

Quoted 10 lines · Dave Gerlach

Previously the low-level CM call internal to the _omap4_wait_target_ready/disable calls was responsible for checking for a valid clkctrl_offs. Now we must also consider the value of the prcm.omap4.flags because if HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET is set in the flags then clkctrl_offs of 0 is valid.

Let's move this check into the _omap4_wait_target_ready/disable where we have access to both the clkctrl_offs and the flags values and simply return 0 without calling the low level CM call at all, which would have returned 0 anyway if the clktrl_offs was zero.

This series looks OK to me to fix the RTC regression. Paul and Tero, do you see any issues with this or care to ack?

I'm planning to s/Let's move this check/Let's add this check/ while committing to avoid confusion.

Regards,

Tony

#5 lore raw

PATCH 4/4 ARM: OMAP4+: CM: Remove redundant checks for clkctrl_offs of zero

In reply to Dave Gerlach

Now that we have moved the check for valid clkctrl_offs to the caller of am33xx_cm_wait_module_ready/idle and omap4_cminst_wait_module_ready/idle let's remove the now redundant check for clkctrl_offs from these functions.

---
 arch/arm/mach-omap2/cm33xx.c     | 6 ------
 arch/arm/mach-omap2/cminst44xx.c | 6 ------
 2 files changed, 12 deletions(-)
arch/arm/mach-omap2/cm33xx.c +0 -6
index c073fb57dd13..6f2d0aec0513 100644
@@ -220,9 +220,6 @@ static int am33xx_cm_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
 {
 	int i = 0;
 
-	if (!clkctrl_offs)
-		return 0;
-
 	omap_test_timeout(_is_module_ready(inst, clkctrl_offs),
 			  MAX_MODULE_READY_TIME, i);
 
@@ -246,9 +243,6 @@ static int am33xx_cm_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs,
 {
 	int i = 0;
 
-	if (!clkctrl_offs)
-		return 0;
-
 	omap_test_timeout((_clkctrl_idlest(inst, clkctrl_offs) ==
 				CLKCTRL_IDLEST_DISABLED),
 				MAX_MODULE_READY_TIME, i);
arch/arm/mach-omap2/cminst44xx.c +0 -6
index 2c0e07ed6b99..2ab27ade136a 100644
@@ -278,9 +278,6 @@ static int omap4_cminst_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
 {
 	int i = 0;
 
-	if (!clkctrl_offs)
-		return 0;
-
 	omap_test_timeout(_is_module_ready(part, inst, clkctrl_offs),
 			  MAX_MODULE_READY_TIME, i);
 
@@ -304,9 +301,6 @@ static int omap4_cminst_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs,
 {
 	int i = 0;
 
-	if (!clkctrl_offs)
-		return 0;
-
 	omap_test_timeout((_clkctrl_idlest(part, inst, clkctrl_offs) ==
 			   CLKCTRL_IDLEST_DISABLED),
 			  MAX_MODULE_DISABLE_TIME, i);
Signature · 1 line
2.9.0
#6 lore raw

cover ARM: OMAP2+: Fix AM335x RTC External Abort

In reply to Dave Gerlach
Quoted 9 lines · Dave Gerlach

Hi,
With next-20160711 there is an external abort during boot on am335x platforms from the RTC which is caused by commit 183e2077d007 ("ARM:
AM33xx: fix module_wait_ready without clkctrl register"), log is here [1]. The RTC hwmod is unique in that it has a clkctrl_offs of 0 which is invalid normally, all other hwmods have non-zero offsets. Because of this, we need to flag the hwmod so 0 actually gets used for the offset instead of the just returning 0 and doing nothing.

Quoted 5 lines

This series adds a HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET flag and moves the check for validity of the clkctrl_offs value to the omap_hwmod code so that we are able to check both the flag and clkctrl_offs values. This code is shared by all OMAP4+ platforms but shoudl have no affect for anything but RTC on am335x but still boot tested on the following platforms:

Series looks good to me, so:

-Tero

Quoted 26 lines

AM335x GP EVM: Pass http://pastebin.ubuntu.com/19186160/
Beaglebone Black: Pass http://pastebin.ubuntu.com/19186862/
AM437x GP EVM: Pass http://pastebin.ubuntu.com/19186555/
OMAP4 Panda ES: Pass http://pastebin.ubuntu.com/19186711/
OMAP5 uEVM: Pass http://pastebin.ubuntu.com/19186925/

Regards,
Dave

[1] https://storage.kernelci.org/next/next-20160711/arm-omap2plus_defconfig/lab-baylibre-seattle/boot-am335x-boneblack.html

Dave Gerlach (4):
ARM: OMAP4+: hwmod: Add hwmod flag for HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET
ARM: OMAP2+: AM33XX: Add HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET flag to rtc
hwmod
ARM: OMAP4+: Have _omap4_wait_target_* check for valid clkctrl_offs
ARM: OMAP4+: CM: Remove redundant checks for clkctrl_offs of zero

  arch/arm/mach-omap2/cm33xx.c                            | 6 ------
  arch/arm/mach-omap2/cminst44xx.c                        | 6 ------
  arch/arm/mach-omap2/omap_hwmod.c                        | 8 ++++++++
  arch/arm/mach-omap2/omap_hwmod.h                        | 4 ++++
  arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c | 2 ++
  5 files changed, 14 insertions(+), 12 deletions(-)
maintainer
#7 lore raw

cover ARM: OMAP2+: Fix AM335x RTC External Abort

Quoted 16 lines · Tero Kristo
Quoted 9 lines · Dave Gerlach

Hi,
With next-20160711 there is an external abort during boot on am335x platforms from the RTC which is caused by commit 183e2077d007 ("ARM:
AM33xx: fix module_wait_ready without clkctrl register"), log is here [1]. The RTC hwmod is unique in that it has a clkctrl_offs of 0 which is invalid normally, all other hwmods have non-zero offsets. Because of this, we need to flag the hwmod so 0 actually gets used for the offset instead of the just returning 0 and doing nothing.

Quoted 5 lines

This series adds a HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET flag and moves the check for validity of the clkctrl_offs value to the omap_hwmod code so that we are able to check both the flag and clkctrl_offs values. This code is shared by all OMAP4+ platforms but shoudl have no affect for anything but RTC on am335x but still boot tested on the following platforms:

Quoted 3 lines

Series looks good to me, so:

Applying these into omap-for-v4,8/soc.

Regards,

Tony