ARM: Introduce function to switch to hypervisor mode
Subsystems (2)
cover ARM: Introduce function to switch to hypervisor mode
On SoCs like DRA7, OMAP5 one cannot enable hypervisor mode directly from the u-boot because the ROM code puts the chip to supervisor mode after it jumps to boot loader.
Patch 1: Introduces a weak function which can be overridden specific to SoCs to switch to hypervisor mode.
Patch 2: overrides weak function in patch 1 switch cpu to hypervisor mode using the available ROM code hook early in the boot phase before the boot loader checks for hypervisor mode on OMAP5 based SoCs.
Based on top of http://patchwork.dal.design.ti.com/patch/24937/.
Keerthy (2):
ARM: Introduce function to switch to hypervisor mode
ARM: OMAP5+: Override switch_to_hypervisor function
arch/arm/cpu/armv7/omap-common/lowlevel_init.S | 21 +++++++++++++++++++++ arch/arm/cpu/armv7/start.S | 15 +++++++++++++++ arch/arm/include/asm/system.h | 1 + 3 files changed, 37 insertions(+)
Signature · 1 line
1.9.1
PATCH 1/2 ARM: Introduce function to switch to hypervisor mode
On some of the SoCs one cannot enable hypervisor mode directly from the u-boot because the ROM code puts the chip to supervisor mode after it jumps to boot loader. Hence introduce a weak function which can be overridden based on the SoC type and switch to hypervisor mode in a custom way.
--- arch/arm/cpu/armv7/start.S | 15 +++++++++++++++ arch/arm/include/asm/system.h | 1 + 2 files changed, 16 insertions(+)
arch/arm/cpu/armv7/start.S +15 -0
@@ -17,6 +17,7 @@ #include <config.h> #include <asm/system.h> #include <linux/linkage.h> +#include <asm/armv7.h> /************************************************************************* *
@@ -30,11 +31,20 @@ .globl reset .globl save_boot_params_ret + .global switch_to_hypervisor_ret reset: /* Allow the board to save important registers */ b save_boot_params save_boot_params_ret: +/* + * check for Hypervisor support + */ + mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1 + and r0, r0, #CPUID_ARM_VIRT_MASK @ mask virtualization bits + cmp r0, #(1 << CPUID_ARM_VIRT_SHIFT) + beq switch_to_hypervisor +switch_to_hypervisor_ret: /* * disable interrupts (FIQ and IRQ), also set the cpu to SVC32 mode, * except if in HYP mode already
@@ -103,6 +113,11 @@ ENTRY(save_boot_params) ENDPROC(save_boot_params) .weak save_boot_params +ENTRY(switch_to_hypervisor) + b switch_to_hypervisor_ret +ENDPROC(switch_to_hypervisor) + .weak switch_to_hypervisor + /************************************************************************* * * cpu_init_cp15
arch/arm/include/asm/system.h +1 -0
@@ -226,6 +226,7 @@ void __noreturn psci_system_reset(bool smc);* should use 'b' or 'bx' to return to save_boot_params_ret. */ void save_boot_params_ret (void ); +void switch_to_hypervisor_ret (void );#define isb () __asm__ __volatile__ ("" : : : "memory")
Signature · 1 line
1.9.1
PATCH 1/2 ARM: Introduce function to switch to hypervisor mode
Quoted 8 lines · Keerthy
On some of the SoCs one cannot enable hypervisor mode directly from the u-boot because the ROM code puts the chip to supervisor mode after it jumps to boot loader. Hence introduce a weak function which can be overridden based on the SoC type and switch to hypervisor mode in a custom way.
Cc beagleboard-x15 at googlegroups.comSigned-off-by Keerthy <[email protected]>
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PATCH 2/2 ARM: OMAP5+: Override switch_to_hypervisor function
In reply to KeerthyOverride the switch_to_hypervisor function to switch cpu to hypervisor mode using the available ROM code hook early in the boot phase before the boot loader checks for HYP mode.
Based on the work done by Jonathan Bergsagel jbergsagel at ti.com.
--- arch/arm/cpu/armv7/omap-common/lowlevel_init.S | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)
arch/arm/cpu/armv7/omap-common/lowlevel_init.S +21 -0
@@ -23,7 +23,28 @@ ENTRY(save_boot_params) str r0, [r1] b save_boot_params_ret ENDPROC(save_boot_params) + +ENTRY(switch_to_hypervisor) +/* + * Switch to hypervisor mode + */ + adr r0, save_sp + str sp, [r0] + adr r1, restore_from_hyp + ldr r0, =0x102 +#ifdef CONFIG_TI_SECURE_DEVICE + b omap_smc_sec +#else + b omap_smc1 +#endif +restore_from_hyp: + adr r0, save_sp + ldr sp, [r0] #endif + b switch_to_hypervisor_ret +save_sp: + .word 0x0 +ENDPROC(switch_to_hypervisor) ENTRY(omap_smc1) PUSH {r4-r12, lr} @ save registers - ROM code may pollute
Signature · 1 line
1.9.1
PATCH 2/2 ARM: OMAP5+: Override switch_to_hypervisor function
Quoted 9 lines · Keerthy
Override the
switch_to_hypervisorfunction to switch cpu to hypervisor mode using the available ROM code hook early in the boot phase before the boot loader checks for HYP mode.Based on the work done by Jonathan Bergsagel jbergsagel at ti.com.
Cc beagleboard-x15 at googlegroups.comSigned-off-by Keerthy <[email protected]>Acked-by Nishanth Menon <[email protected]>
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cover ARM: Introduce function to switch to hypervisor mode
In reply to KeerthyQuoted 4 lines · Keerthy
On SoCs like DRA7, OMAP5 one cannot enable hypervisor mode directly from the u-boot because the ROM code puts the chip to supervisor mode after it jumps to boot loader.
Quoted 8 lines
Patch 1: Introduces a weak function which can be overridden specific to SoCs to switch to hypervisor mode.
Patch 2: overrides weak function in patch 1 switch cpu to hypervisor mode using the available ROM code hook early in the boot phase before the boot loader checks for hypervisor mode on OMAP5 based SoCs.
Based on top of http://patchwork.dal.design.ti.com/patch/24937/.
Please ignore the above link.
Based on:
http://lists.denx.de/pipermail/u-boot/2016-June/258300.html
Quoted 10 lines
Keerthy (2):
ARM: Introduce function to switch to hypervisor mode
ARM: OMAP5+: Overrideswitch_to_hypervisorfunctionarch/arm/cpu/armv7/omap-common/lowlevel_init.S | 21 +++++++++++++++++++++ arch/arm/cpu/armv7/start.S | 15 +++++++++++++++ arch/arm/include/asm/system.h | 1 + 3 files changed, 37 insertions(+)
cover ARM: Introduce function to switch to hypervisor mode
Quoted 15 lines · Keerthy
Quoted 12 lines · Keerthy
On SoCs like DRA7, OMAP5 one cannot enable hypervisor mode directly from the
u-boot because the ROM code puts the chip to supervisor mode after it jumps to boot loader.Patch 1: Introduces a weak function which can be overridden specific to SoCs to switch to hypervisor mode.
Patch 2: overrides weak function in patch 1 switch cpu to hypervisor mode using the available ROM code hook early in the boot phase before the boot loader checks for hypervisor mode on OMAP5 based SoCs.
Quoted 7 lines
Quoted 1 line
Based on top of http://patchwork.dal.design.ti.com/patch/24937/.
Please ignore the above link.
Based on:
Please resubmit fixed patch. Also please add your full name as the author, otherwise the patches can not be applied.
See ie. https://lwn.net/Articles/195643/
Quoted 11 lines
Quoted 11 lines
Keerthy (2):
ARM: Introduce function to switch to hypervisor mode
ARM: OMAP5+: Overrideswitch_to_hypervisorfunctionarch/arm/cpu/armv7/omap-common/lowlevel_init.S | 21 +++++++++++++++++++++ arch/arm/cpu/armv7/start.S | 15 +++++++++++++++ arch/arm/include/asm/system.h | 1 + 3 files changed, 37 insertions(+)
Signature · 2 lines
Best regards, Marek Vasut
cover ARM: Introduce function to switch to hypervisor mode
Hi Marek,
Quoted 18 lines · Marek Vasut
Quoted 17 lines · Keerthy
Quoted 13 lines · Keerthy
On SoCs like DRA7, OMAP5 one cannot enable hypervisor mode directly from the
u-boot because the ROM code puts the chip to supervisor mode after it jumps to boot loader.Patch 1: Introduces a weak function which can be overridden specific to SoCs to switch to hypervisor mode.
Patch 2: overrides weak function in patch 1 switch cpu to hypervisor mode using the available ROM code hook early in the boot phase before the boot loader checks for hypervisor mode on OMAP5 based SoCs.
Based on top of http://patchwork.dal.design.ti.com/patch/24937/.
Quoted 9 lines
Quoted 5 lines
Please ignore the above link.
Based on:
Please resubmit fixed patch. Also please add your full name as the author, otherwise the patches can not be applied.
I will re-submit the patches with the correct link.
Coming to the name. My full name is Keerthy and that is the name i have been using for the last 4-5 years in the mailing list. I do not have a surname.
- Keerthy
Quoted 15 lines
See ie. https://lwn.net/Articles/195643/
Quoted 11 lines
Quoted 11 lines
Keerthy (2):
ARM: Introduce function to switch to hypervisor mode
ARM: OMAP5+: Overrideswitch_to_hypervisorfunctionarch/arm/cpu/armv7/omap-common/lowlevel_init.S | 21 +++++++++++++++++++++ arch/arm/cpu/armv7/start.S | 15 +++++++++++++++ arch/arm/include/asm/system.h | 1 + 3 files changed, 37 insertions(+)
cover ARM: Introduce function to switch to hypervisor mode
In reply to Marek VasutQuoted 18 lines · Marek Vasut
Quoted 17 lines · Keerthy
Quoted 13 lines · Keerthy
On SoCs like DRA7, OMAP5 one cannot enable hypervisor mode directly from the
u-boot because the ROM code puts the chip to supervisor mode after it jumps to boot loader.Patch 1: Introduces a weak function which can be overridden specific to SoCs to switch to hypervisor mode.
Patch 2: overrides weak function in patch 1 switch cpu to hypervisor mode using the available ROM code hook early in the boot phase before the boot loader checks for hypervisor mode on OMAP5 based SoCs.
Based on top of http://patchwork.dal.design.ti.com/patch/24937/.
Quoted 7 lines
Quoted 5 lines
Please ignore the above link.
Based on:
Please resubmit fixed patch.
That's just a bad link in 0/2, nothing to resubmit.
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cover ARM: Introduce function to switch to hypervisor mode
Quoted 21 lines · Tom Rini
Quoted 20 lines · Marek Vasut
Quoted 19 lines · Keerthy
Quoted 5 lines · Keerthy
On SoCs like DRA7, OMAP5 one cannot enable hypervisor mode directly from the
u-boot because the ROM code puts the chip to supervisor mode after it jumps to boot loader.Quoted 8 lines
Patch 1: Introduces a weak function which can be overridden specific to SoCs to switch to hypervisor mode.
Patch 2: overrides weak function in patch 1 switch cpu to hypervisor mode using the available ROM code hook early in the boot phase before the boot loader checks for hypervisor mode on OMAP5 based SoCs.
Based on top of http://patchwork.dal.design.ti.com/patch/24937/.
Please ignore the above link.
Quoted 7 lines
Quoted 5 lines
Quoted 3 lines
Based on:
Please resubmit fixed patch.
That's just a bad link in 0/2, nothing to resubmit.
Thanks for reviewing Tom!
The series generated a compile error on a bunch of other defconfigs. I have fixed that and send a v2 with your Reviewed-by.