x86: Add initial support for 64-bit U-Boot

index 623a703..fd13f2d 100644
@@ -221,7 +221,7 @@ static inline void fill_smbios_header(void *table, int type,
  * @handle:	the structure's handle, a unique 16-bit number
  * @return:	size of the structure
  */
-typedef int (*smbios_write_type)(u32 *addr, int handle);
+typedef int (*smbios_write_type)(ulong *addr, int handle);
 
 /**
  * write_smbios_table() - Write SMBIOS table

index 9f30550..c338b82 100644
@@ -69,7 +69,7 @@ static int smbios_string_table_len(char *start)
 	return len + 1;
 }
 
-static int smbios_write_type0(u32 *current, int handle)
+static int smbios_write_type0(ulong *current, int handle)
 {
 	struct smbios_type0 *t = (struct smbios_type0 *)*current;
 	int len = sizeof(struct smbios_type0);

@@ -98,7 +98,7 @@ static int smbios_write_type0(u32 *current, int handle)
 	return len;
 }
 
-static int smbios_write_type1(u32 *current, int handle)
+static int smbios_write_type1(ulong *current, int handle)
 {
 	struct smbios_type1 *t = (struct smbios_type1 *)*current;
 	int len = sizeof(struct smbios_type1);

@@ -114,7 +114,7 @@ static int smbios_write_type1(u32 *current, int handle)
 	return len;
 }
 
-static int smbios_write_type2(u32 *current, int handle)
+static int smbios_write_type2(ulong *current, int handle)
 {
 	struct smbios_type2 *t = (struct smbios_type2 *)*current;
 	int len = sizeof(struct smbios_type2);

@@ -132,7 +132,7 @@ static int smbios_write_type2(u32 *current, int handle)
 	return len;
 }
 
-static int smbios_write_type3(u32 *current, int handle)
+static int smbios_write_type3(ulong *current, int handle)
 {
 	struct smbios_type3 *t = (struct smbios_type3 *)*current;
 	int len = sizeof(struct smbios_type3);

@@ -152,7 +152,7 @@ static int smbios_write_type3(u32 *current, int handle)
 	return len;
 }
 
-static int smbios_write_type4(u32 *current, int handle)
+static int smbios_write_type4(ulong *current, int handle)
 {
 	struct smbios_type4 *t = (struct smbios_type4 *)*current;
 	int len = sizeof(struct smbios_type4);

@@ -185,7 +185,7 @@ static int smbios_write_type4(u32 *current, int handle)
 	return len;
 }
 
-static int smbios_write_type32(u32 *current, int handle)
+static int smbios_write_type32(ulong *current, int handle)
 {
 	struct smbios_type32 *t = (struct smbios_type32 *)*current;
 	int len = sizeof(struct smbios_type32);

@@ -198,7 +198,7 @@ static int smbios_write_type32(u32 *current, int handle)
 	return len;
 }
 
-static int smbios_write_type127(u32 *current, int handle)
+static int smbios_write_type127(ulong *current, int handle)
 {
 	struct smbios_type127 *t = (struct smbios_type127 *)*current;
 	int len = sizeof(struct smbios_type127);

@@ -224,7 +224,7 @@ static smbios_write_type smbios_write_funcs[] = {
 u32 write_smbios_table(u32 addr)
 {
 	struct smbios_entry *se;
-	u32 tables;
+	ulong tables;
 	int len = 0;
 	int max_struct_size = 0;
 	int handle = 0;

@@ -235,7 +235,7 @@ u32 write_smbios_table(u32 addr)
 	/* 16 byte align the table address */
 	addr = ALIGN(addr, 16);
 
-	se = (struct smbios_entry *)addr;
+	se = (struct smbios_entry *)(uintptr_t)addr;
 	memset(se, 0, sizeof(struct smbios_entry));
 
 	addr += sizeof(struct smbios_entry);

@@ -244,7 +244,7 @@ u32 write_smbios_table(u32 addr)
 
 	/* populate minimum required tables */
 	for (i = 0; i < ARRAY_SIZE(smbios_write_funcs); i++) {
-		int tmp = smbios_write_funcs[i](&addr, handle++);
+		int tmp = smbios_write_funcs[i]((ulong *)&addr, handle++);
 		max_struct_size = max(max_struct_size, tmp);
 		len += tmp;
 	}

index 54ccac9..daf021b 100644
@@ -84,6 +84,7 @@ extern ulong __data_end;
 extern ulong __rel_dyn_start;
 extern ulong __rel_dyn_end;
 extern ulong __bss_end;
+extern ulong _image_binary_end;
 
 extern ulong _TEXT_BASE;	/* code start */
 

index 7717246..2d5b5dc 100644
@@ -599,7 +599,7 @@ int biosemu_run(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
 	if (clean_up) {
 		BE_exit();
 		if (vga_info->BIOSImage &&
-		    (u32)(vga_info->BIOSImage) != 0xc0000)
+		    (ulong)(vga_info->BIOSImage) != 0xc0000)
 			free(vga_info->BIOSImage);
 		free(vga_info);
 		vga_info = NULL;

index 2c88595..e3179a1 100644
@@ -912,9 +912,6 @@ static init_fnc_t init_sequence_f[] = {
 #ifdef CONFIG_SANDBOX
 	sandbox_early_getopt_check,
 #endif
-#ifdef CONFIG_OF_CONTROL
-	fdtdec_prepare_fdt,
-#endif
 	display_options,	/* say that we are here */
 	display_text_info,	/* show debugging info if required */
 #if defined(CONFIG_MPC8260)

index 31a9b3e..4d56ed7 100644
@@ -40,14 +40,14 @@ static int on_console(const char *name, const char *value, enum env_op op,
 	case env_op_create:
 	case env_op_overwrite:
 
-#ifdef CONFIG_CONSOLE_MUX
+#if CONFIG_IS_ENABLED(CONSOLE_MUX)
 		if (iomux_doenv(console, value))
 			return 1;
 #else
 		/* Try assigning specified device */
 		if (console_assign(console, value) < 0)
 			return 1;
-#endif /* CONFIG_CONSOLE_MUX */
+#endif
 		return 0;
 
 	case env_op_delete:

@@ -84,7 +84,7 @@ static int on_silent(const char *name, const char *value, enum env_op op,
 U_BOOT_ENV_CALLBACK(silent, on_silent);
 #endif
 
-#ifdef CONFIG_SYS_CONSOLE_IS_IN_ENV
+#if CONFIG_IS_ENABLED(SYS_CONSOLE_IS_IN_ENV)
 /*
  * if overwrite_console returns 1, the stdin, stderr and stdout
  * are switched to the serial port, else the settings in the

@@ -97,7 +97,7 @@ extern int overwrite_console(void);
 #define OVERWRITE_CONSOLE 0
 #endif /* CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE */
 
-#endif /* CONFIG_SYS_CONSOLE_IS_IN_ENV */
+#endif /* CONFIG_IS_ENABLED(SYS_CONSOLE_IS_IN_ENV) */
 
 static int console_setfile(int file, struct stdio_dev * dev)
 {

@@ -144,7 +144,7 @@ static int console_setfile(int file, struct stdio_dev * dev)
 	return error;
 }
 
-#if defined(CONFIG_CONSOLE_MUX)
+#if CONFIG_IS_ENABLED(CONSOLE_MUX)
 /** Console I/O multiplexing *******************************************/
 
 static struct stdio_dev *tstcdev;

@@ -264,7 +264,7 @@ static inline void console_doenv(int file, struct stdio_dev *dev)
 {
 	console_setfile(file, dev);
 }
-#endif /* defined(CONFIG_CONSOLE_MUX) */
+#endif /* CONIFIG_IS_ENABLED(CONSOLE_MUX) */
 
 /** U-Boot INITIAL CONSOLE-NOT COMPATIBLE FUNCTIONS *************************/
 

@@ -289,7 +289,7 @@ int serial_printf(const char *fmt, ...)
 int fgetc(int file)
 {
 	if (file < MAX_FILES) {
-#if defined(CONFIG_CONSOLE_MUX)
+#if CONFIG_IS_ENABLED(CONSOLE_MUX)
 		/*
 		 * Effectively poll for input wherever it may be available.
 		 */

@@ -727,7 +727,7 @@ void stdio_print_current_devices(void)
 	}
 }
 
-#ifdef CONFIG_SYS_CONSOLE_IS_IN_ENV
+#if CONFIG_IS_ENABLED(SYS_CONSOLE_IS_IN_ENV)
 /* Called after the relocation - use desired console functions */
 int console_init_r(void)
 {

@@ -736,7 +736,7 @@ int console_init_r(void)
 #ifdef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
 	int i;
 #endif /* CONFIG_SYS_CONSOLE_ENV_OVERWRITE */
-#ifdef CONFIG_CONSOLE_MUX
+#if CONFIG_IS_ENABLED(CONSOLE_MUX)
 	int iomux_err = 0;
 #endif
 

@@ -757,7 +757,7 @@ int console_init_r(void)
 		inputdev  = search_device(DEV_FLAGS_INPUT,  stdinname);
 		outputdev = search_device(DEV_FLAGS_OUTPUT, stdoutname);
 		errdev    = search_device(DEV_FLAGS_OUTPUT, stderrname);
-#ifdef CONFIG_CONSOLE_MUX
+#if CONFIG_IS_ENABLED(CONSOLE_MUX)
 		iomux_err = iomux_doenv(stdin, stdinname);
 		iomux_err += iomux_doenv(stdout, stdoutname);
 		iomux_err += iomux_doenv(stderr, stderrname);

@@ -790,7 +790,7 @@ int console_init_r(void)
 		console_doenv(stdin, inputdev);
 	}
 
-#ifdef CONFIG_CONSOLE_MUX
+#if CONFIG_IS_ENABLED(CONSOLE_MUX)
 done:
 #endif
 

@@ -820,7 +820,7 @@ done:
 	return 0;
 }
 
-#else /* CONFIG_SYS_CONSOLE_IS_IN_ENV */
+#else /* !CONFIG_IS_ENABLED(SYS_CONSOLE_IS_IN_ENV) */
 
 /* Called after the relocation - use desired console functions */
 int console_init_r(void)

@@ -862,7 +862,7 @@ int console_init_r(void)
 	if (outputdev != NULL) {
 		console_setfile(stdout, outputdev);
 		console_setfile(stderr, outputdev);
-#ifdef CONFIG_CONSOLE_MUX
+#if CONFIG_IS_ENABLED(CONSOLE_MUX)
 		console_devices[stdout][0] = outputdev;
 		console_devices[stderr][0] = outputdev;
 #endif

@@ -871,7 +871,7 @@ int console_init_r(void)
 	/* Initializes input console */
 	if (inputdev != NULL) {
 		console_setfile(stdin, inputdev);
-#ifdef CONFIG_CONSOLE_MUX
+#if CONFIG_IS_ENABLED(CONSOLE_MUX)
 		console_devices[stdin][0] = inputdev;
 #endif
 	}

@@ -896,4 +896,4 @@ int console_init_r(void)
 	return 0;
 }
 
-#endif /* CONFIG_SYS_CONSOLE_IS_IN_ENV */
+#endif /* CONFIG_IS_ENABLED(SYS_CONSOLE_IS_IN_ENV) */

index a35e085..bcc5eb7 100644
@@ -394,6 +394,12 @@ typedef struct {
 	Elf64_Xword r_info;	/* index and type of relocation */
 } Elf64_Rel;
 
+typedef struct {
+	Elf64_Addr r_offset;    /* Location at which to apply the action */
+	Elf64_Xword r_info;     /* index and type of relocation */
+	Elf64_Sxword r_addend;  /* Constant addend used to compute value */
+} Elf64_Rela;
+
 /* Extract relocation info - r_info */
 #define ELF32_R_SYM(i)		((i) >> 8)
 #define ELF32_R_TYPE(i)		((unsigned char) (i))

index 340eef6..3d587cc 100644
@@ -30,7 +30,7 @@ int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported)
 
 		mmc_host->name = name;
 		dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, &iobase);
-		mmc_host->ioaddr = (void *)iobase;
+		mmc_host->ioaddr = (void *)(ulong)iobase;
 		mmc_host->quirks = 0;
 		ret = add_sdhci(mmc_host, 0, 0);
 		if (ret)

index da804d5..4df9eda 100644
@@ -14,7 +14,7 @@
 #include <dm.h>
 #include <rtc.h>
 
-#if defined(__I386__) || defined(CONFIG_MALTA)
+#if defined(CONFIG_X86) || defined(CONFIG_MALTA)
 #include <asm/io.h>
 #define in8(p) inb(p)
 #define out8(p, v) outb(v, p)

index a3caafb..3f400eb 100644
@@ -96,8 +96,10 @@ static int spl_spi_load_image(struct spl_image_info *spl_image,
 		/* Load u-boot, mkimage header is 64 bytes. */
 		err = spi_flash_read(flash, CONFIG_SYS_SPI_U_BOOT_OFFS, 0x40,
 				     (void *)header);
-		if (err)
+		if (err) {
+			debug("%s: Failed to read from SPI flash\n", __func__);
 			return err;
+		}
 
 		if (IS_ENABLED(CONFIG_SPL_LOAD_FIT)) {
 			struct spl_load_info load;

index 257d035..b4efbb5 100644
@@ -204,7 +204,7 @@ static int tis_senddata(struct udevice *dev, const u8 *data, size_t len)
 		/* Wait till the device is ready to accept more data. */
 		while (!burst) {
 			if (max_cycles++ == MAX_DELAY_US) {
-				printf("%s:%d failed to feed %d bytes of %d\n",
+				printf("%s:%d failed to feed %zd bytes of %zd\n",
 				       __FILE__, __LINE__, len - offset, len);
 				return -ETIMEDOUT;
 			}

@@ -224,7 +224,7 @@ static int tis_senddata(struct udevice *dev, const u8 *data, size_t len)
 		 * changes to zero exactly after the last byte is fed into the
 		 * FIFO.
 		 */
-		count = min((u32)burst, len - offset - 1);
+		count = min((size_t)burst, len - offset - 1);
 		while (count--)
 			tpm_write_byte(priv, data[offset++],
 				       &regs[locality].data);

index 6fc2479..f20fc33 100644
@@ -32,8 +32,8 @@ static void ehci_pci_init(struct udevice *dev, struct ehci_hccr **ret_hccr,
 	hcor = (struct ehci_hcor *)((uintptr_t) hccr +
 			HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
 
-	debug("EHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n",
-	      (u32)hccr, (u32)hcor,
+	debug("EHCI-PCI init hccr %#lx and hcor %#lx hc_length %d\n",
+	      (ulong)hccr, (ulong)hcor,
 	      (u32)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
 
 	*ret_hccr = hccr;

index b008853..4a4fd5f 100644
@@ -38,7 +38,7 @@ typedef struct graphic_device {
     unsigned int dprBase;
     unsigned int vprBase;
     unsigned int cprBase;
-    unsigned int frameAdrs;
+    unsigned long frameAdrs;
     unsigned int memSize;
     unsigned int mode;
     unsigned int gdfIndex;

index dd2819a..46babe0 100644
@@ -238,8 +238,11 @@ int disable_interrupts(void)
 {
 	long flags;
 
+#ifdef CONFIG_X86_64
+	asm volatile ("pushfq ; popq %0 ; cli\n" : "=g" (flags) : );
+#else
 	asm volatile ("pushfl ; popl %0 ; cli\n" : "=g" (flags) : );
-
+#endif
 	return flags & X86_EFLAGS_IF;
 }
 

index 269043d..7c1d6de 100644
@@ -135,7 +135,7 @@ static void load_gdt(const u64 *boot_gdt, u16 num_entries)
 	struct gdt_ptr gdt;
 
 	gdt.len = (num_entries * X86_GDT_ENTRY_SIZE) - 1;
-	gdt.ptr = (u32)boot_gdt;
+	gdt.ptr = (ulong)boot_gdt;
 
 	asm volatile("lgdtl %0\n" : : "m" (gdt));
 }

@@ -630,13 +630,11 @@ static void build_pagetable(uint32_t *pgtable)
 	memset(pgtable, '\0', PAGETABLE_SIZE);
 
 	/* Level 4 needs a single entry */
-	pgtable[0] = (uint32_t)&pgtable[1024] + 7;
+	pgtable[0] = (ulong)&pgtable[1024] + 7;
 
 	/* Level 3 has one 64-bit entry for each GiB of memory */
-	for (i = 0; i < 4; i++) {
-		pgtable[1024 + i * 2] = (uint32_t)&pgtable[2048] +
-							0x1000 * i + 7;
-	}
+	for (i = 0; i < 4; i++)
+		pgtable[1024 + i * 2] = (ulong)&pgtable[2048] + 0x1000 * i + 7;
 
 	/* Level 2 has 2048 64-bit entries, each repesenting 2MiB */
 	for (i = 0; i < 2048; i++)

index 46babe0..5f6cdd3 100644
@@ -182,8 +182,8 @@ static inline void load_idt(const struct desc_ptr *dtr)
 
 void set_vector(u8 intnum, void *routine)
 {
-	idt[intnum].base_high = (u16)((u32)(routine) >> 16);
-	idt[intnum].base_low = (u16)((u32)(routine) & 0xffff);
+	idt[intnum].base_high = (u16)((ulong)(routine) >> 16);
+	idt[intnum].base_low = (u16)((ulong)(routine) & 0xffff);
 }
 
 /*

index df3cd0a..516d84a 100644
@@ -263,7 +263,7 @@ int irq_router_probe(struct udevice *dev)
 	return irq_router_common_init(dev);
 }
 
-u32 write_pirq_routing_table(u32 addr)
+ulong write_pirq_routing_table(ulong addr)
 {
 	if (!pirq_routing_table)
 		return addr;

index caff4d8..bbd80a1 100644
@@ -316,4 +316,4 @@ int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi,
 			       u8 cpu, u16 flags, u8 lint);
 u32 acpi_fill_madt(u32 current);
 void acpi_create_gnvs(struct acpi_global_nvs *gnvs);
-u32 write_acpi_tables(u32 start);
+ulong write_acpi_tables(ulong start);

index ad8eba9..146a4b0 100644
@@ -456,6 +456,6 @@ int mp_determine_pci_dstirq(int bus, int dev, int func, int pirq);
  * @addr:	start address to write MP table
  * @return:	end address of MP table
  */
-u32 write_mp_table(u32 addr);
+ulong write_mp_table(ulong addr);
 
 #endif /* __ASM_MPSPEC_H */

index d1f0f0c..d6c44c9 100644
@@ -132,6 +132,6 @@ typedef int (*sfi_table_handler) (struct sfi_table_header *table);
  * @base:	Address to write table to
  * @return address to use for the next table
  */
-u32 write_sfi_table(u32 base);
+ulong write_sfi_table(ulong base);
 
 #endif /*_LINUX_SFI_H */

index fd13f2d..4e508c3 100644
@@ -231,6 +231,6 @@ typedef int (*smbios_write_type)(ulong *addr, int handle);
  * @addr:	start address to write SMBIOS table
  * @return:	end address of SMBIOS table
  */
-u32 write_smbios_table(u32 addr);
+ulong write_smbios_table(ulong addr);
 
 #endif /* _SMBIOS_H_ */

index ae9f0d0..6154dd1 100644
@@ -63,6 +63,6 @@ void write_tables(void);
  * @start:	start address to write PIRQ routing table
  * @return:	end address of PIRQ routing table
  */
-u32 write_pirq_routing_table(u32 start);
+ulong write_pirq_routing_table(ulong start);
 
 #endif /* _X86_TABLES_H_ */

index 7001e8b..355456d 100644
@@ -327,7 +327,7 @@ static void enter_acpi_mode(int pm1_cnt)
  * QEMU's version of write_acpi_tables is defined in
  * arch/x86/cpu/qemu/acpi_table.c
  */
-u32 write_acpi_tables(u32 start)
+ulong write_acpi_tables(ulong start)
 {
 	u32 current;
 	struct acpi_rsdp *rsdp;

@@ -345,7 +345,7 @@ u32 write_acpi_tables(u32 start)
 	/* Align ACPI tables to 16 byte */
 	current = ALIGN(current, 16);
 
-	debug("ACPI: Writing ACPI tables at %x\n", start);
+	debug("ACPI: Writing ACPI tables at %lx\n", start);
 
 	/* We need at least an RSDP and an RSDT Table */
 	rsdp = (struct acpi_rsdp *)current;

index 6ab43f1..516d7b3 100644
@@ -365,7 +365,7 @@ static void mptable_add_lintsrc(struct mp_config_table *mc, int bus_isa)
 			 bus_isa, 0, MP_APIC_ALL, 1);
 }
 
-u32 write_mp_table(u32 addr)
+ulong write_mp_table(ulong addr)
 {
 	struct mp_config_table *mc;
 	int ioapic_id, ioapic_ver;

index 3d36580..9564853 100644
@@ -131,7 +131,7 @@ static int sfi_write_xsdt(struct table_info *tab)
 	return 0;
 }
 
-u32 write_sfi_table(u32 base)
+ulong write_sfi_table(ulong base)
 {
 	struct table_info table;
 

index c338b82..975bbf2 100644
@@ -221,7 +221,7 @@ static smbios_write_type smbios_write_funcs[] = {
 	smbios_write_type127
 };
 
-u32 write_smbios_table(u32 addr)
+ulong write_smbios_table(ulong addr)
 {
 	struct smbios_entry *se;
 	ulong tables;

index f92111e..351fc44 100644
@@ -18,7 +18,7 @@
  * @addr:	start address to write the table
  * @return:	end address of the table
  */
-typedef u32 (*table_write)(u32 addr);
+typedef ulong (*table_write)(ulong addr);
 
 static table_write table_write_funcs[] = {
 #ifdef CONFIG_GENERATE_PIRQ_TABLE

index d43d1d3..a8af9e0 100644
@@ -32,7 +32,7 @@ static LIST_HEAD(fw_list);
  *          be ignored.
  * @return: 0 on success, or negative value on failure
  */
-static int bios_linker_allocate(struct bios_linker_entry *entry, u32 *addr)
+static int bios_linker_allocate(struct bios_linker_entry *entry, ulong *addr)
 {
 	uint32_t size, align;
 	struct fw_file *file;

@@ -147,7 +147,7 @@ static int bios_linker_add_checksum(struct bios_linker_entry *entry)
 }
 
 /* This function loads and patches ACPI tables provided by QEMU */
-u32 write_acpi_tables(u32 addr)
+ulong write_acpi_tables(ulong addr)
 {
 	int i, ret = 0;
 	struct fw_file *file;

index 146a4b0..30dbdca 100644
@@ -224,9 +224,9 @@ struct mp_ext_compat_address_space {
  * @mc:		configuration table header address
  * @return:	configuration table end address
  */
-static inline u32 mp_next_mpc_entry(struct mp_config_table *mc)
+static inline ulong mp_next_mpc_entry(struct mp_config_table *mc)
 {
-	return (u32)mc + mc->mpc_length;
+	return (ulong)mc + mc->mpc_length;
 }
 
 /**

@@ -254,9 +254,9 @@ static inline void mp_add_mpc_entry(struct mp_config_table *mc, uint length)
  * @mc:		configuration table header address
  * @return:	configuration table end address
  */
-static inline u32 mp_next_mpe_entry(struct mp_config_table *mc)
+static inline ulong mp_next_mpe_entry(struct mp_config_table *mc)
 {
-	return (u32)mc + mc->mpc_length + mc->mpe_length;
+	return (ulong)mc + mc->mpc_length + mc->mpe_length;
 }
 
 /**

index 516d7b3..17e977c 100644
@@ -25,10 +25,10 @@ static bool isa_irq_occupied[16];
 
 struct mp_config_table *mp_write_floating_table(struct mp_floating_table *mf)
 {
-	u32 mc;
+	ulong mc;
 
 	memcpy(mf->mpf_signature, MPF_SIGNATURE, 4);
-	mf->mpf_physptr = (u32)mf + sizeof(struct mp_floating_table);
+	mf->mpf_physptr = (ulong)mf + sizeof(struct mp_floating_table);
 	mf->mpf_length = 1;
 	mf->mpf_spec = MPSPEC_V14;
 	mf->mpf_checksum = 0;

@@ -41,7 +41,7 @@ struct mp_config_table *mp_write_floating_table(struct mp_floating_table *mf)
 	mf->mpf_feature5 = 0;
 	mf->mpf_checksum = table_compute_checksum(mf, mf->mpf_length * 16);
 
-	mc = (u32)mf + sizeof(struct mp_floating_table);
+	mc = (ulong)mf + sizeof(struct mp_floating_table);
 	return (struct mp_config_table *)mc;
 }
 

@@ -219,14 +219,14 @@ void mp_write_compat_address_space(struct mp_config_table *mc, int busid,
 
 u32 mptable_finalize(struct mp_config_table *mc)
 {
-	u32 end;
+	ulong end;
 
 	mc->mpe_checksum = table_compute_checksum((void *)mp_next_mpc_entry(mc),
 						  mc->mpe_length);
 	mc->mpc_checksum = table_compute_checksum(mc, mc->mpc_length);
 	end = mp_next_mpe_entry(mc);
 
-	debug("Write the MP table at: %x - %x\n", (u32)mc, end);
+	debug("Write the MP table at: %lx - %lx\n", (ulong)mc, end);
 
 	return end;
 }

@@ -371,7 +371,7 @@ ulong write_mp_table(ulong addr)
 	int ioapic_id, ioapic_ver;
 	int bus_isa = 0xff;
 	int ret;
-	u32 end;
+	ulong end;
 
 	/* 16 byte align the table address */
 	addr = ALIGN(addr, 16);

90 lines not on this page · raw message

index 5b58d6c..3c5e159 100644
@@ -21,6 +21,8 @@
 #include <asm/arch/pch.h>
 #include <asm/arch/sandybridge.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define GPIO_BASE	0x48
 #define BIOS_CTRL	0xdc
 

index 37e2e6e..59866bd 100644
@@ -19,6 +19,8 @@
 #include <asm/arch/pch.h>
 #include <asm/arch/sandybridge.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 struct gt_powermeter {
 	u16 reg;
 	u32 value;

index 4e0be2a..0b4343a 100644
@@ -20,6 +20,8 @@
 #include <asm/pci.h>
 #include <asm/arch/pch.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define NMI_OFF				0
 
 #define ENABLE_ACPI_MODE_IN_COREBOOT	0

index 38e244b..ae7c540 100644
@@ -23,6 +23,8 @@
 #include <asm/arch/bd82x6x.h>
 #include <asm/arch/model_206ax.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 static void enable_vmx(void)
 {
 	struct cpuid_result regs;

index 491f289..94f31c4 100644
@@ -19,6 +19,8 @@
 #include <asm/arch/model_206ax.h>
 #include <asm/arch/sandybridge.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int bridge_silicon_revision(struct udevice *dev)
 {
 	struct cpuid_result result;

index a0182dc..550a728 100644
@@ -248,11 +248,11 @@ static int intel_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
 static int intel_i2c_probe(struct udevice *dev)
 {
 	struct intel_i2c *priv = dev_get_priv(dev);
-	u32 base;
+	ulong base;
 
 	/* Save base address from PCI BAR */
-	priv->base = (u32)dm_pci_map_bar(dev, PCI_BASE_ADDRESS_4,
-					 PCI_REGION_IO);
+	priv->base = (ulong)dm_pci_map_bar(dev, PCI_BASE_ADDRESS_4,
+					   PCI_REGION_IO);
 	base = priv->base;
 
 	/* Set SMBus enable. */

index 11beeb2..0b30c9e 100644
@@ -13,7 +13,7 @@
 	EXPORT_FUNC(putc, void, putc, const char)
 	EXPORT_FUNC(puts, void, puts, const char *)
 	EXPORT_FUNC(printf, int, printf, const char*, ...)
-#if defined(CONFIG_X86) || defined(CONFIG_PPC)
+#if (defined(CONFIG_X86) && !defined(CONFIG_X86_64)) || defined(CONFIG_PPC)
 	EXPORT_FUNC(irq_install_handler, void, install_hdlr,
 		    int, interrupt_handler_t, void*)
 

index 85e361a..9d7c21d 100644
@@ -169,8 +169,10 @@ int print_cpuinfo(void)
 
 	/* Enable SPD ROMs and DDR-III DRAM */
 	ret = uclass_first_device_err(UCLASS_I2C, &dev);
-	if (ret)
+	if (ret) {
+		debug("%s: Failed to get I2C\n", __func__);
 		return ret;
+	}
 
 	/* Prepare USB controller early in S3 resume */
 	if (boot_mode == PEI_BOOT_RESUME) {

index e0b06b5..eef6d78 100644
@@ -207,8 +207,10 @@ static int copy_spd(struct udevice *dev, struct pei_data *peid)
 	int ret;
 
 	ret = mrc_locate_spd(dev, sizeof(peid->spd_data[0]), &data);
-	if (ret)
+	if (ret) {
+		debug("%s: Could not locate SPD\n", __func__);
 		return ret;
+	}
 
 	memcpy(peid->spd_data[0], data, sizeof(peid->spd_data[0]));
 

@@ -460,18 +462,26 @@ int dram_init(void)
 
 	/* We need the pinctrl set up early */
 	ret = syscon_get_by_driver_data(X86_SYSCON_PINCONF, &dev);
-	if (ret)
+	if (ret) {
+		debug("%s: Could not get pinconf\n", __func__);
 		return ret;
+	}
 
 	ret = uclass_first_device_err(UCLASS_NORTHBRIDGE, &dev);
-	if (ret)
+	if (ret) {
+		debug("%s: Could not get northbridge\n", __func__);
 		return ret;
+	}
 	ret = syscon_get_by_driver_data(X86_SYSCON_ME, &me_dev);
-	if (ret)
+	if (ret) {
+		debug("%s: Could not get ME\n", __func__);
 		return ret;
+	}
 	ret = copy_spd(dev, pei_data);
-	if (ret)
+	if (ret) {
+		debug("%s: Could not get SPD\n", __func__);
 		return ret;
+	}
 	pei_data->boot_mode = gd->arch.pei_boot_mode;
 	debug("Boot mode %d\n", gd->arch.pei_boot_mode);
 	debug("mrc_input %p\n", pei_data->mrc_input);

@@ -498,19 +508,27 @@ int dram_init(void)
 
 	/* Wait for ME to be ready */
 	ret = intel_early_me_init(me_dev);
-	if (ret)
+	if (ret) {
+		debug("%s: Could not init ME\n", __func__);
 		return ret;
+	}
 	ret = intel_early_me_uma_size(me_dev);
-	if (ret < 0)
+	if (ret < 0) {
+		debug("%s: Could not get UMA size\n", __func__);
 		return ret;
+	}
 
 	ret = mrc_common_init(dev, pei_data, false);
-	if (ret)
+	if (ret) {
+		debug("%s: mrc_common_init() failed\n", __func__);
 		return ret;
+	}
 
 	ret = sdram_find(dev);
-	if (ret)
+	if (ret) {
+		debug("%s: sdram_find() failed\n", __func__);
 		return ret;
+	}
 	gd->ram_size = gd->arch.meminfo.total_32bit_memory;
 
 	debug("MRC output data length %#x at %p\n", pei_data->mrc_output_len,

index 59866bd..cf0c91d 100644
@@ -831,7 +831,7 @@ int gma_func0_init(struct udevice *dev)
 	mtrr_add_request(MTRR_TYPE_WRCOMB, base, 256 << 20);
 	mtrr_commit(true);
 
-	gtt_bar = (void *)dm_pci_read_bar32(dev, 0);
+	gtt_bar = (void *)(ulong)dm_pci_read_bar32(dev, 0);
 	debug("GT bar %p\n", gtt_bar);
 	ret = gma_pm_init_pre_vbios(gtt_bar, rev);
 	if (ret)

index 1ce8195..bf11d48 100644
@@ -54,7 +54,7 @@ static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch)
 
 	mode = fdt_getprop(blob, node, "intel,sata-mode", NULL);
 	if (!mode || !strcmp(mode, "ahci")) {
-		u32 abar;
+		ulong abar;
 
 		debug("SATA: Controller in AHCI mode\n");
 

@@ -73,7 +73,7 @@ static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch)
 
 		/* Initialize AHCI memory-mapped space */
 		abar = dm_pci_read_bar32(dev, 5);
-		debug("ABAR: %08X\n", abar);
+		debug("ABAR: %08lx\n", abar);
 		/* CAP (HBA Capabilities) : enable power management */
 		reg32 = readl(abar + 0x00);
 		reg32 |= 0x0c006000;  /* set PSC+SSC+SALP+SSS */

index 0b4343a..c564713 100644
@@ -215,10 +215,10 @@ static int pch_power_options(struct udevice *pch)
 	dm_pci_read_config16(pch, 0x40, &pmbase);
 	pmbase &= 0xfffe;
 
-	writel(pmbase + GPE0_EN, fdtdec_get_int(blob, node,
-						"intel,gpe0-enable", 0));
-	writew(pmbase + ALT_GP_SMI_EN, fdtdec_get_int(blob, node,
-						"intel,alt-gp-smi-enable", 0));
+	writel(fdtdec_get_int(blob, node, "intel,gpe0-enable", 0),
+	       (ulong)pmbase + GPE0_EN);
+	writew(fdtdec_get_int(blob, node, "intel,alt-gp-smi-enable", 0),
+	       (ulong)pmbase + ALT_GP_SMI_EN);
 
 	/* Set up power management block and determine sleep mode */
 	reg32 = inl(pmbase + 0x04); /* PM1_CNT */

index c564713..aef1206 100644
@@ -357,10 +357,10 @@ static void enable_clock_gating(struct udevice *pch)
 	reg16 |= (1 << 2) | (1 << 11);
 	dm_pci_write_config16(pch, GEN_PMCON_1, reg16);
 
-	pch_iobp_update(pch, 0xEB007F07, ~0UL, (1 << 31));
-	pch_iobp_update(pch, 0xEB004000, ~0UL, (1 << 7));
-	pch_iobp_update(pch, 0xEC007F07, ~0UL, (1 << 31));
-	pch_iobp_update(pch, 0xEC004000, ~0UL, (1 << 7));
+	pch_iobp_update(pch, 0xeb007f07, ~0U, 1 << 31);
+	pch_iobp_update(pch, 0xeb004000, ~0U, 1 << 7);
+	pch_iobp_update(pch, 0xec007f07, ~0U, 1 << 31);
+	pch_iobp_update(pch, 0xec004000, ~0U, 1 << 7);
 
 	reg32 = readl(RCB_REG(CG));
 	reg32 |= (1 << 31);

index 3fb3546..4a82f63 100644
@@ -139,7 +139,7 @@ struct hob_guid {
  */
 static inline const struct hob_header *get_next_hob(const struct hob_header *hdr)
 {
-	return (const struct hob_header *)((u32)hdr + hdr->len);
+	return (const struct hob_header *)((uintptr_t)hdr + hdr->len);
 }
 
 /**

index c689a63..ef05ac4 100644
@@ -9,7 +9,5 @@
 #define _INIT_HELPERS_H_
 
 int init_cache_f_r(void);
-int init_bd_struct_r(void);
-int init_func_spi(void);
 
 #endif	/* !_INIT_HELPERS_H_ */

index bac671d..2a186fc 100644
@@ -30,13 +30,3 @@ int init_cache_f_r(void)
 	/* Initialise the CPU cache(s) */
 	return init_cache();
 }
-
-bd_t bd_data;
-
-int init_bd_struct_r(void)
-{
-	gd->bd = &bd_data;
-	memset(gd->bd, 0, sizeof(bd_t));
-
-	return 0;
-}

index 9324bdb..66d7629 100644
@@ -157,7 +157,7 @@ static void setup_realmode_idt(void)
 	 for (i = 0; i < 256; i++) {
 		idts[i].cs = 0;
 		idts[i].offset = 0x1000 + (i * __idt_handler_size);
-		write_idt_stub((void *)((u32)idts[i].offset), i);
+		write_idt_stub((void *)((ulong)idts[i].offset), i);
 	}
 
 	/*

@@ -227,7 +227,7 @@ static void vbe_set_graphics(int vesa_mode, struct vbe_mode_info *mode_info)
 	mode_info->video_mode = (1 << 14) | vesa_mode;
 	vbe_get_mode_info(mode_info);
 
-	framebuffer = (unsigned char *)mode_info->vesa.phys_base_ptr;
+	framebuffer = (unsigned char *)(ulong)mode_info->vesa.phys_base_ptr;
 	debug("VBE: resolution:  %dx%d@%d\n",
 	      le16_to_cpu(mode_info->vesa.x_resolution),
 	      le16_to_cpu(mode_info->vesa.y_resolution),

index 3f94cdf..fb2d294 100644
@@ -104,7 +104,7 @@ static int ich6_pinctrl_cfg_pin(s32 gpiobase, s32 iobase, int pin_node)
 
 	/* if iobase is present, let's configure the pad */
 	if (iobase != -1) {
-		int iobase_addr;
+		ulong iobase_addr;
 
 		/*
 		 * The offset for the same pin for the IOBASE and GPIOBASE are

index a93d355..c98526d 100644
@@ -114,14 +114,14 @@ u32 copy_pirq_routing_table(u32 addr, struct irq_routing_table *rt)
 	addr = ALIGN(addr, 16);
 
 	debug("Copying Interrupt Routing Table to 0x%x\n", addr);
-	memcpy((void *)addr, rt, rt->size);
+	memcpy((void *)(uintptr_t)addr, rt, rt->size);
 
 	/*
 	 * We do the sanity check here against the copied table after memcpy,
 	 * as something might go wrong after the memcpy, which is normally
 	 * due to the F segment decode is not turned on to systeam RAM.
 	 */
-	rom_rt = (struct irq_routing_table *)addr;
+	rom_rt = (struct irq_routing_table *)(uintptr_t)addr;
 	if (rom_rt->signature != PIRQ_SIGNATURE ||
 	    rom_rt->version != PIRQ_VERSION || rom_rt->size % 16) {
 		printf("Interrupt Routing Table not valid\n");

index 9564853..507e037 100644
@@ -38,14 +38,14 @@ static void *get_entry_start(struct table_info *tab)
 	tab->table[tab->count] = tab->entry_start;
 	tab->entry_start += sizeof(struct sfi_table_header);
 
-	return (void *)tab->entry_start;
+	return (void *)(uintptr_t)tab->entry_start;
 }
 
 static void finish_table(struct table_info *tab, const char *sig, void *entry)
 {
 	struct sfi_table_header *hdr;
 
-	hdr = (struct sfi_table_header *)(tab->base + tab->ptr);
+	hdr = (struct sfi_table_header *)(uintptr_t)(tab->base + tab->ptr);
 	strcpy(hdr->sig, sig);
 	hdr->len = sizeof(*hdr) + ((ulong)entry - tab->entry_start);
 	hdr->rev = 1;

index 1b33c77..b6b0f2b 100644
@@ -165,7 +165,7 @@ struct boot_params *load_zimage(char *image, unsigned long kernel_size,
 		 * A very old kernel MUST have its real-mode code
 		 * loaded at 0x90000
 		 */
-		if ((u32)setup_base != 0x90000) {
+		if ((ulong)setup_base != 0x90000) {
 			/* Copy the real-mode kernel */
 			memmove((void *)0x90000, setup_base, setup_size);
 

index 67bace4..eca88ac 100644
@@ -198,11 +198,13 @@ int mrccache_get_region(struct udevice **devp, struct mrc_region *entry)
 
 	/* Find the flash chip within the SPI controller node */
 	node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
-	if (node < 0)
+	if (node < 0) {
+		debug("%s: Cannot find SPI flash\n", __func__);
 		return -ENOENT;
+	}
 
 	if (fdtdec_get_int_array(blob, node, "memory-map", reg, 2))
-		return -FDT_ERR_NOTFOUND;
+		return -EINVAL;
 	entry->base = reg[0];
 
 	/* Find the place where we put the MRC cache */

@@ -211,7 +213,7 @@ int mrccache_get_region(struct udevice **devp, struct mrc_region *entry)
 		return -EPERM;
 
 	if (fdtdec_get_int_array(blob, mrc_node, "reg", reg, 2))
-		return -FDT_ERR_NOTFOUND;
+		return -EINVAL;
 	entry->offset = reg[0];
 	entry->length = reg[1];
 

index 2a186fc..420393b 100644
@@ -19,7 +19,7 @@ __weak ulong board_get_usable_ram_top(ulong total_size)
 
 int init_cache_f_r(void)
 {
-#if defined(CONFIG_X86_RESET_VECTOR) & !defined(CONFIG_HAVE_FSP)
+#if CONFIG_IS_ENABLED(X86_32BIT_INIT) && !defined(CONFIG_HAVE_FSP)
 	int ret;
 
 	ret = mtrr_commit(false);