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PA-RISC update to 87415

PATCH Applied Grant Grundler 2 participants 9 messages Nov 3, 2004 – Nov 6, 2004 libata

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#0 lore raw

PATCH 1/1 PA-RISC update to 87415

Bartlomiej,
Here's a "final" patch to cleanup the exporting of IDE data to suckyio support. I sent this before but it wasn't "verified" at the time:
http://marc.theaimsgroup.com/?l=linux-ide&m=109587104530498&w=2

It's verified now to work and should be applied.

Changelog comment should read:
Move Superio (NatSem 87560) IDE hacks into the ns87415 driver instead of exporting IDE data structures.
To date, only PA-RISC port is known to use the 87560 chip.

thanks,
grant

----- Forwarded message from Matthew Wilcox <[email protected]> -----

tp://cvs.parisc-linux.org/linux-2.6/arch/parisc/kernel/drivers.c.diff?cvsroot=&r1=1.15&r2=1.16
http://cvs.parisc-linux.org/linux-2.6/include/asm-parisc/io.h.diff?cvsroot=&r1=1.11&r2=1.12

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Can I have a better description for this patch than "Superio cleanup"? And if you'd like to send it to Bartlomiej Zolnierkiewicz <[email protected]> yourself, that's more than fine by me ;-)

drivers/ide/pci/ns87415.c +81 -4
diff -urpNX dontdiff linux-2.6.10-rc1-bk13/drivers/ide/pci/ns87415.c parisc-2.6-bk/drivers/ide/pci/ns87415.c
@@ -4,6 +4,7 @@
  * Copyright (C) 1997-1998	Mark Lord <[email protected]>
  * Copyright (C) 1998		Eddie C. Dost <[email protected]>
  * Copyright (C) 1999-2000	Andre Hedrick <[email protected]>
+ * Copyright (C) 2004		Grant Grundler <grundler at parisc-linux.org>
  *
  * Inspired by an earlier effort from David S. Miller <[email protected]>
  */
@@ -25,6 +26,75 @@
 
 #include <asm/io.h>
 
+#ifdef CONFIG_SUPERIO
+/* SUPERIO 87560 is a PoS chip that NatSem denies exists.
+ * Unfortunately, it's built-in on all Astro-based PA-RISC workstations
+ * which use the integrated NS87514 cell for CD-ROM support.
+ * i.e we have to support for CD-ROM installs.
+ * See drivers/parisc/superio.c for more gory details.
+ */
+#include <asm/superio.h>
+
+static unsigned long superio_ide_status[2];
+static unsigned long superio_ide_select[2];
+static unsigned long superio_ide_dma_status[2];
+
+#define SUPERIO_IDE_MAX_RETRIES 25
+
+/* Because of a defect in Super I/O, all reads of the PCI DMA status 
+ * registers, IDE status register and the IDE select register need to be 
+ * retried
+ */
+static u8 superio_ide_inb (unsigned long port)
+{
+	if (port == superio_ide_status[0] ||
+	    port == superio_ide_status[1] ||
+	    port == superio_ide_select[0] ||
+	    port == superio_ide_select[1] ||
+	    port == superio_ide_dma_status[0] ||
+	    port == superio_ide_dma_status[1]) {
+		u8 tmp;
+		int retries = SUPERIO_IDE_MAX_RETRIES;
+
+		/* printk(" [ reading port 0x%x with retry ] ", port); */
+
+		do {
+			tmp = inb(port);
+			if (tmp == 0)
+				udelay(50);
+		} while (tmp == 0 && retries-- > 0);
+
+		return tmp;
+	}
+
+	return inb(port);
+}
+
+static void __devinit superio_ide_init_iops (struct hwif_s *hwif)
+{
+	u32 base, dmabase;
+	u8 tmp;
+	struct pci_dev *pdev = hwif->pci_dev;
+	u8 port = hwif->channel;
+
+	base = pci_resource_start(pdev, port * 2) & ~3;
+	dmabase = pci_resource_start(pdev, 4) & ~3;
+
+	superio_ide_status[port] = base + IDE_STATUS_OFFSET;
+	superio_ide_select[port] = base + IDE_SELECT_OFFSET;
+	superio_ide_dma_status[port] = dmabase + (!port ? 2 : 0xa);
+	
+	/* Clear error/interrupt, enable dma */
+	tmp = superio_ide_inb(superio_ide_dma_status[port]);
+	outb(tmp | 0x66, superio_ide_dma_status[port]);
+
+	/* We need to override inb to workaround a SuperIO errata */
+	hwif->INB = superio_ide_inb;
+}
+#else
+static void __devinit superio_ide_init_iops (struct hwif_s *hwif) {}
+#endif
+
 static unsigned int ns87415_count = 0, ns87415_control[MAX_HWIFS] = { 0 };
 
 /*
@@ -119,6 +189,16 @@ static int ns87415_ide_dma_check (ide_dr
 	return __ide_dma_check(drive);
 }
 
+static void __init init_iops_ns87415(ide_hwif_t *hwif)
+{
+#ifdef CONFIG_PARISC
+	if (PCI_SLOT(hwif->pci_dev->devfn) == 0xE) {
+		/* Built-in - assume it's under superio. */
+		superio_ide_init_iops(hwif);
+	}
+#endif
+}
+
 static void __init init_hwif_ns87415 (ide_hwif_t *hwif)
 {
 	struct pci_dev *dev = hwif->pci_dev;
@@ -132,10 +212,6 @@ static void __init init_hwif_ns87415 (id
 	hwif->autodma = 0;
 	hwif->selectproc = &ns87415_selectproc;
 
-	/* Set a good latency timer and cache line size value. */
-	(void) pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
-	/* FIXME: use pci_set_master() to ensure good latency timer value */
-
 	/*
 	 * We cannot probe for IRQ: both ports share common IRQ on INTA.
 	 * Also, leave IRQ masked during drive probing, to prevent infinite
@@ -205,6 +281,7 @@ static void __init init_hwif_ns87415 (id
 
 static ide_pci_device_t ns87415_chipset __devinitdata = {
 	.name		= "NS87415",
+	.init_iops	= init_iops_ns87415,
 	.init_hwif	= init_hwif_ns87415,
 	.channels	= 2,
 	.autodma	= AUTODMA,
Signature · 2 lines
"Next the s
----- End forwarded message -----
#1 lore raw
Quoted 7 lines · Grant Grundler

Bartlomiej,
Here's a "final" patch to cleanup the exporting of IDE data to suckyio support. I sent this before but it wasn't "verified" at the time:
http://marc.theaimsgroup.com/?l=linux-ide&m=109587104530498&w=2

It's verified now to work and should be applied.

thanks, looks OK

I only wonder about this change:

drivers/ide/pci/ns87415.c static void __init init_hwif_ns87415 (id · line 217

Quoted 11 lines
drivers/ide/pci/ns87415.c +0 -4
@@ -132,10 +212,6 @@ static void __init init_hwif_ns87415 (id
        hwif->autodma = 0;
        hwif->selectproc = &ns87415_selectproc;
 
-       /* Set a good latency timer and cache line size value. */
-       (void) pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
-       /* FIXME: use pci_set_master() to ensure good latency timer value */
-
        /*
         * We cannot probe for IRQ: both ports share common IRQ on INTA.
         * Also, leave IRQ masked during drive probing, to prevent infinite

?

#2 lore raw
Quoted 10 lines · Bartlomiej Zolnierkiewicz

I only wonder about this change:

drivers/ide/pci/ns87415.c static void __init init_hwif_ns87415 (id · line 138

Quoted 8 lines
drivers/ide/pci/ns87415.c +0 -4
@@ -132,10 +212,6 @@ static void __init init_hwif_ns87415 (id
        hwif->autodma = 0;
        hwif->selectproc = &ns87415_selectproc;
 
-       /* Set a good latency timer and cache line size value. */
-       (void) pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
-       /* FIXME: use pci_set_master() to ensure good latency timer value */
-

I don't expect a driver to always blindly write this value since it affects the max latency other PCI bus guests will see. 64 is a fairly safe value if you really want to keep that bit of code in.

ide_hwif_setup_dma() calls pci_set_master() if necessary. pci_set_master() (indirectly via pcibios_set_master() sets PCI_LATENCY_TIMER to a "reasonable" value.

grundler <506>fgrep pci_set_master drivers/ide/*
drivers/ide/setup-pci.c: pci_set_master(dev);

thanks,
grant

#3 lore raw
In reply to Bartlomiej Zolnierkiewicz
Quoted 9 lines · Bartlomiej Zolnierkiewicz

I only wonder about this change:

drivers/ide/pci/ns87415.c static void __init init_hwif_ns87415 (id · line 137

Quoted 7 lines
drivers/ide/pci/ns87415.c +0 -3
@@ -132,10 +212,6 @@ static void __init init_hwif_ns87415 (id
        hwif->autodma = 0;
        hwif->selectproc = &ns87415_selectproc;
 
-       /* Set a good latency timer and cache line size value. */
-       (void) pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
-       /* FIXME: use pci_set_master() to ensure good latency timer value */

Bartlomiej,
two more notes:
1) both comments are wrong.
(byte write only covers LATENCY, pci_set_master is called)

2) I realize now this should have been submitted this as a seperate patch. Sorry about that. I didn't review the patch today (again) as thoroughly as I should have. I started glossing over it when I saw all the suckyio code that I've stared at more than a few times...*sigh*
You want a seperate patch+changelog entry for this one or was the previous email sufficient?

thanks,
grant

#4 lore raw
Quoted 9 lines · Grant Grundler
Quoted 6 lines · Bartlomiej Zolnierkiewicz

I only wonder about this change:

Quoted 4 lines
drivers/ide/pci/ns87415.c +0 -0
@@ -132,10 +212,6 @@ static void __init init_hwif_ns87415 (id
        hwif->autodma = 0;
        hwif->selectproc = &ns87415_selectproc;
 
Quoted 8 lines
Quoted 3 lines

drivers/ide/pci/ns87415.c static void __init init_hwif_ns87415 (id · line 137

Quoted 3 lines
drivers/ide/pci/ns87415.c +0 -3
-       /* Set a good latency timer and cache line size value. */
-       (void) pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
-       /* FIXME: use pci_set_master() to ensure good latency timer value */

Bartlomiej,
two more notes:
1) both comments are wrong.
(byte write only covers LATENCY, pci_set_master is called)

?

Quoted 6 lines

2) I realize now this should have been submitted this as a seperate patch. Sorry about that. I didn't review the patch today (again) as thoroughly as I should have. I started glossing over it when I saw all the suckyio code that I've stared at more than a few times...*sigh*
You want a seperate patch+changelog entry for this one or was the previous email sufficient?

Please make a separate patch+changelog if this is not a problem.

Thanks.

#5 lore raw
Quoted 1 line · Bartlomiej Zolnierkiewicz

Please make a separate patch+changelog if this is not a problem.

ide_hwif_setup_dma() calls pci_set_master() if necessary. pci_set_master() (indirectly via pcibios_set_master() sets PCI_LATENCY_TIMER to a "reasonable" value.

Index: linux-2.6/drivers/ide/pci/ns87415.c
===================================================================
RCS file: /var/cvs/linux-2.6/drivers/ide/pci/ns87415.c,v retrieving revision 1.17
retrieving revision 1.18

drivers/ide/pci/ns87415.c +0 -4
diff -u -p -r1.17 -r1.18
@@ -153,10 +223,6 @@ static void __init init_hwif_ns87415 (id
 	hwif->autodma = 0;
 	hwif->selectproc = &ns87415_selectproc;
 
-	/* Set a good latency timer and cache line size value. */
-	(void) pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
-	/* FIXME: use pci_set_master() to ensure good latency timer value */
-
 	/*
 	 * We cannot probe for IRQ: both ports share common IRQ on INTA.
 	 * Also, leave IRQ masked during drive probing, to prevent infinite
#6 lore raw
In reply to Bartlomiej Zolnierkiewicz
Quoted 4 lines · Bartlomiej Zolnierkiewicz
Quoted 2 lines

1) both comments are wrong.
(byte write only covers LATENCY, pci_set_master is called)

?

	/* Set a good latency timer and cache line size value. */

The PCI config write only modifies the latency timer, not the cache line size register.

#define PCI_CACHE_LINE_SIZE     0x0c    /* 8 bits */
#define PCI_LATENCY_TIMER       0x0d    /* 8 bits */
	/* FIXME: use pci_set_master() to ensure good latency timer value */

This has been in fact already been fixed. That's why I submitted the patch to delete the code.

thanks,
grant

#7 lore raw

applied

I had to cover init_iops_ns87415 by CONFIG_SUPERIO to fix:

drivers/ide/pci/ns87415.c:95: warning: `superio_ide_init_iops' defined but not used

I also marked init_iops_ns87415 with __devinit

#8 lore raw
Quoted 1 line · Bartlomiej Zolnierkiewicz

applied

Thanks!

Quoted 6 lines

I had to cover init_iops_ns87415 by CONFIG_SUPERIO to fix:

drivers/ide/pci/ns87415.c:95: warning: `superio_ide_init_iops' defined but not used

I also marked init_iops_ns87415 with __devinit

oh - sorry. I only tested with CONFIG_SUPERIO enabled since that's the platform I'm focused on requires. Thanks for cleaning up instead of bouncing it.

grant