ARM: dts: imx: remove the use of pingrp macros

PATCH New Shawn Guo 6 participants 21 messages Jan 25, 2014 – Jan 29, 2014

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Shawn Guo

author

2014-01-25 16:43 UTC #0 lore raw

cover ARM: dts: imx: remove the use of pingrp macros

Hi Rob,

In order to solve a pinctrl data efficiency problem, we introduced pingrp macros [1] in this development cycle as the base of board dts support. The whole imx-dt-3.14 pull request has been held by Olof for a few weeks because he wants to get a general approval from DT folks on this change. But unfortunately it appears that you are not fond of this change.

I just spent the day to create a patch series against imx-dt-3.14 to remove these pingrp macros. May I get your nod on this quick turn-around, so that we do not miss the merge window?

Hi Olof,

I guess we do not have to shut the door for imx-dt-3.14 if you and DT folks are happy with this patch series, which is a quite straight forward search&replace change?

Shawn

[1] http://thread.gmane.org/gmane.linux.ports.arm.kernel/275912/

Shawn Guo (9):
ARM: dts: imx6qdl: remove the use of pingrp macros
ARM: dts: imx6sl: remove the use of pingrp macros
ARM: dts: imx53: remove the use of pingrp macros
ARM: dts: imx51: remove the use of pingrp macros
ARM: dts: imx50: remove the use of pingrp macros
ARM: dts: imx35: remove the use of pingrp macros
ARM: dts: imx25: remove the use of pingrp macros
ARM: dts: imx27: remove the use of pingrp macros
ARM: dts: vf610: remove the use of pingrp macros

 arch/arm/boot/dts/imx25-eukrea-cpuimx25.dtsi       |   17 +-
 .../boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts  |   56 ++-
 arch/arm/boot/dts/imx25-pingrp.h                   |   81 ---
 arch/arm/boot/dts/imx25.dtsi                       |    2 +-
 arch/arm/boot/dts/imx27-apf27.dts                  |   26 +-
 arch/arm/boot/dts/imx27-apf27dev.dts               |   65 ++-
 arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts   |   27 +-
 arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts   |   26 +-
 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts     |   23 +-
 arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi    |   38 +-
 arch/arm/boot/dts/imx27-pingrp.h                   |  151 ------
 arch/arm/boot/dts/imx27.dtsi                       |    2 +-
 arch/arm/boot/dts/imx35-pingrp.h                   |  104 ----
 arch/arm/boot/dts/imx35.dtsi                       |    1 -
 arch/arm/boot/dts/imx50-evk.dts                    |   28 +-
 arch/arm/boot/dts/imx50-pingrp.h                   |  146 ------
 arch/arm/boot/dts/imx50.dtsi                       |    2 +-
 arch/arm/boot/dts/imx51-apf51.dts                  |   26 +-
 arch/arm/boot/dts/imx51-apf51dev.dts               |   64 ++-
 arch/arm/boot/dts/imx51-babbage.dts                |  142 +++++-
 arch/arm/boot/dts/imx51-eukrea-cpuimx51.dtsi       |   26 +-
 .../boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts  |   31 +-
 arch/arm/boot/dts/imx51-pingrp.h                   |  249 ---------
 arch/arm/boot/dts/imx51.dtsi                       |    2 +-
 arch/arm/boot/dts/imx53-ard.dts                    |   18 +-
 arch/arm/boot/dts/imx53-evk.dts                    |   51 +-
 arch/arm/boot/dts/imx53-m53evk.dts                 |  128 ++++-
 arch/arm/boot/dts/imx53-pingrp.h                   |  352 -------------
 arch/arm/boot/dts/imx53-qsb.dts                    |   88 +++-
 arch/arm/boot/dts/imx53-smd.dts                    |   77 ++-
 arch/arm/boot/dts/imx53-tqma53.dtsi                |   89 +++-
 arch/arm/boot/dts/imx53-voipac-bsb.dts             |   21 +-
 arch/arm/boot/dts/imx53-voipac-dmm-668.dtsi        |   47 +-
 arch/arm/boot/dts/imx53.dtsi                       |    2 +-
 arch/arm/boot/dts/imx6dl-hummingboard.dts          |    5 +-
 arch/arm/boot/dts/imx6dl.dtsi                      |    1 -
 arch/arm/boot/dts/imx6q-arm2.dts                   |   81 ++-
 arch/arm/boot/dts/imx6q-cm-fx6.dts                 |   44 +-
 arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts            |   47 +-
 arch/arm/boot/dts/imx6q-gw5400-a.dts               |   75 ++-
 arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi         |   53 +-
 arch/arm/boot/dts/imx6q-sbc6x.dts                  |   37 +-
 arch/arm/boot/dts/imx6q-udoo.dts                   |   33 +-
 arch/arm/boot/dts/imx6q.dtsi                       |    1 -
 arch/arm/boot/dts/imx6qdl-gw51xx.dtsi              |   77 ++-
 arch/arm/boot/dts/imx6qdl-gw52xx.dtsi              |   88 +++-
 arch/arm/boot/dts/imx6qdl-gw53xx.dtsi              |   93 +++-
 arch/arm/boot/dts/imx6qdl-gw54xx.dtsi              |   93 +++-
 arch/arm/boot/dts/imx6qdl-microsom.dtsi            |    5 +-
 arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi          |   56 ++-
 arch/arm/boot/dts/imx6qdl-pingrp.h                 |  532 --------------------
 arch/arm/boot/dts/imx6qdl-sabreauto.dtsi           |  139 ++++-
 arch/arm/boot/dts/imx6qdl-sabrelite.dtsi           |   56 ++-
 arch/arm/boot/dts/imx6qdl-sabresd.dtsi             |   86 +++-
 arch/arm/boot/dts/imx6qdl-wandboard.dtsi           |   78 ++-
 arch/arm/boot/dts/imx6sl-evk.dts                   |  120 ++++-
 arch/arm/boot/dts/imx6sl-pingrp.h                  |  148 ------
 arch/arm/boot/dts/imx6sl.dtsi                      |    1 -
 arch/arm/boot/dts/vf610-cosmic.dts                 |   17 +-
 arch/arm/boot/dts/vf610-pingrp.h                   |  127 -----
 arch/arm/boot/dts/vf610-twr.dts                    |   42 +-
 arch/arm/boot/dts/vf610.dtsi                       |    2 +-
 62 files changed, 2163 insertions(+), 2182 deletions(-)
 delete mode 100644 arch/arm/boot/dts/imx25-pingrp.h
 delete mode 100644 arch/arm/boot/dts/imx27-pingrp.h
 delete mode 100644 arch/arm/boot/dts/imx35-pingrp.h
 delete mode 100644 arch/arm/boot/dts/imx50-pingrp.h
 delete mode 100644 arch/arm/boot/dts/imx51-pingrp.h
 delete mode 100644 arch/arm/boot/dts/imx53-pingrp.h
 delete mode 100644 arch/arm/boot/dts/imx6qdl-pingrp.h
 delete mode 100644 arch/arm/boot/dts/imx6sl-pingrp.h
 delete mode 100644 arch/arm/boot/dts/vf610-pingrp.h

Signature · 1 line

1.7.9.5

Shawn Guo

author

2014-01-25 16:43 UTC #1 lore raw

PATCH 1/9 ARM: dts: imx6qdl: remove the use of pingrp macros

We created the pingrp macros in imx6qdl-pingrp.h for purpose of less LOC when same pin group is used by multiple boards. However, DT maintainers take it as an abuse of DTC macro support. So let's get rid of it to make the pins used by given device more intuitive.

Signed-off-by Shawn Guo <[email protected]>

---
 arch/arm/boot/dts/imx6dl-hummingboard.dts  |    5 +-
 arch/arm/boot/dts/imx6dl.dtsi              |    1 -
 arch/arm/boot/dts/imx6q-arm2.dts           |   81 ++++-
 arch/arm/boot/dts/imx6q-cm-fx6.dts         |   44 ++-
 arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts    |   47 ++-
 arch/arm/boot/dts/imx6q-gw5400-a.dts       |   75 +++-
 arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi |   53 ++-
 arch/arm/boot/dts/imx6q-sbc6x.dts          |   37 +-
 arch/arm/boot/dts/imx6q-udoo.dts           |   33 +-
 arch/arm/boot/dts/imx6q.dtsi               |    1 -
 arch/arm/boot/dts/imx6qdl-gw51xx.dtsi      |   77 +++-
 arch/arm/boot/dts/imx6qdl-gw52xx.dtsi      |   88 ++++-
 arch/arm/boot/dts/imx6qdl-gw53xx.dtsi      |   93 ++++-
 arch/arm/boot/dts/imx6qdl-gw54xx.dtsi      |   93 ++++-
 arch/arm/boot/dts/imx6qdl-microsom.dtsi    |    5 +-
 arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi  |   56 ++-
 arch/arm/boot/dts/imx6qdl-pingrp.h         |  532 ----------------------------
 arch/arm/boot/dts/imx6qdl-sabreauto.dtsi   |  139 +++++++-
 arch/arm/boot/dts/imx6qdl-sabrelite.dtsi   |   56 ++-
 arch/arm/boot/dts/imx6qdl-sabresd.dtsi     |   86 ++++-
 arch/arm/boot/dts/imx6qdl-wandboard.dtsi   |   78 +++-
 21 files changed, 1013 insertions(+), 667 deletions(-)
 delete mode 100644 arch/arm/boot/dts/imx6qdl-pingrp.h

arch/arm/boot/dts/imx6dl-hummingboard.dts +4 -1

index a3513fc..26dbb3e 100644
@@ -60,7 +60,10 @@
 		};
 
 		pinctrl_hummingboard_i2c1: hummingboard-i2c1 {
-			fsl,pins = <MX6QDL_I2C1_PINGRP1>;
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+				MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+			>;
 		};
 
 		pinctrl_hummingboard_spdif: hummingboard-spdif {

arch/arm/boot/dts/imx6dl.dtsi +0 -1

index e2ec0fb..9c4942f 100644
@@ -10,7 +10,6 @@
 
 #include <dt-bindings/interrupt-controller/irq.h>
 #include "imx6dl-pinfunc.h"
-#include "imx6qdl-pingrp.h"
 #include "imx6qdl.dtsi"
 
 / {

arch/arm/boot/dts/imx6q-arm2.dts +74 -7

108 lines not on this page · raw message

arch/arm/boot/dts/imx6q-cm-fx6.dts +41 -3

56 lines not on this page · raw message

arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts +41 -6

71 lines not on this page · raw message

arch/arm/boot/dts/imx6q-gw5400-a.dts +64 ~~-11~~

111 lines not on this page · raw message

arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi +47 -6

74 lines not on this page · raw message

arch/arm/boot/dts/imx6q-sbc6x.dts +33 -4

index 852675a..7b63bcf 100644
@@ -28,19 +28,48 @@
 &iomuxc {
 	imx6q-sbc6x {
 		pinctrl_enet: enetgrp {
-			fsl,pins = <MX6QDL_ENET_PINGRP1>;
+			fsl,pins = <
+				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
+				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
+				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
+				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
+				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
+				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
+				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0
+				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
+				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
+				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
+				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
+				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
+				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
+				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
+				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
+				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
+			>;
 		};
 
 		pinctrl_uart1: uart1grp {
-			fsl,pins = <MX6QDL_UART1_PINGRP1>;
+			fsl,pins = <
+				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
+				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1
+			>;
 		};
 
 		pinctrl_usbotg: usbotggrp {
-			fsl,pins = <MX6QDL_USBOTG_PINGRP1>;
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
+			>;
 		};
 
 		pinctrl_usdhc3: usdhc3grp {
-			fsl,pins = <MX6QDL_USDHC3_PINGRP_D4>;
+			fsl,pins = <
+				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
+				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
+				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
+				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
+				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
+				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
+			>;
 		};
 	};
 };

arch/arm/boot/dts/imx6q-udoo.dts +30 -3

index 47a5eda..ed397d1 100644
@@ -31,15 +31,42 @@
 &iomuxc {
 	imx6q-udoo {
 		pinctrl_enet: enetgrp {
-			fsl,pins = <MX6QDL_ENET_PINGRP1>;
+			fsl,pins = <
+				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
+				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
+				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
+				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
+				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
+				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
+				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0
+				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
+				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
+				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
+				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
+				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
+				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
+				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
+				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
+				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
+			>;
 		};
 
 		pinctrl_uart2: uart2grp {
-			fsl,pins = <MX6QDL_UART2_PINGRP1>;
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
+				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
+			>;
 		};
 
 		pinctrl_usdhc3: usdhc3grp {
-			fsl,pins = <MX6QDL_USDHC3_PINGRP_D4>;
+			fsl,pins = <
+				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
+				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
+				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
+				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
+				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
+				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
+			>;
 		};
 	};
 };

arch/arm/boot/dts/imx6q.dtsi +0 -1

index 021e0cb..6295fa8 100644
@@ -10,7 +10,6 @@
 
 #include <dt-bindings/interrupt-controller/irq.h>
 #include "imx6q-pinfunc.h"
-#include "imx6qdl-pingrp.h"
 #include "imx6qdl.dtsi"
 
 / {

arch/arm/boot/dts/imx6qdl-gw51xx.dtsi +67 ~~-10~~

110 lines not on this page · raw message

arch/arm/boot/dts/imx6qdl-gw52xx.dtsi +77 ~~-11~~

124 lines not on this page · raw message

arch/arm/boot/dts/imx6qdl-gw53xx.dtsi +81 ~~-12~~

132 lines not on this page · raw message

arch/arm/boot/dts/imx6qdl-gw54xx.dtsi +81 ~~-12~~

132 lines not on this page · raw message

arch/arm/boot/dts/imx6qdl-microsom.dtsi +4 -1

index 524c169..c9ec334 100644
@@ -57,7 +57,10 @@
 		};
 
 		pinctrl_microsom_uart1: microsom-uart1 {
-			fsl,pins = <MX6QDL_UART1_PINGRP1>;
+			fsl,pins = <
+				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
+				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1
+			>;
 		};
 
 		pinctrl_microsom_usbotg: microsom-usbotg {

arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi +48 -8

99 lines not on this page · raw message

arch/arm/boot/dts/imx6qdl-pingrp.h deleted +0 ~~-532~~

532 lines not on this page · raw message

arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +130 -9

175 lines not on this page · raw message

arch/arm/boot/dts/imx6qdl-sabrelite.dtsi +48 -8

99 lines not on this page · raw message

arch/arm/boot/dts/imx6qdl-sabresd.dtsi +75 ~~-11~~

125 lines not on this page · raw message

arch/arm/boot/dts/imx6qdl-wandboard.dtsi +68 ~~-10~~

111 lines not on this page · raw message

Signature · 1 line

1.7.9.5

Russell King - ARM Linux

2014-01-27 14:37 UTC #2 lore raw

PATCH 1/9 ARM: dts: imx6qdl: remove the use of pingrp macros

Quoted 2 lines · Shawn Guo

 arch/arm/boot/dts/imx6dl-hummingboard.dts  |    5 +-
 arch/arm/boot/dts/imx6qdl-microsom.dtsi    |    5 +-

I've merged your changes here into my local copy of these just to reduce the conflicts - unfortunately, it's taken soo long to deal with the above that the cubox-i has now been released, which has prompted some reorganisation between the above two files.

I would much rather you dropped these two entirely, and let me push them upstream, rather than having some nasty conflicts which result from this.

Signature · 3 lines

FTTC broadband for 0.8mile line: 5.8Mbps down 500kbps up.  Estimation
in database were 13.1 to 19Mbit for a good line, about 7.5+ for a bad.
Estimate before purchase was "up to 13.2Mbit".

Shawn Guo

author

2014-01-27 15:05 UTC #3 lore raw

PATCH 1/9 ARM: dts: imx6qdl: remove the use of pingrp macros

Quoted 11 lines · Russell King - ARM Linux

Quoted 2 lines · Shawn Guo
 arch/arm/boot/dts/imx6dl-hummingboard.dts  |    5 +-
 arch/arm/boot/dts/imx6qdl-microsom.dtsi    |    5 +-
I've merged your changes here into my local copy of these just to reduce the conflicts - unfortunately, it's taken soo long to deal with the above that the cubox-i has now been released, which has prompted some reorganisation between the above two files.
I would much rather you dropped these two entirely, and let me push them upstream, rather than having some nasty conflicts which result from this.

So you're basically asking me to drop patch [1] from imx/dt branch (tag imx-dt-3.14), which I have sent to Olof for 3.14 inclusion. Yes, I still hope Olof can pull it with this turn-around series applied on top. So please let's wait for Olof's word to see if we can make it. If it's still a NO for some reason, I will be certainly fine with you pushing hummingboard stuff upstream, and will drop it from my tree.

Shawn

[1] https://git.linaro.org/people/shawn.guo/linux-2.6.git/commit/8544f6c92801b1ba70f790cc17f543f7aa13f17f

Russell King - ARM Linux

2014-01-27 15:16 UTC #4 lore raw

PATCH 1/9 ARM: dts: imx6qdl: remove the use of pingrp macros

Quoted 13 lines · Shawn Guo

Quoted 11 lines · Russell King - ARM Linux
Quoted 2 lines · Shawn Guo
 arch/arm/boot/dts/imx6dl-hummingboard.dts  |    5 +-
 arch/arm/boot/dts/imx6qdl-microsom.dtsi    |    5 +-
I've merged your changes here into my local copy of these just to reduce the conflicts - unfortunately, it's taken soo long to deal with the above that the cubox-i has now been released, which has prompted some reorganisation between the above two files.
I would much rather you dropped these two entirely, and let me push them upstream, rather than having some nasty conflicts which result from this.

Quoted 6 lines

So you're basically asking me to drop patch [1] from imx/dt branch (tag imx-dt-3.14), which I have sent to Olof for 3.14 inclusion. Yes, I still hope Olof can pull it with this turn-around series applied on top. So please let's wait for Olof's word to see if we can make it. If it's still a NO for some reason, I will be certainly fine with you pushing hummingboard stuff upstream, and will drop it from my tree.

My point is that the DT files I _now_ have are quite different in organisation to the ones I submitted to you, so there's going to be conflicts if your version goes in.

Moreover, I don't want the old ones in 3.14 as-is, because I don't want declarations which should not have been in the microsom file but in the hummingboard file being in a final release of the mainline kernel.

Signature · 3 lines

FTTC broadband for 0.8mile line: 5.8Mbps down 500kbps up.  Estimation
in database were 13.1 to 19Mbit for a good line, about 7.5+ for a bad.
Estimate before purchase was "up to 13.2Mbit".

Shawn Guo

author

2014-01-27 15:22 UTC #5 lore raw

PATCH 1/9 ARM: dts: imx6qdl: remove the use of pingrp macros

Quoted 21 lines · Russell King - ARM Linux

Quoted 13 lines · Shawn Guo
Quoted 11 lines · Russell King - ARM Linux
Quoted 2 lines · Shawn Guo
 arch/arm/boot/dts/imx6dl-hummingboard.dts  |    5 +-
 arch/arm/boot/dts/imx6qdl-microsom.dtsi    |    5 +-
I've merged your changes here into my local copy of these just to reduce the conflicts - unfortunately, it's taken soo long to deal with the above that the cubox-i has now been released, which has prompted some reorganisation between the above two files.
I would much rather you dropped these two entirely, and let me push them upstream, rather than having some nasty conflicts which result from this.
Quoted 6 lines
So you're basically asking me to drop patch [1] from imx/dt branch (tag imx-dt-3.14), which I have sent to Olof for 3.14 inclusion. Yes, I still hope Olof can pull it with this turn-around series applied on top. So please let's wait for Olof's word to see if we can make it. If it's still a NO for some reason, I will be certainly fine with you pushing hummingboard stuff upstream, and will drop it from my tree.

Quoted 7 lines

My point is that the DT files I _now_ have are quite different in organisation to the ones I submitted to you, so there's going to be conflicts if your version goes in.
Moreover, I don't want the old ones in 3.14 as-is, because I don't want declarations which should not have been in the microsom file but in the hummingboard file being in a final release of the mainline kernel.

We can take care of them with incremental patches during early -rc.

Shawn

Shawn Guo

author

2014-01-28 10:30 UTC #6 lore raw

PATCH 1/9 ARM: dts: imx6qdl: remove the use of pingrp macros

In reply to Russell King - ARM Linux

Quoted 11 lines · Russell King - ARM Linux

Quoted 2 lines · Shawn Guo
 arch/arm/boot/dts/imx6dl-hummingboard.dts  |    5 +-
 arch/arm/boot/dts/imx6qdl-microsom.dtsi    |    5 +-
I've merged your changes here into my local copy of these just to reduce the conflicts - unfortunately, it's taken soo long to deal with the above that the cubox-i has now been released, which has prompted some reorganisation between the above two files.
I would much rather you dropped these two entirely, and let me push them upstream, rather than having some nasty conflicts which result from this.

Dropped hummingboard from my tree.

Shawn

Shawn Guo

author

2014-01-25 16:43 UTC #7 lore raw

PATCH 2/9 ARM: dts: imx6sl: remove the use of pingrp macros

In reply to Shawn Guo

We created the pingrp macros in imx6sl-pingrp.h for purpose of less LOC when same pin group is used by multiple boards. However, DT maintainers take it as an abuse of DTC macro support. So let's get rid of it to make the pins used by given device more intuitive.

Signed-off-by Shawn Guo <[email protected]>

---
 arch/arm/boot/dts/imx6sl-evk.dts  |  120 ++++++++++++++++++++++++++----
 arch/arm/boot/dts/imx6sl-pingrp.h |  148 -------------------------------------
 arch/arm/boot/dts/imx6sl.dtsi     |    1 -
 3 files changed, 107 insertions(+), 162 deletions(-)
 delete mode 100644 arch/arm/boot/dts/imx6sl-pingrp.h

arch/arm/boot/dts/imx6sl-evk.dts +107 ~~-13~~

index f5e4513..8594d13 100644
@@ -86,55 +86,149 @@
 		};
 
 		pinctrl_ecspi1: ecspi1grp {
-			fsl,pins = <MX6SL_ECSPI1_PINGRP1>;
+			fsl,pins = <
+				MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO	0x100b1
+				MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI	0x100b1
+				MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK	0x100b1
+			>;
 		};
 
 		pinctrl_fec: fecgrp {
-			fsl,pins = <MX6SL_FEC_PINGRP1>;
+			fsl,pins = <
+				MX6SL_PAD_FEC_MDC__FEC_MDC		0x1b0b0
+				MX6SL_PAD_FEC_MDIO__FEC_MDIO		0x1b0b0
+				MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV		0x1b0b0
+				MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0	0x1b0b0
+				MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1	0x1b0b0
+				MX6SL_PAD_FEC_TX_EN__FEC_TX_EN		0x1b0b0
+				MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0	0x1b0b0
+				MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1	0x1b0b0
+				MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT	0x4001b0a8
+			>;
 		};
 
 		pinctrl_uart1: uart1grp {
-			fsl,pins = <MX6SL_UART1_PINGRP1>;
+			fsl,pins = <
+				MX6SL_PAD_UART1_RXD__UART1_RX_DATA	0x1b0b1
+				MX6SL_PAD_UART1_TXD__UART1_TX_DATA	0x1b0b1
+			>;
 		};
 
 		pinctrl_usbotg1: usbotg1grp {
-			fsl,pins = <MX6SL_USBOTG1_PINGRP1>;
+			fsl,pins = <
+				MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID	0x17059
+			>;
 		};
 
 		pinctrl_usdhc1: usdhc1grp {
-			fsl,pins = <MX6SL_USDHC1_PINGRP_D8>;
+			fsl,pins = <
+				MX6SL_PAD_SD1_CMD__SD1_CMD		0x17059
+				MX6SL_PAD_SD1_CLK__SD1_CLK		0x10059
+				MX6SL_PAD_SD1_DAT0__SD1_DATA0		0x17059
+				MX6SL_PAD_SD1_DAT1__SD1_DATA1		0x17059
+				MX6SL_PAD_SD1_DAT2__SD1_DATA2		0x17059
+				MX6SL_PAD_SD1_DAT3__SD1_DATA3		0x17059
+				MX6SL_PAD_SD1_DAT4__SD1_DATA4		0x17059
+				MX6SL_PAD_SD1_DAT5__SD1_DATA5		0x17059
+				MX6SL_PAD_SD1_DAT6__SD1_DATA6		0x17059
+				MX6SL_PAD_SD1_DAT7__SD1_DATA7		0x17059
+			>;
 		};
 
 		pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
-			fsl,pins = <MX6SL_USDHC1_PINGRP_D8_100MHZ>;
+			fsl,pins = <
+				MX6SL_PAD_SD1_CMD__SD1_CMD		0x170b9
+				MX6SL_PAD_SD1_CLK__SD1_CLK		0x100b9
+				MX6SL_PAD_SD1_DAT0__SD1_DATA0		0x170b9
+				MX6SL_PAD_SD1_DAT1__SD1_DATA1		0x170b9
+				MX6SL_PAD_SD1_DAT2__SD1_DATA2		0x170b9
+				MX6SL_PAD_SD1_DAT3__SD1_DATA3		0x170b9
+				MX6SL_PAD_SD1_DAT4__SD1_DATA4		0x170b9
+				MX6SL_PAD_SD1_DAT5__SD1_DATA5		0x170b9
+				MX6SL_PAD_SD1_DAT6__SD1_DATA6		0x170b9
+				MX6SL_PAD_SD1_DAT7__SD1_DATA7		0x170b9
+			>;
 		};
 
 		pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
-			fsl,pins = <MX6SL_USDHC1_PINGRP_D8_200MHZ>;
+			fsl,pins = <
+				MX6SL_PAD_SD1_CMD__SD1_CMD		0x170f9
+				MX6SL_PAD_SD1_CLK__SD1_CLK		0x100f9
+				MX6SL_PAD_SD1_DAT0__SD1_DATA0		0x170f9
+				MX6SL_PAD_SD1_DAT1__SD1_DATA1		0x170f9
+				MX6SL_PAD_SD1_DAT2__SD1_DATA2		0x170f9
+				MX6SL_PAD_SD1_DAT3__SD1_DATA3		0x170f9
+				MX6SL_PAD_SD1_DAT4__SD1_DATA4		0x170f9
+				MX6SL_PAD_SD1_DAT5__SD1_DATA5		0x170f9
+				MX6SL_PAD_SD1_DAT6__SD1_DATA6		0x170f9
+				MX6SL_PAD_SD1_DAT7__SD1_DATA7		0x170f9
+			>;
 		};
 
 		pinctrl_usdhc2: usdhc2grp {
-			fsl,pins = <MX6SL_USDHC2_PINGRP_D4>;
+			fsl,pins = <
+				MX6SL_PAD_SD2_CMD__SD2_CMD		0x17059
+				MX6SL_PAD_SD2_CLK__SD2_CLK		0x10059
+				MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x17059
+				MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x17059
+				MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x17059
+				MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x17059
+			>;
 		};
 
 		pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
-			fsl,pins = <MX6SL_USDHC2_PINGRP_D4_100MHZ>;
+			fsl,pins = <
+				MX6SL_PAD_SD2_CMD__SD2_CMD		0x170b9
+				MX6SL_PAD_SD2_CLK__SD2_CLK		0x100b9
+				MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x170b9
+				MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x170b9
+				MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x170b9
+				MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x170b9
+			>;
 		};
 
 		pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
-			fsl,pins = <MX6SL_USDHC2_PINGRP_D4_200MHZ>;
+			fsl,pins = <
+				MX6SL_PAD_SD2_CMD__SD2_CMD		0x170f9
+				MX6SL_PAD_SD2_CLK__SD2_CLK		0x100f9
+				MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x170f9
+				MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x170f9
+				MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x170f9
+				MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x170f9
+			>;
 		};
 
 		pinctrl_usdhc3: usdhc3grp {
-			fsl,pins = <MX6SL_USDHC3_PINGRP_D4>;
+			fsl,pins = <
+				MX6SL_PAD_SD3_CMD__SD3_CMD		0x17059
+				MX6SL_PAD_SD3_CLK__SD3_CLK		0x10059
+				MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x17059
+				MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x17059
+				MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x17059
+				MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x17059
+			>;
 		};
 
 		pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
-			fsl,pins = <MX6SL_USDHC3_PINGRP_D4_100MHZ>;
+			fsl,pins = <
+				MX6SL_PAD_SD3_CMD__SD3_CMD		0x170b9
+				MX6SL_PAD_SD3_CLK__SD3_CLK		0x100b9
+				MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x170b9
+				MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x170b9
+				MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x170b9
+				MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x170b9
+			>;
 		};
 
 		pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
-			fsl,pins = <MX6SL_USDHC3_PINGRP_D4_200MHZ>;
+			fsl,pins = <
+				MX6SL_PAD_SD3_CMD__SD3_CMD		0x170f9
+				MX6SL_PAD_SD3_CLK__SD3_CLK		0x100f9
+				MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x170f9
+				MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x170f9
+				MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x170f9
+				MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x170f9
+			>;
 		};
 	};
 };

arch/arm/boot/dts/imx6sl-pingrp.h deleted +0 ~~-148~~

148 lines not on this page · raw message

arch/arm/boot/dts/imx6sl.dtsi +0 -1

index 2ed687c..2b7641a 100644
@@ -10,7 +10,6 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include "skeleton.dtsi"
 #include "imx6sl-pinfunc.h"
-#include "imx6sl-pingrp.h"
 #include <dt-bindings/clock/imx6sl-clock.h>
 
 / {

Signature · 1 line

1.7.9.5

Heiko Stübner

2014-01-28 10:17 UTC #8 lore raw

PATCH 2/9 ARM: dts: imx6sl: remove the use of pingrp macros

Hi Shawn,

Quoted 34 lines · On Sunday, 26. January 2014 00:43:04 Shawn Guo wrote:

We created the pingrp macros in imx6sl-pingrp.h for purpose of less LOC when same pin group is used by multiple boards. However, DT maintainers take it as an abuse of DTC macro support. So let's get rid of it to make the pins used by given device more intuitive.
Signed-off-by Shawn Guo <[email protected]>
---
 arch/arm/boot/dts/imx6sl-evk.dts  |  120 ++++++++++++++++++++++++++----
 arch/arm/boot/dts/imx6sl-pingrp.h |  148
------------------------------------- arch/arm/boot/dts/imx6sl.dtsi     |  
 1 -
 3 files changed, 107 insertions(+), 162 deletions(-)
 delete mode 100644 arch/arm/boot/dts/imx6sl-pingrp.h
(quoted diff) +0 -0
b/arch/arm/boot/dts/imx6sl-evk.dts index f5e4513..8594d13 100644
arch/arm/boot/dts/imx6sl-evk.dts +7 -2
@@ -86,55 +86,149 @@
 		};
 
 		pinctrl_ecspi1: ecspi1grp {
-			fsl,pins = <MX6SL_ECSPI1_PINGRP1>;
+			fsl,pins = <
+				MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO	0x100b1
+				MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI	0x100b1
+				MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK	0x100b1
+			>;
 		};
 
 		pinctrl_fec: fecgrp {
-			fsl,pins = <MX6SL_FEC_PINGRP1>;
+			fsl,pins = <
+				MX6SL_PAD_FEC_MDC__FEC_MDC		0x1b0b0

arch/arm/boot/dts/imx6sl-evk.dts line 108

Quoted 10 lines

arch/arm/boot/dts/imx6sl-evk.dts +9 -0

+				MX6SL_PAD_FEC_MDIO__FEC_MDIO		0x1b0b0
+				MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV		0x1b0b0
+				MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0	0x1b0b0
+				MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1	0x1b0b0
+				MX6SL_PAD_FEC_TX_EN__FEC_TX_EN		0x1b0b0
+				MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0	0x1b0b0
+				MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1	0x1b0b0
+				MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT	0x4001b0a8
+			>;
 		};

[... and so on for the other groups ... ]

I'm confused now :-) . Current linux-next [0] shows the pin-settings as part of imx6sl.dtsi - a way a lot of other architectures organize their pingroups too, with the board file only referencing the relevant pingroups from the predefined ones of the soc.

So I guess your move to the pingrp-header moved them out of the imx6sl.dtsi to the .h and is not part of linux-next; but this patch (and the others in this series) now moves the definitions into the individual board files. Can't you just move them back to the soc-dtsi files to prevent each board duplicating them?

Or I've simply missed previous discussions about this ;-) .

Thanks
Heiko

[0] https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/tree/arch/arm/boot/dts/imx6sl.dtsi#n640

Sascha Hauer

maintainer

2014-01-28 11:03 UTC #9 lore raw

PATCH 2/9 ARM: dts: imx6sl: remove the use of pingrp macros

Quoted 50 lines · Heiko St?bner

Hi Shawn,
Quoted 34 lines · On Sunday, 26. January 2014 00:43:04 Shawn Guo wrote:
We created the pingrp macros in imx6sl-pingrp.h for purpose of less LOC when same pin group is used by multiple boards. However, DT maintainers take it as an abuse of DTC macro support. So let's get rid of it to make the pins used by given device more intuitive.
Signed-off-by Shawn Guo <[email protected]>
---
 arch/arm/boot/dts/imx6sl-evk.dts  |  120 ++++++++++++++++++++++++++----
 arch/arm/boot/dts/imx6sl-pingrp.h |  148
------------------------------------- arch/arm/boot/dts/imx6sl.dtsi     |  
 1 -
 3 files changed, 107 insertions(+), 162 deletions(-)
 delete mode 100644 arch/arm/boot/dts/imx6sl-pingrp.h
(quoted diff) +0 -0
b/arch/arm/boot/dts/imx6sl-evk.dts index f5e4513..8594d13 100644
arch/arm/boot/dts/imx6sl-evk.dts +7 -2
@@ -86,55 +86,149 @@
 		};
 
 		pinctrl_ecspi1: ecspi1grp {
-			fsl,pins = <MX6SL_ECSPI1_PINGRP1>;
+			fsl,pins = <
+				MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO	0x100b1
+				MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI	0x100b1
+				MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK	0x100b1
+			>;
 		};
 
 		pinctrl_fec: fecgrp {
-			fsl,pins = <MX6SL_FEC_PINGRP1>;
+			fsl,pins = <
+				MX6SL_PAD_FEC_MDC__FEC_MDC		0x1b0b0
arch/arm/boot/dts/imx6sl-evk.dts line 108
Quoted 10 lines
arch/arm/boot/dts/imx6sl-evk.dts +9 -0
+				MX6SL_PAD_FEC_MDIO__FEC_MDIO		0x1b0b0
+				MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV		0x1b0b0
+				MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0	0x1b0b0
+				MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1	0x1b0b0
+				MX6SL_PAD_FEC_TX_EN__FEC_TX_EN		0x1b0b0
+				MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0	0x1b0b0
+				MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1	0x1b0b0
+				MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT	0x4001b0a8
+			>;
 		};
[... and so on for the other groups ... ]

Quoted 4 lines

I'm confused now :-) . Current linux-next [0] shows the pin-settings as part of imx6sl.dtsi - a way a lot of other architectures organize their pingroups too, with the board file only referencing the relevant pingroups from the predefined ones of the soc.

Current mainline has all groups under the iomux node which has the effect that all possible groups are compiled into every dtb resulting in very bloated dtbs. So Shawn changed it to what's currently in next, but this hasn't been accepted by the dt maintainers. Now this series tries to address the concerns of the dt maintainers by not using macros that expand to other macros.

Sascha

Signature · 4 lines

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Shawn Guo

author

2014-01-28 11:20 UTC #10 lore raw

PATCH 2/9 ARM: dts: imx6sl: remove the use of pingrp macros

In reply to Heiko Stübner

Quoted 9 lines · Heiko St?bner

[... and so on for the other groups ... ]
I'm confused now :-) . Current linux-next [0] shows the pin-settings as part of imx6sl.dtsi - a way a lot of other architectures organize their pingroups too, with the board file only referencing the relevant pingroups from the predefined ones of the soc.
So I guess your move to the pingrp-header moved them out of the imx6sl.dtsi to the .h and is not part of linux-next;

Yes, my for-next branch was excluded from linux-next temporarily for some reason. I will ask Stephen to add it back once v3.14-rc1 is out. That said, you can see nothing we developed in this cycle on linux-next for now.

Quoted 4 lines

but this patch (and the others in this
series) now moves the definitions into the individual board files. Can't you just move them back to the soc-dtsi files to prevent each board duplicating them?

No. That will bring back the problem we try to solve from the beginning [1].

Shawn

[1] http://thread.gmane.org/gmane.linux.ports.arm.kernel/275912/

Heiko Stübner

2014-01-29 10:42 UTC #11 lore raw

PATCH 2/9 ARM: dts: imx6sl: remove the use of pingrp macros

Quoted 21 lines · On Tuesday, 28. January 2014 19:20:49 Shawn Guo wrote:

Quoted 9 lines · Heiko St?bner
[... and so on for the other groups ... ]
I'm confused now :-) . Current linux-next [0] shows the pin-settings as part of imx6sl.dtsi - a way a lot of other architectures organize their pingroups too, with the board file only referencing the relevant pingroups from the predefined ones of the soc.
So I guess your move to the pingrp-header moved them out of the imx6sl.dtsi to the .h and is not part of linux-next;
Yes, my for-next branch was excluded from linux-next temporarily for some reason. I will ask Stephen to add it back once v3.14-rc1 is out. That said, you can see nothing we developed in this cycle on linux-next for now.
Quoted 4 lines
but this patch (and the others in this
series) now moves the definitions into the individual board files. Can't you just move them back to the soc-dtsi files to prevent each board duplicating them?

Quoted 4 lines

No. That will bring back the problem we try to solve from the beginning [1].
[1] http://thread.gmane.org/gmane.linux.ports.arm.kernel/275912/

Thanks for the pointer, I think I understand the issue now :-) .

So for the short term, I should probably also define the pingroups in my board- dts then.

But as an insane idea that I just had, because the issue will probably affect more architectures at some point when their pingroups or other common-nodes grow, how about introducing something like a "/delete-if-unreferenced/" prefix in dtc?

As I could see in [0], adding something to dtc is not as far off as I thought.

In essence one would add the pingroups to the soc dtsi, like

		ecspi1 {
			/delete-if-unreferenced/ pinctrl_ecspi1_1: ecspi1grp-1 {
				fsl,pins = <
					MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1
					MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1
					MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1
				>;
			};
		};

and dtc would then be tasked with checking if the node gets referenced in a phandle somewhere in the dts and if not removing it.

I don't know if this is at all sane to think about or doable in dtc.

Heiko

[0] http://www.spinics.net/lists/arm-kernel/msg300936.html

Shawn Guo

author

2014-01-25 16:43 UTC #12 lore raw

PATCH 3/9 ARM: dts: imx53: remove the use of pingrp macros

In reply to Shawn Guo

We created the pingrp macros in imx53-pingrp.h for purpose of less LOC when same pin group is used by multiple boards. However, DT maintainers take it as an abuse of DTC macro support. So let's get rid of it to make the pins used by given device more intuitive.

Signed-off-by Shawn Guo <[email protected]>

---
 arch/arm/boot/dts/imx53-ard.dts             |   18 +-
 arch/arm/boot/dts/imx53-evk.dts             |   51 +++-
 arch/arm/boot/dts/imx53-m53evk.dts          |  128 ++++++++--
 arch/arm/boot/dts/imx53-pingrp.h            |  352 ---------------------------
 arch/arm/boot/dts/imx53-qsb.dts             |   88 ++++++-
 arch/arm/boot/dts/imx53-smd.dts             |   77 +++++-
 arch/arm/boot/dts/imx53-tqma53.dtsi         |   89 ++++++-
 arch/arm/boot/dts/imx53-voipac-bsb.dts      |   21 +-
 arch/arm/boot/dts/imx53-voipac-dmm-668.dtsi |   47 +++-
 arch/arm/boot/dts/imx53.dtsi                |    2 +-
 10 files changed, 459 insertions(+), 414 deletions(-)
 delete mode 100644 arch/arm/boot/dts/imx53-pingrp.h

arch/arm/boot/dts/imx53-ard.dts +16 -2

index 2bd97c3..e9337ad 100644
@@ -153,11 +153,25 @@
 		};
 
 		pinctrl_esdhc1: esdhc1grp {
-			fsl,pins = <MX53_ESDHC1_PINGRP2>;
+			fsl,pins = <
+				MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1d5
+				MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1d5
+				MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1d5
+				MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1d5
+				MX53_PAD_PATA_DATA8__ESDHC1_DAT4	0x1d5
+				MX53_PAD_PATA_DATA9__ESDHC1_DAT5	0x1d5
+				MX53_PAD_PATA_DATA10__ESDHC1_DAT6	0x1d5
+				MX53_PAD_PATA_DATA11__ESDHC1_DAT7	0x1d5
+				MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1d5
+				MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1d5
+			>;
 		};
 
 		pinctrl_uart1: uart1grp {
-			fsl,pins = <MX53_UART1_PINGRP2>;
+			fsl,pins = <
+				MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4
+				MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4
+			>;
 		};
 	};
 };

arch/arm/boot/dts/imx53-evk.dts +45 -6

72 lines not on this page · raw message

arch/arm/boot/dts/imx53-m53evk.dts +114 ~~-14~~

173 lines not on this page · raw message

arch/arm/boot/dts/imx53-pingrp.h deleted +0 ~~-352~~

352 lines not on this page · raw message

arch/arm/boot/dts/imx53-qsb.dts +80 -8

115 lines not on this page · raw message

arch/arm/boot/dts/imx53-smd.dts +67 ~~-10~~

110 lines not on this page · raw message

arch/arm/boot/dts/imx53-tqma53.dtsi +76 ~~-13~~

134 lines not on this page · raw message

arch/arm/boot/dts/imx53-voipac-bsb.dts +18 -3

index 61244cf..7f6711a 100644
@@ -82,15 +82,30 @@
 		};
 
 		pinctrl_audmux: audmuxgrp {
-			fsl,pins = <MX53_AUDMUX_PINGRP1>;
+			fsl,pins = <
+				MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC	0x80000000
+				MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD	0x80000000
+				MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS	0x80000000
+				MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD	0x80000000
+			>;
 		};
 
 		pinctrl_esdhc2: esdhc2grp {
-			fsl,pins = <MX53_ESDHC2_PINGRP1>;
+			fsl,pins = <
+				MX53_PAD_SD2_CMD__ESDHC2_CMD		0x1d5
+				MX53_PAD_SD2_CLK__ESDHC2_CLK		0x1d5
+				MX53_PAD_SD2_DATA0__ESDHC2_DAT0		0x1d5
+				MX53_PAD_SD2_DATA1__ESDHC2_DAT1		0x1d5
+				MX53_PAD_SD2_DATA2__ESDHC2_DAT2		0x1d5
+				MX53_PAD_SD2_DATA3__ESDHC2_DAT3		0x1d5
+			>;
 		};
 
 		pinctrl_i2c3: i2c3grp {
-			fsl,pins = <MX53_I2C3_PINGRP2>;
+			fsl,pins = <
+				MX53_PAD_GPIO_3__I2C3_SCL		0xc0000000
+				MX53_PAD_GPIO_6__I2C3_SDA		0xc0000000
+			>;
 		};
 	};
 };

arch/arm/boot/dts/imx53-voipac-dmm-668.dtsi +42 -5

65 lines not on this page · raw message

arch/arm/boot/dts/imx53.dtsi +1 -1

index 90359da..0e5c466 100644
@@ -11,8 +11,8 @@
  */
 
 #include "skeleton.dtsi"
-#include "imx53-pingrp.h"
 #include <dt-bindings/clock/imx5-clock.h>
+#include "imx53-pinfunc.h"
 
 / {
 	aliases {

Signature · 1 line

1.7.9.5

Shawn Guo

author

2014-01-25 16:43 UTC #13 lore raw

PATCH 4/9 ARM: dts: imx51: remove the use of pingrp macros

In reply to Shawn Guo

We created the pingrp macros in imx51-pingrp.h for purpose of less LOC when same pin group is used by multiple boards. However, DT maintainers take it as an abuse of DTC macro support. So let's get rid of it to make the pins used by given device more intuitive.

Signed-off-by Shawn Guo <[email protected]>

---
 arch/arm/boot/dts/imx51-apf51.dts                  |   26 +-
 arch/arm/boot/dts/imx51-apf51dev.dts               |   64 ++++-
 arch/arm/boot/dts/imx51-babbage.dts                |  142 +++++++++--
 arch/arm/boot/dts/imx51-eukrea-cpuimx51.dtsi       |   26 +-
 .../boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts  |   31 ++-
 arch/arm/boot/dts/imx51-pingrp.h                   |  249 --------------------
 arch/arm/boot/dts/imx51.dtsi                       |    2 +-
 7 files changed, 261 insertions(+), 279 deletions(-)
 delete mode 100644 arch/arm/boot/dts/imx51-pingrp.h

arch/arm/boot/dts/imx51-apf51.dts +24 -2

index 80840da..e88b2a6 100644
@@ -44,11 +44,33 @@
 &iomuxc {
 	imx51-apf51 {
 		pinctrl_fec: fecgrp {
-			fsl,pins = <MX51_FEC_PINGRP2>;
+			fsl,pins = <
+				MX51_PAD_DI_GP3__FEC_TX_ER		0x80000000
+				MX51_PAD_DI2_PIN4__FEC_CRS		0x80000000
+				MX51_PAD_DI2_PIN2__FEC_MDC		0x80000000
+				MX51_PAD_DI2_PIN3__FEC_MDIO		0x80000000
+				MX51_PAD_DI2_DISP_CLK__FEC_RDATA1	0x80000000
+				MX51_PAD_DI_GP4__FEC_RDATA2		0x80000000
+				MX51_PAD_DISP2_DAT0__FEC_RDATA3		0x80000000
+				MX51_PAD_DISP2_DAT1__FEC_RX_ER		0x80000000
+				MX51_PAD_DISP2_DAT6__FEC_TDATA1		0x80000000
+				MX51_PAD_DISP2_DAT7__FEC_TDATA2		0x80000000
+				MX51_PAD_DISP2_DAT8__FEC_TDATA3		0x80000000
+				MX51_PAD_DISP2_DAT9__FEC_TX_EN		0x80000000
+				MX51_PAD_DISP2_DAT10__FEC_COL		0x80000000
+				MX51_PAD_DISP2_DAT11__FEC_RX_CLK	0x80000000
+				MX51_PAD_DISP2_DAT12__FEC_RX_DV		0x80000000
+				MX51_PAD_DISP2_DAT13__FEC_TX_CLK	0x80000000
+				MX51_PAD_DISP2_DAT14__FEC_RDATA0	0x80000000
+				MX51_PAD_DISP2_DAT15__FEC_TDATA0	0x80000000
+			>;
 		};
 
 		pinctrl_uart3: uart3grp {
-			fsl,pins = <MX51_UART3_PINGRP2>;
+			fsl,pins = <
+				MX51_PAD_UART3_RXD__UART3_RXD		0x1c5
+				MX51_PAD_UART3_TXD__UART3_TXD		0x1c5
+			>;
 		};
 	};
 };

arch/arm/boot/dts/imx51-apf51dev.dts +58 -6

85 lines not on this page · raw message

arch/arm/boot/dts/imx51-babbage.dts +128 ~~-14~~

190 lines not on this page · raw message

arch/arm/boot/dts/imx51-eukrea-cpuimx51.dtsi +24 -2

index b22841a..9b3acf6 100644
@@ -54,11 +54,33 @@
 		};
 
 		pinctrl_fec: fecgrp {
-			fsl,pins = <MX51_FEC_PINGRP2>;
+			fsl,pins = <
+				MX51_PAD_DI_GP3__FEC_TX_ER		0x80000000
+				MX51_PAD_DI2_PIN4__FEC_CRS		0x80000000
+				MX51_PAD_DI2_PIN2__FEC_MDC		0x80000000
+				MX51_PAD_DI2_PIN3__FEC_MDIO		0x80000000
+				MX51_PAD_DI2_DISP_CLK__FEC_RDATA1	0x80000000
+				MX51_PAD_DI_GP4__FEC_RDATA2		0x80000000
+				MX51_PAD_DISP2_DAT0__FEC_RDATA3		0x80000000
+				MX51_PAD_DISP2_DAT1__FEC_RX_ER		0x80000000
+				MX51_PAD_DISP2_DAT6__FEC_TDATA1		0x80000000
+				MX51_PAD_DISP2_DAT7__FEC_TDATA2		0x80000000
+				MX51_PAD_DISP2_DAT8__FEC_TDATA3		0x80000000
+				MX51_PAD_DISP2_DAT9__FEC_TX_EN		0x80000000
+				MX51_PAD_DISP2_DAT10__FEC_COL		0x80000000
+				MX51_PAD_DISP2_DAT11__FEC_RX_CLK	0x80000000
+				MX51_PAD_DISP2_DAT12__FEC_RX_DV		0x80000000
+				MX51_PAD_DISP2_DAT13__FEC_TX_CLK	0x80000000
+				MX51_PAD_DISP2_DAT14__FEC_RDATA0	0x80000000
+				MX51_PAD_DISP2_DAT15__FEC_TDATA0	0x80000000
+			>;
 		};
 
 		pinctrl_i2c1: i2c1grp {
-			fsl,pins = <MX51_I2C1_PINGRP1>;
+			fsl,pins = <
+				MX51_PAD_SD2_CMD__I2C1_SCL		0x400001ed
+				MX51_PAD_SD2_CLK__I2C1_SDA		0x400001ed
+			>;
 		};
 	};
 };

arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts +26 -5

index 6774c66..62c67cd9 100644
@@ -81,23 +81,44 @@
 &iomuxc {
 	imx51-eukrea {
 		pinctrl_audmux: audmuxgrp {
-			fsl,pins = <MX51_AUDMUX_PINGRP1>;
+			fsl,pins = <
+				MX51_PAD_AUD3_BB_TXD__AUD3_TXD		0x80000000
+				MX51_PAD_AUD3_BB_RXD__AUD3_RXD		0x80000000
+				MX51_PAD_AUD3_BB_CK__AUD3_TXC		0x80000000
+				MX51_PAD_AUD3_BB_FS__AUD3_TXFS		0x80000000
+			>;
 		};
 
 		pinctrl_esdhc1: esdhc1grp {
-			fsl,pins = <MX51_ESDHC1_PINGRP1>;
+			fsl,pins = <
+				MX51_PAD_SD1_CMD__SD1_CMD		0x400020d5
+				MX51_PAD_SD1_CLK__SD1_CLK		0x20d5
+				MX51_PAD_SD1_DATA0__SD1_DATA0		0x20d5
+				MX51_PAD_SD1_DATA1__SD1_DATA1		0x20d5
+				MX51_PAD_SD1_DATA2__SD1_DATA2		0x20d5
+				MX51_PAD_SD1_DATA3__SD1_DATA3		0x20d5
+			>;
 		};
 
 		pinctrl_uart1: uart1grp {
-			fsl,pins = <MX51_UART1_PINGRP1>;
+			fsl,pins = <
+				MX51_PAD_UART1_RXD__UART1_RXD		0x1c5
+				MX51_PAD_UART1_TXD__UART1_TXD		0x1c5
+			>;
 		};
 
 		pinctrl_uart3: uart3grp {
-			fsl,pins = <MX51_UART3_PINGRP2>;
+			fsl,pins = <
+				MX51_PAD_UART3_RXD__UART3_RXD		0x1c5
+				MX51_PAD_UART3_TXD__UART3_TXD		0x1c5
+			>;
 		};
 
 		pinctrl_uart3_rtscts: uart3rtsctsgrp {
-			fsl,pins = <MX51_UART3_RTSCTS_PINGRP2>;
+			fsl,pins = <
+				MX51_PAD_KEY_COL4__UART3_RTS		0x1c5
+				MX51_PAD_KEY_COL5__UART3_CTS		0x1c5
+			>;
 		};
 
 		pinctrl_backlight_1: backlightgrp-1 {

arch/arm/boot/dts/imx51-pingrp.h deleted +0 ~~-249~~

249 lines not on this page · raw message

arch/arm/boot/dts/imx51.dtsi +1 -1

index 3291e55..f10d213 100644
@@ -11,7 +11,7 @@
  */
 
 #include "skeleton.dtsi"
-#include "imx51-pingrp.h"
+#include "imx51-pinfunc.h"
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/clock/imx5-clock.h>
 #include <dt-bindings/gpio/gpio.h>

Signature · 1 line

1.7.9.5

Shawn Guo

author

2014-01-25 16:43 UTC #14 lore raw

PATCH 5/9 ARM: dts: imx50: remove the use of pingrp macros

In reply to Shawn Guo

We created the pingrp macros in imx50-pingrp.h for purpose of less LOC when same pin group is used by multiple boards. However, DT maintainers take it as an abuse of DTC macro support. So let's get rid of it to make the pins used by given device more intuitive.

Signed-off-by Shawn Guo <[email protected]>

---
 arch/arm/boot/dts/imx50-evk.dts  |   28 +++++++-
 arch/arm/boot/dts/imx50-pingrp.h |  146 --------------------------------------
 arch/arm/boot/dts/imx50.dtsi     |    2 +-
 3 files changed, 26 insertions(+), 150 deletions(-)
 delete mode 100644 arch/arm/boot/dts/imx50-pingrp.h

arch/arm/boot/dts/imx50-evk.dts +25 -3

index a859264..1b22512 100644
@@ -61,15 +61,37 @@
 &iomuxc {
 	imx50-evk {
 		pinctrl_cspi: cspigrp {
-			fsl,pins = <MX50_CSPI_PINGRP1>;
+			fsl,pins = <
+				MX50_PAD_CSPI_SCLK__CSPI_SCLK		0x00
+				MX50_PAD_CSPI_MISO__CSPI_MISO		0x00
+				MX50_PAD_CSPI_MOSI__CSPI_MOSI		0x00
+				MX50_PAD_CSPI_SS0__GPIO4_11		0xc4
+				MX50_PAD_ECSPI1_MOSI__CSPI_SS1		0xf4
+			>;
 		};
 
 		pinctrl_fec: fecgrp {
-			fsl,pins = <MX50_FEC_PINGRP1>;
+			fsl,pins = <
+				MX50_PAD_SSI_RXFS__FEC_MDC		0x80
+				MX50_PAD_SSI_RXC__FEC_MDIO		0x80
+				MX50_PAD_DISP_D0__FEC_TX_CLK		0x80
+				MX50_PAD_DISP_D1__FEC_RX_ERR		0x80
+				MX50_PAD_DISP_D2__FEC_RX_DV		0x80
+				MX50_PAD_DISP_D3__FEC_RDATA_1		0x80
+				MX50_PAD_DISP_D4__FEC_RDATA_0		0x80
+				MX50_PAD_DISP_D5__FEC_TX_EN		0x80
+				MX50_PAD_DISP_D6__FEC_TDATA_1		0x80
+				MX50_PAD_DISP_D7__FEC_TDATA_0		0x80
+			>;
 		};
 
 		pinctrl_uart1: uart1grp {
-			fsl,pins = <MX50_UART1_PINGRP1>;
+			fsl,pins = <
+				MX50_PAD_UART1_TXD__UART1_TXD_MUX	0x1e4
+				MX50_PAD_UART1_RXD__UART1_RXD_MUX	0x1e4
+				MX50_PAD_UART1_RTS__UART1_RTS		0x1e4
+				MX50_PAD_UART1_CTS__UART1_CTS		0x1e4
+			>;
 		};
 	};
 };

arch/arm/boot/dts/imx50-pingrp.h deleted +0 ~~-146~~

146 lines not on this page · raw message

arch/arm/boot/dts/imx50.dtsi +1 -1

index 01c0499..7152472 100644
@@ -12,7 +12,7 @@
  */
 
 #include "skeleton.dtsi"
-#include "imx50-pingrp.h"
+#include "imx50-pinfunc.h"
 #include <dt-bindings/clock/imx5-clock.h>
 
 / {

Signature · 1 line

1.7.9.5

Shawn Guo

author

2014-01-25 16:43 UTC #15 lore raw

PATCH 6/9 ARM: dts: imx35: remove the use of pingrp macros

In reply to Shawn Guo

We created the pingrp macros in imx35-pingrp.h for purpose of less LOC when same pin group is used by multiple boards. However, DT maintainers take it as an abuse of DTC macro support. So let's get rid of it to make the pins used by given device more intuitive.

Signed-off-by Shawn Guo <[email protected]>

---
 arch/arm/boot/dts/imx35-pingrp.h |  104 --------------------------------------
 arch/arm/boot/dts/imx35.dtsi     |    1 -
 2 files changed, 105 deletions(-)
 delete mode 100644 arch/arm/boot/dts/imx35-pingrp.h

arch/arm/boot/dts/imx35-pingrp.h deleted +0 ~~-104~~

deleted file mode 100644
index 2406e7e..0000000
@@ -1,104 +0,0 @@
-/*
- * Copyright 2013 Eukr?a Electromatique <[email protected]>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#ifndef __DTS_IMX35_PINGRP_H
-#define __DTS_IMX35_PINGRP_H
-
-#define MX35_AUDMUX_PINGRP1 \
-	MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS		0x80000000 \
-	MX35_PAD_STXD4__AUDMUX_AUD4_TXD			0x80000000 \
-	MX35_PAD_SRXD4__AUDMUX_AUD4_RXD			0x80000000 \
-	MX35_PAD_SCK4__AUDMUX_AUD4_TXC			0x80000000
-
-#define MX35_CAN1_PINGRP1 \
-	MX35_PAD_I2C2_CLK__CAN1_TXCAN			0x1c0 \
-	MX35_PAD_I2C2_DAT__CAN1_RXCAN			0x1c0
-
-#define MX35_CAN2_PINGRP1 \
-	MX35_PAD_TX5_RX0__CAN2_TXCAN			0x1c0 \
-	MX35_PAD_TX4_RX1__CAN2_RXCAN			0x1c0
-
-#define MX35_ESDHC1_PINGRP1 \
-	MX35_PAD_SD1_CMD__ESDHC1_CMD			0x80000000 \
-	MX35_PAD_SD1_CLK__ESDHC1_CLK			0x80000000 \
-	MX35_PAD_SD1_DATA0__ESDHC1_DAT0			0x80000000 \
-	MX35_PAD_SD1_DATA1__ESDHC1_DAT1			0x80000000 \
-	MX35_PAD_SD1_DATA2__ESDHC1_DAT2			0x80000000 \
-	MX35_PAD_SD1_DATA3__ESDHC1_DAT3			0x80000000
-
-#define MX35_FEC_PINGRP1 \
-	MX35_PAD_FEC_TX_CLK__FEC_TX_CLK			0x80000000 \
-	MX35_PAD_FEC_RX_CLK__FEC_RX_CLK			0x80000000 \
-	MX35_PAD_FEC_RX_DV__FEC_RX_DV			0x80000000 \
-	MX35_PAD_FEC_COL__FEC_COL			0x80000000 \
-	MX35_PAD_FEC_RDATA0__FEC_RDATA_0		0x80000000 \
-	MX35_PAD_FEC_TDATA0__FEC_TDATA_0		0x80000000 \
-	MX35_PAD_FEC_TX_EN__FEC_TX_EN			0x80000000 \
-	MX35_PAD_FEC_MDC__FEC_MDC			0x80000000 \
-	MX35_PAD_FEC_MDIO__FEC_MDIO			0x80000000 \
-	MX35_PAD_FEC_TX_ERR__FEC_TX_ERR			0x80000000 \
-	MX35_PAD_FEC_RX_ERR__FEC_RX_ERR			0x80000000 \
-	MX35_PAD_FEC_CRS__FEC_CRS			0x80000000 \
-	MX35_PAD_FEC_RDATA1__FEC_RDATA_1		0x80000000 \
-	MX35_PAD_FEC_TDATA1__FEC_TDATA_1		0x80000000 \
-	MX35_PAD_FEC_RDATA2__FEC_RDATA_2		0x80000000 \
-	MX35_PAD_FEC_TDATA2__FEC_TDATA_2		0x80000000 \
-	MX35_PAD_FEC_RDATA3__FEC_RDATA_3		0x80000000 \
-	MX35_PAD_FEC_TDATA3__FEC_TDATA_3		0x80000000
-
-#define MX35_I2C1_PINGRP1 \
-	MX35_PAD_I2C1_CLK__I2C1_SCL			0x80000000 \
-	MX35_PAD_I2C1_DAT__I2C1_SDA			0x80000000
-
-#define MX35_I2C3_PINGRP1 \
-	MX35_PAD_ATA_DATA12__I2C3_SCL			0x80000000 \
-	MX35_PAD_ATA_DATA13__I2C3_SDA			0x80000000
-
-#define MX35_IPU_PINGRP1 \
-	MX35_PAD_LD0__IPU_DISPB_DAT_0			0x80000000 \
-	MX35_PAD_LD1__IPU_DISPB_DAT_1			0x80000000 \
-	MX35_PAD_LD2__IPU_DISPB_DAT_2			0x80000000 \
-	MX35_PAD_LD3__IPU_DISPB_DAT_3			0x80000000 \
-	MX35_PAD_LD4__IPU_DISPB_DAT_4			0x80000000 \
-	MX35_PAD_LD5__IPU_DISPB_DAT_5			0x80000000 \
-	MX35_PAD_LD6__IPU_DISPB_DAT_6			0x80000000 \
-	MX35_PAD_LD7__IPU_DISPB_DAT_7			0x80000000 \
-	MX35_PAD_LD8__IPU_DISPB_DAT_8			0x80000000 \
-	MX35_PAD_LD9__IPU_DISPB_DAT_9			0x80000000 \
-	MX35_PAD_LD10__IPU_DISPB_DAT_10			0x80000000 \
-	MX35_PAD_LD11__IPU_DISPB_DAT_11			0x80000000 \
-	MX35_PAD_LD12__IPU_DISPB_DAT_12			0x80000000 \
-	MX35_PAD_LD13__IPU_DISPB_DAT_13			0x80000000 \
-	MX35_PAD_LD14__IPU_DISPB_DAT_14			0x80000000 \
-	MX35_PAD_LD15__IPU_DISPB_DAT_15			0x80000000 \
-	MX35_PAD_LD16__IPU_DISPB_DAT_16			0x80000000 \
-	MX35_PAD_LD17__IPU_DISPB_DAT_17			0x80000000 \
-	MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC		0x80000000 \
-	MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK		0x80000000 \
-	MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY		0x80000000 \
-	MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC		0x80000000 \
-	MX35_PAD_CONTRAST__IPU_DISPB_CONTR		0x80000000
-
-#define MX35_UART1_PINGRP1 \
-	MX35_PAD_TXD1__UART1_TXD_MUX			0x1c5 \
-	MX35_PAD_RXD1__UART1_RXD_MUX			0x1c5
-
-#define MX35_UART1_RTSCTS_PINGRP1 \
-	MX35_PAD_CTS1__UART1_CTS			0x1c5 \
-	MX35_PAD_RTS1__UART1_RTS			0x1c5
-
-#define MX35_UART2_PINGRP1 \
-	MX35_PAD_RXD2__UART2_RXD_MUX			0x1c5 \
-	MX35_PAD_TXD2__UART2_TXD_MUX			0x1c5
-
-#define MX35_UART2_RTSCTS_PINGRP1 \
-	MX35_PAD_RTS2__UART2_RTS			0x1c5 \
-	MX35_PAD_CTS2__UART2_CTS			0x1c5
-
-#endif /* __DTS_IMX35_PINGRP_H */

arch/arm/boot/dts/imx35.dtsi +0 -1

index a198b92..88b218f 100644
@@ -10,7 +10,6 @@
 
 #include "skeleton.dtsi"
 #include "imx35-pinfunc.h"
-#include "imx35-pingrp.h"
 
 / {
 	aliases {

Signature · 1 line

1.7.9.5

Shawn Guo

author

2014-01-25 16:43 UTC #16 lore raw

PATCH 7/9 ARM: dts: imx25: remove the use of pingrp macros

In reply to Shawn Guo

We created the pingrp macros in imx25-pingrp.h for purpose of less LOC when same pin group is used by multiple boards. However, DT maintainers take it as an abuse of DTC macro support. So let's get rid of it to make the pins used by given device more intuitive.

Signed-off-by Shawn Guo <[email protected]>

---
 arch/arm/boot/dts/imx25-eukrea-cpuimx25.dtsi       |   17 +++-
 .../boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts  |   56 ++++++++++++--
 arch/arm/boot/dts/imx25-pingrp.h                   |   81 --------------------
 arch/arm/boot/dts/imx25.dtsi                       |    2 +-
 4 files changed, 67 insertions(+), 89 deletions(-)
 delete mode 100644 arch/arm/boot/dts/imx25-pingrp.h

arch/arm/boot/dts/imx25-eukrea-cpuimx25.dtsi +15 -2

index 8abd45a..d6f2764 100644
@@ -43,11 +43,24 @@
 &iomuxc {
 	imx25-eukrea-cpuimx25 {
 		pinctrl_fec: fecgrp {
-			fsl,pins = <MX25_FEC_PINGRP1>;
+			fsl,pins = <
+				MX25_PAD_FEC_MDC__FEC_MDC		0x80000000
+				MX25_PAD_FEC_MDIO__FEC_MDIO		0x400001e0
+				MX25_PAD_FEC_TDATA0__FEC_TDATA0		0x80000000
+				MX25_PAD_FEC_TDATA1__FEC_TDATA1		0x80000000
+				MX25_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000
+				MX25_PAD_FEC_RDATA0__FEC_RDATA0		0x80000000
+				MX25_PAD_FEC_RDATA1__FEC_RDATA1		0x80000000
+				MX25_PAD_FEC_RX_DV__FEC_RX_DV		0x80000000
+				MX25_PAD_FEC_TX_CLK__FEC_TX_CLK		0x1c0
+			>;
 		};
 
 		pinctrl_i2c1: i2c1grp {
-			fsl,pins = <MX25_I2C1_PINGRP1>;
+			fsl,pins = <
+				MX25_PAD_I2C1_CLK__I2C1_CLK		0x80000000
+				MX25_PAD_I2C1_DAT__I2C1_DAT		0x80000000
+			>;
 		};
 	};
 };

arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts +51 -5

77 lines not on this page · raw message

arch/arm/boot/dts/imx25-pingrp.h deleted +0 ~~-81~~

81 lines not on this page · raw message

arch/arm/boot/dts/imx25.dtsi +1 -1

index 9e9e3b8..32f760e 100644
@@ -10,7 +10,7 @@
  */
 
 #include "skeleton.dtsi"
-#include "imx25-pingrp.h"
+#include "imx25-pinfunc.h"
 
 / {
 	aliases {

Signature · 1 line

1.7.9.5

Shawn Guo

author

2014-01-25 16:43 UTC #17 lore raw

PATCH 8/9 ARM: dts: imx27: remove the use of pingrp macros

In reply to Shawn Guo

We created the pingrp macros in imx27-pingrp.h for purpose of less LOC when same pin group is used by multiple boards. However, DT maintainers take it as an abuse of DTC macro support. So let's get rid of it to make the pins used by given device more intuitive.

Signed-off-by Shawn Guo <[email protected]>

---
 arch/arm/boot/dts/imx27-apf27.dts                |   26 +++-
 arch/arm/boot/dts/imx27-apf27dev.dts             |   65 +++++++++-
 arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts |   27 ++--
 arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts |   26 +++-
 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts   |   23 +++-
 arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi  |   38 +++++-
 arch/arm/boot/dts/imx27-pingrp.h                 |  151 ----------------------
 arch/arm/boot/dts/imx27.dtsi                     |    2 +-
 8 files changed, 177 insertions(+), 181 deletions(-)
 delete mode 100644 arch/arm/boot/dts/imx27-pingrp.h

arch/arm/boot/dts/imx27-apf27.dts +24 -2

index 8bc75c7..09f57b3 100644
@@ -37,11 +37,33 @@
 &iomuxc {
 	imx27-apf27 {
 		pinctrl_fec1: fec1grp {
-			fsl,pins = <MX27_FEC1_PINGRP1>;
+			fsl,pins = <
+				MX27_PAD_SD3_CMD__FEC_TXD0 0x0
+				MX27_PAD_SD3_CLK__FEC_TXD1 0x0
+				MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
+				MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
+				MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
+				MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
+				MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
+				MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
+				MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
+				MX27_PAD_ATA_DATA7__FEC_MDC 0x0
+				MX27_PAD_ATA_DATA8__FEC_CRS 0x0
+				MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0
+				MX27_PAD_ATA_DATA10__FEC_RXD0 0x0
+				MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0
+				MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0
+				MX27_PAD_ATA_DATA13__FEC_COL 0x0
+				MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0
+				MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0
+			>;
 		};
 
 		pinctrl_uart1: uart1grp {
-			fsl,pins = <MX27_UART1_PINGRP1>;
+			fsl,pins = <
+				MX27_PAD_UART1_TXD__UART1_TXD 0x0
+				MX27_PAD_UART1_RXD__UART1_RXD 0x0
+			>;
 		};
 	};
 };

arch/arm/boot/dts/imx27-apf27dev.dts +58 -7

95 lines not on this page · raw message

arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts +19 -8

index 0d65023..04cadfc 100644
@@ -76,31 +76,42 @@
 &iomuxc {
 	imx27-phycard-s-rdk {
 		pinctrl_i2c1: i2c1grp {
-			fsl,pins = <MX27_I2C2_PINGRP1>;
+			fsl,pins = <
+				MX27_PAD_I2C2_SDA__I2C2_SDA 0x0
+				MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
+			>;
 		};
 
 		pinctrl_owire1: owire1grp {
-			fsl,pins = <MX27_OWIRE1_PINGRP1>;
+			fsl,pins = <
+				MX27_PAD_RTCK__OWIRE 0x0
+			>;
 		};
 
 		pinctrl_uart1: uart1grp {
 			fsl,pins = <
-				MX27_UART1_PINGRP1
-				MX27_UART1_RTSCTS_PINGRP1
+				MX27_PAD_UART1_TXD__UART1_TXD 0x0
+				MX27_PAD_UART1_RXD__UART1_RXD 0x0
+				MX27_PAD_UART1_CTS__UART1_CTS 0x0
+				MX27_PAD_UART1_RTS__UART1_RTS 0x0
 			>;
 		};
 
 		pinctrl_uart2: uart2grp {
 			fsl,pins = <
-				MX27_UART2_PINGRP1
-				MX27_UART2_RTSCTS_PINGRP1
+				MX27_PAD_UART2_TXD__UART2_TXD 0x0
+				MX27_PAD_UART2_RXD__UART2_RXD 0x0
+				MX27_PAD_UART2_CTS__UART2_CTS 0x0
+				MX27_PAD_UART2_RTS__UART2_RTS 0x0
 			>;
 		};
 
 		pinctrl_uart3: uart3grp {
 			fsl,pins = <
-				MX27_UART3_PINGRP1
-				MX27_UART3_RTSCTS_PINGRP1
+				MX27_PAD_UART3_TXD__UART3_TXD 0x0
+				MX27_PAD_UART3_RXD__UART3_RXD 0x0
+				MX27_PAD_UART3_CTS__UART3_CTS 0x0
+				MX27_PAD_UART3_RTS__UART3_RTS 0x0
 			>;
 		};
 	};

arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts +24 -2

index db8c095..e51e550 100644
@@ -32,11 +32,33 @@
 &iomuxc {
 	imx27-phycard-s-som {
 		pinctrl_fec1: fec1grp {
-			fsl,pins = <MX27_FEC1_PINGRP1>;
+			fsl,pins = <
+				MX27_PAD_SD3_CMD__FEC_TXD0 0x0
+				MX27_PAD_SD3_CLK__FEC_TXD1 0x0
+				MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
+				MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
+				MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
+				MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
+				MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
+				MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
+				MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
+				MX27_PAD_ATA_DATA7__FEC_MDC 0x0
+				MX27_PAD_ATA_DATA8__FEC_CRS 0x0
+				MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0
+				MX27_PAD_ATA_DATA10__FEC_RXD0 0x0
+				MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0
+				MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0
+				MX27_PAD_ATA_DATA13__FEC_COL 0x0
+				MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0
+				MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0
+			>;
 		};
 
 		pinctrl_i2c2: i2c2grp {
-			fsl,pins = <MX27_I2C2_PINGRP1>;
+			fsl,pins = <
+				MX27_PAD_I2C2_SDA__I2C2_SDA 0x0
+				MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
+			>;
 		};
 	};
 };

arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts +17 -6

index eaaff00..9f8ad51 100644
@@ -45,12 +45,19 @@
 		};
 
 		pinctrl_owire1: owire1grp {
-			fsl,pins = <MX27_OWIRE1_PINGRP1>;
+			fsl,pins = <
+				MX27_PAD_RTCK__OWIRE 0x0
+			>;
 		};
 
 		pinctrl_sdhc2: sdhc2grp {
 			fsl,pins = <
-				MX27_SDHC2_PINGRP1
+				MX27_PAD_SD2_CLK__SD2_CLK 0x0
+				MX27_PAD_SD2_CMD__SD2_CMD 0x0
+				MX27_PAD_SD2_D0__SD2_D0 0x0
+				MX27_PAD_SD2_D1__SD2_D1 0x0
+				MX27_PAD_SD2_D2__SD2_D2 0x0
+				MX27_PAD_SD2_D3__SD2_D3 0x0
 				MX27_PAD_SSI3_FS__GPIO3_28	0x0 /* WP */
 				MX27_PAD_SSI3_RXDAT__GPIO3_29	0x0 /* CD */
 			>;

@@ -58,15 +65,19 @@
 
 		pinctrl_uart1: uart1grp {
 			fsl,pins = <
-				MX27_UART1_PINGRP1
-				MX27_UART1_RTSCTS_PINGRP1
+				MX27_PAD_UART1_TXD__UART1_TXD 0x0
+				MX27_PAD_UART1_RXD__UART1_RXD 0x0
+				MX27_PAD_UART1_CTS__UART1_CTS 0x0
+				MX27_PAD_UART1_RTS__UART1_RTS 0x0
 			>;
 		};
 
 		pinctrl_uart2: uart2grp {
 			fsl,pins = <
-				MX27_UART2_PINGRP1
-				MX27_UART2_RTSCTS_PINGRP1
+				MX27_PAD_UART2_TXD__UART2_TXD 0x0
+				MX27_PAD_UART2_RXD__UART2_RXD 0x0
+				MX27_PAD_UART2_CTS__UART2_CTS 0x0
+				MX27_PAD_UART2_RTS__UART2_RTS 0x0
 			>;
 		};

arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi +34 -4

index c934999..230cfaf 100644
@@ -186,7 +186,9 @@
 	imx27_phycore_som {
 		pinctrl_cspi1: cspi1grp {
 			fsl,pins = <
-				MX27_CSPI1_PINGRP1
+				MX27_PAD_CSPI1_MISO__CSPI1_MISO 0x0
+				MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0
+				MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0
 				MX27_PAD_CSPI1_SS0__GPIO4_28	0x0 /* SPI1 CS0 */
 				MX27_PAD_USB_PWR__GPIO2_23	0x0 /* PMIC IRQ */
 			>;

@@ -194,17 +196,45 @@
 
 		pinctrl_fec1: fec1grp {
 			fsl,pins = <
-				MX27_FEC1_PINGRP1
+				MX27_PAD_SD3_CMD__FEC_TXD0 0x0
+				MX27_PAD_SD3_CLK__FEC_TXD1 0x0
+				MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
+				MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
+				MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
+				MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
+				MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
+				MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
+				MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
+				MX27_PAD_ATA_DATA7__FEC_MDC 0x0
+				MX27_PAD_ATA_DATA8__FEC_CRS 0x0
+				MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0
+				MX27_PAD_ATA_DATA10__FEC_RXD0 0x0
+				MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0
+				MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0
+				MX27_PAD_ATA_DATA13__FEC_COL 0x0
+				MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0
+				MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0
 				MX27_PAD_SSI3_TXDAT__GPIO3_30	0x0 /* FEC RST */
 			>;
 		};
 
 		pinctrl_i2c2: i2c2grp {
-			fsl,pins = <MX27_I2C2_PINGRP1>;
+			fsl,pins = <
+				MX27_PAD_I2C2_SDA__I2C2_SDA 0x0
+				MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
+			>;
 		};
 
 		pinctrl_nfc: nfcgrp {
-			fsl,pins = <MX27_NFC_PINGRP1>;
+			fsl,pins = <
+				MX27_PAD_NFRB__NFRB 0x0
+				MX27_PAD_NFCLE__NFCLE 0x0
+				MX27_PAD_NFWP_B__NFWP_B 0x0
+				MX27_PAD_NFCE_B__NFCE_B 0x0
+				MX27_PAD_NFALE__NFALE 0x0
+				MX27_PAD_NFRE_B__NFRE_B 0x0
+				MX27_PAD_NFWE_B__NFWE_B 0x0
+			>;
 		};
 	};
 };

arch/arm/boot/dts/imx27-pingrp.h deleted +0 ~~-151~~

151 lines not on this page · raw message

arch/arm/boot/dts/imx27.dtsi +1 -1

index 63b1b32..1af8fcf 100644
@@ -10,7 +10,7 @@
  */
 
 #include "skeleton.dtsi"
-#include "imx27-pingrp.h"
+#include "imx27-pinfunc.h"
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>

Signature · 1 line

1.7.9.5

Shawn Guo

author

2014-01-25 16:43 UTC #18 lore raw

PATCH 9/9 ARM: dts: vf610: remove the use of pingrp macros

In reply to Shawn Guo

We created the pingrp macros in vf610-pingrp.h for purpose of less LOC when same pin group is used by multiple boards. However, DT maintainers take it as an abuse of DTC macro support. So let's get rid of it to make the pins used by given device more intuitive.

Signed-off-by Shawn Guo <[email protected]>

---
 arch/arm/boot/dts/vf610-cosmic.dts |   17 ++++-
 arch/arm/boot/dts/vf610-pingrp.h   |  127 ------------------------------------
 arch/arm/boot/dts/vf610-twr.dts    |   42 ++++++++++--
 arch/arm/boot/dts/vf610.dtsi       |    2 +-
 4 files changed, 53 insertions(+), 135 deletions(-)
 delete mode 100644 arch/arm/boot/dts/vf610-pingrp.h

arch/arm/boot/dts/vf610-cosmic.dts +15 -2

index 432960a..3fd1b74 100644
@@ -43,11 +43,24 @@
 &iomuxc {
 	vf610-cosmic {
 		pinctrl_fec1: fec1grp {
-			fsl,pins = <VF610_FEC1_PINGRP1>;
+			fsl,pins = <
+				VF610_PAD_PTC9__ENET_RMII1_MDC		0x30d2
+				VF610_PAD_PTC10__ENET_RMII1_MDIO	0x30d3
+				VF610_PAD_PTC11__ENET_RMII1_CRS		0x30d1
+				VF610_PAD_PTC12__ENET_RMII_RXD1		0x30d1
+				VF610_PAD_PTC13__ENET_RMII1_RXD0	0x30d1
+				VF610_PAD_PTC14__ENET_RMII1_RXER	0x30d1
+				VF610_PAD_PTC15__ENET_RMII1_TXD1	0x30d2
+				VF610_PAD_PTC16__ENET_RMII1_TXD0	0x30d2
+				VF610_PAD_PTC17__ENET_RMII1_TXEN	0x30d2
+			>;
 		};
 
 		pinctrl_uart1: uart1grp {
-			fsl,pins = <VF610_UART1_PINGRP1>;
+			fsl,pins = <
+				VF610_PAD_PTB4__UART1_TX		0x21a2
+				VF610_PAD_PTB5__UART1_RX		0x21a1
+			>;
 		};
 	};
 };

arch/arm/boot/dts/vf610-pingrp.h deleted +0 ~~-127~~

127 lines not on this page · raw message

arch/arm/boot/dts/vf610-twr.dts +37 -5

60 lines not on this page · raw message

arch/arm/boot/dts/vf610.dtsi +1 -1

index ef8a0ee..183943e 100644
@@ -8,7 +8,7 @@
  */
 
 #include "skeleton.dtsi"
-#include "vf610-pingrp.h"
+#include "vf610-pinfunc.h"
 #include <dt-bindings/clock/vf610-clock.h>
 
 / {

Signature · 1 line

1.7.9.5

Rob Herring

2014-01-27 14:04 UTC #19 lore raw

cover ARM: dts: imx: remove the use of pingrp macros

In reply to Shawn Guo

Quoted 9 lines · Shawn Guo

Hi Rob,
In order to solve a pinctrl data efficiency problem, we introduced pingrp macros [1] in this development cycle as the base of board dts support. The whole imx-dt-3.14 pull request has been held by Olof for a few weeks because he wants to get a general approval from DT folks on this change. But unfortunately it appears that you are not fond of this change.

Quoted 3 lines

I just spent the day to create a patch series against imx-dt-3.14 to remove these pingrp macros. May I get your nod on this quick turn-around, so that we do not miss the merge window?

I've only skimmed thru some of the patches, but in general it looks fine to me:

Acked-by Rob Herring <[email protected]>

Rob

Quoted 98 lines

Hi Olof,

I guess we do not have to shut the door for imx-dt-3.14 if you and DT folks are happy with this patch series, which is a quite straight forward search&replace change?

Shawn

[1] http://thread.gmane.org/gmane.linux.ports.arm.kernel/275912/

 arch/arm/boot/dts/imx25-eukrea-cpuimx25.dtsi       |   17 +-
 .../boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts  |   56 ++-
 arch/arm/boot/dts/imx25-pingrp.h                   |   81 ---
 arch/arm/boot/dts/imx25.dtsi                       |    2 +-
 arch/arm/boot/dts/imx27-apf27.dts                  |   26 +-
 arch/arm/boot/dts/imx27-apf27dev.dts               |   65 ++-
 arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts   |   27 +-
 arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts   |   26 +-
 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts     |   23 +-
 arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi    |   38 +-
 arch/arm/boot/dts/imx27-pingrp.h                   |  151 ------
 arch/arm/boot/dts/imx27.dtsi                       |    2 +-
 arch/arm/boot/dts/imx35-pingrp.h                   |  104 ----
 arch/arm/boot/dts/imx35.dtsi                       |    1 -
 arch/arm/boot/dts/imx50-evk.dts                    |   28 +-
 arch/arm/boot/dts/imx50-pingrp.h                   |  146 ------
 arch/arm/boot/dts/imx50.dtsi                       |    2 +-
 arch/arm/boot/dts/imx51-apf51.dts                  |   26 +-
 arch/arm/boot/dts/imx51-apf51dev.dts               |   64 ++-
 arch/arm/boot/dts/imx51-babbage.dts                |  142 +++++-
 arch/arm/boot/dts/imx51-eukrea-cpuimx51.dtsi       |   26 +-
 .../boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts  |   31 +-
 arch/arm/boot/dts/imx51-pingrp.h                   |  249 ---------
 arch/arm/boot/dts/imx51.dtsi                       |    2 +-
 arch/arm/boot/dts/imx53-ard.dts                    |   18 +-
 arch/arm/boot/dts/imx53-evk.dts                    |   51 +-
 arch/arm/boot/dts/imx53-m53evk.dts                 |  128 ++++-
 arch/arm/boot/dts/imx53-pingrp.h                   |  352 -------------
 arch/arm/boot/dts/imx53-qsb.dts                    |   88 +++-
 arch/arm/boot/dts/imx53-smd.dts                    |   77 ++-
 arch/arm/boot/dts/imx53-tqma53.dtsi                |   89 +++-
 arch/arm/boot/dts/imx53-voipac-bsb.dts             |   21 +-
 arch/arm/boot/dts/imx53-voipac-dmm-668.dtsi        |   47 +-
 arch/arm/boot/dts/imx53.dtsi                       |    2 +-
 arch/arm/boot/dts/imx6dl-hummingboard.dts          |    5 +-
 arch/arm/boot/dts/imx6dl.dtsi                      |    1 -
 arch/arm/boot/dts/imx6q-arm2.dts                   |   81 ++-
 arch/arm/boot/dts/imx6q-cm-fx6.dts                 |   44 +-
 arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts            |   47 +-
 arch/arm/boot/dts/imx6q-gw5400-a.dts               |   75 ++-
 arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi         |   53 +-
 arch/arm/boot/dts/imx6q-sbc6x.dts                  |   37 +-
 arch/arm/boot/dts/imx6q-udoo.dts                   |   33 +-
 arch/arm/boot/dts/imx6q.dtsi                       |    1 -
 arch/arm/boot/dts/imx6qdl-gw51xx.dtsi              |   77 ++-
 arch/arm/boot/dts/imx6qdl-gw52xx.dtsi              |   88 +++-
 arch/arm/boot/dts/imx6qdl-gw53xx.dtsi              |   93 +++-
 arch/arm/boot/dts/imx6qdl-gw54xx.dtsi              |   93 +++-
 arch/arm/boot/dts/imx6qdl-microsom.dtsi            |    5 +-
 arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi          |   56 ++-
 arch/arm/boot/dts/imx6qdl-pingrp.h                 |  532 --------------------
 arch/arm/boot/dts/imx6qdl-sabreauto.dtsi           |  139 ++++-
 arch/arm/boot/dts/imx6qdl-sabrelite.dtsi           |   56 ++-
 arch/arm/boot/dts/imx6qdl-sabresd.dtsi             |   86 +++-
 arch/arm/boot/dts/imx6qdl-wandboard.dtsi           |   78 ++-
 arch/arm/boot/dts/imx6sl-evk.dts                   |  120 ++++-
 arch/arm/boot/dts/imx6sl-pingrp.h                  |  148 ------
 arch/arm/boot/dts/imx6sl.dtsi                      |    1 -
 arch/arm/boot/dts/vf610-cosmic.dts                 |   17 +-
 arch/arm/boot/dts/vf610-pingrp.h                   |  127 -----
 arch/arm/boot/dts/vf610-twr.dts                    |   42 +-
 arch/arm/boot/dts/vf610.dtsi                       |    2 +-
 62 files changed, 2163 insertions(+), 2182 deletions(-)
 delete mode 100644 arch/arm/boot/dts/imx25-pingrp.h
 delete mode 100644 arch/arm/boot/dts/imx27-pingrp.h
 delete mode 100644 arch/arm/boot/dts/imx35-pingrp.h
 delete mode 100644 arch/arm/boot/dts/imx50-pingrp.h
 delete mode 100644 arch/arm/boot/dts/imx51-pingrp.h
 delete mode 100644 arch/arm/boot/dts/imx53-pingrp.h
 delete mode 100644 arch/arm/boot/dts/imx6qdl-pingrp.h
 delete mode 100644 arch/arm/boot/dts/imx6sl-pingrp.h
 delete mode 100644 arch/arm/boot/dts/vf610-pingrp.h

--
1.7.9.5

Olof Johansson

2014-01-27 17:47 UTC #20 lore raw

cover ARM: dts: imx: remove the use of pingrp macros

In reply to Shawn Guo

Shawn,

Quoted 13 lines · Shawn Guo

Hi Rob,
In order to solve a pinctrl data efficiency problem, we introduced pingrp macros [1] in this development cycle as the base of board dts support. The whole imx-dt-3.14 pull request has been held by Olof for a few weeks because he wants to get a general approval from DT folks on this change. But unfortunately it appears that you are not fond of this change.
I just spent the day to create a patch series against imx-dt-3.14 to remove these pingrp macros. May I get your nod on this quick turn-around, so that we do not miss the merge window?

Quoted 5 lines

Hi Olof,
I guess we do not have to shut the door for imx-dt-3.14 if you and DT folks are happy with this patch series, which is a quite straight forward search&replace change?

The merge window is halfway over already, the time for us to pick up large branches like these are long past.

Please rebase (since this is a partial revert of some of the earlier patches in your dt branch, I think?), and resend after -rc1 for 3.15 inclusion.

Thanks,

-Olof