arm: covert a few locks to raw_spin_lock_t
Subsystems (11)
cover arm: covert a few locks to raw_spin_lock_t
This is a repost. The only change since the last post happend in 1/3 were I added two additional boot_lock user.
This raw_spin_lock_t changes were identified under PREEMP_RT.
Sebastian
PATCH 1/3 arm: Convert arm boot_lock to raw
From: Frank Rowand <[email protected]>
The arm boot_lock is used by the secondary processor startup code. The locking task is the idle thread, which has idle->sched_class == &idle_sched_class. idle_sched_class->enqueue_task == NULL, so if the idle task blocks on the lock, the attempt to wake it when the lock becomes available will fail:
try_to_wake_up()
...
activate_task()
enqueue_task()
p->sched_class->enqueue_task(rq, p, flags)Fix by converting boot_lock to a raw spin lock.
Cc "Andreas F?rber" <[email protected]>
Cc Kukjin Kim <[email protected]>
Cc Krzysztof Kozlowski <[email protected]>
Cc Wei Xu <[email protected]>
Cc Tony Lindgren <[email protected]>
Cc Barry Song <[email protected]>
Cc Andy Gross <[email protected]>
Cc David Brown <[email protected]>
Cc Viresh Kumar <[email protected]>
Cc Shiraz Hashim <[email protected]>
Cc Patrice Chotard <[email protected]>
Cc Maxime Ripard <[email protected]>
Cc Chen-Yu Tsai <[email protected]>
Cc linux-samsung-soc at vger.kernel.org
Cc linux-omap at vger.kernel.org
Cc linux-arm-msm at vger.kernel.org
Cc linux-soc at vger.kernel.org
Signed-off-by Frank Rowand <[email protected]>
Link http://lkml.kernel.org/r/4E77B952.3010606 at am.sony.com
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Tony Lindgren <[email protected]>
Signed-off-by Sebastian Andrzej Siewior <[email protected]>
--- arch/arm/mach-actions/platsmp.c | 6 +++--- arch/arm/mach-exynos/platsmp.c | 12 ++++++------ arch/arm/mach-hisi/platmcpm.c | 22 +++++++++++----------- arch/arm/mach-omap2/omap-smp.c | 10 +++++----- arch/arm/mach-prima2/platsmp.c | 10 +++++----- arch/arm/mach-qcom/platsmp.c | 10 +++++----- arch/arm/mach-spear/platsmp.c | 10 +++++----- arch/arm/mach-sti/platsmp.c | 10 +++++----- arch/arm/mach-sunxi/mc_smp.c | 20 ++++++++++---------- arch/arm/plat-versatile/platsmp.c | 10 +++++----- 10 files changed, 60 insertions(+), 60 deletions(-)
arch/arm/mach-actions/platsmp.c +3 -3
@@ -39,7 +39,7 @@ static void __iomem *sps_base_addr;static void __iomem *timer_base_addr;static int ncores; -static DEFINE_SPINLOCK (boot_lock); +static DEFINE_RAW_SPINLOCK (boot_lock);void owl_secondary_startup (void );
@@ -93,7 +93,7 @@ static int s500_smp_boot_secondary(unsigned int cpu, struct task_struct *idle)udelay (10 ); -spin_lock (&boot_lock); +raw_spin_lock (&boot_lock);smp_send_reschedule (cpu);
@@ -106,7 +106,7 @@ static int s500_smp_boot_secondary(unsigned int cpu, struct task_struct *idle)writel (0 , timer_base_addr +OWL_CPU1_ADDR + (cpu -1 ) *4 );writel (0 , timer_base_addr +OWL_CPU1_FLAG + (cpu -1 ) *4 ); -spin_unlock (&boot_lock); +raw_spin_unlock (&boot_lock);return 0 ; }
arch/arm/mach-exynos/platsmp.c +6 -6
@@ -239,7 +239,7 @@ static void write_pen_release(int val)sync_cache_w (&pen_release); } -static DEFINE_SPINLOCK (boot_lock); +static DEFINE_RAW_SPINLOCK (boot_lock);static void exynos_secondary_init (unsigned int cpu) {
@@ -252,8 +252,8 @@ static void exynos_secondary_init(unsigned int cpu)/* * Synchronise with the boot thread. */ -spin_lock (&boot_lock); -spin_unlock (&boot_lock); +raw_spin_lock (&boot_lock); +raw_spin_unlock (&boot_lock); }int exynos_set_boot_addr (u32 core_id,unsigned long boot_addr)
@@ -317,7 +317,7 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)* Set synchronisation state between this boot processor * and the secondary one */ -spin_lock (&boot_lock); +raw_spin_lock (&boot_lock);/* * The secondary processor is waiting to be released from
@@ -344,7 +344,7 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)if (timeout ==0 ) {printk (KERN_ERR "cpu1 power enable failed" ); -spin_unlock (&boot_lock); +raw_spin_unlock (&boot_lock);return -ETIMEDOUT ; } }
@@ -390,7 +390,7 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)* calibrations, then wait for it to finish */ fail: -spin_unlock (&boot_lock); +raw_spin_unlock (&boot_lock);return pen_release !=-1 ? ret :0 ; }
arch/arm/mach-hisi/platmcpm.c +11 -11
@@ -61,7 +61,7 @@static void __iomem *sysctrl, *fabric;static int hip04_cpu_table[HIP04_MAX_CLUSTERS ][HIP04_MAX_CPUS_PER_CLUSTER ]; -static DEFINE_SPINLOCK (boot_lock); +static DEFINE_RAW_SPINLOCK (boot_lock);static u32 fabric_phys_addr;/* * [0]: bootwrapper physical address
@@ -113,7 +113,7 @@ static int hip04_boot_secondary(unsigned int l_cpu, struct task_struct *idle)if (cluster >=HIP04_MAX_CLUSTERS || cpu >=HIP04_MAX_CPUS_PER_CLUSTER )return -EINVAL ; -spin_lock_irq (&boot_lock); +raw_spin_lock_irq (&boot_lock);if (hip04_cpu_table[cluster][cpu]) goto out;
@@ -147,7 +147,7 @@ static int hip04_boot_secondary(unsigned int l_cpu, struct task_struct *idle) out: hip04_cpu_table[cluster][cpu]++; -spin_unlock_irq (&boot_lock); +raw_spin_unlock_irq (&boot_lock);return 0 ; }
@@ -162,11 +162,11 @@ static void hip04_cpu_die(unsigned int l_cpu) cpu =MPIDR_AFFINITY_LEVEL (mpidr,0 ); cluster =MPIDR_AFFINITY_LEVEL (mpidr,1 ); -spin_lock (&boot_lock); +raw_spin_lock (&boot_lock); hip04_cpu_table[cluster][cpu]--;if (hip04_cpu_table[cluster][cpu] ==1 ) {/* A power_up request went ahead of us. */ -spin_unlock (&boot_lock); +raw_spin_unlock (&boot_lock);return ; }else if (hip04_cpu_table[cluster][cpu] >1 ) {pr_err ("Cluster %d CPU%d boots multiple times\n" , cluster, cpu);
@@ -174,7 +174,7 @@ static void hip04_cpu_die(unsigned int l_cpu) } last_man =hip04_cluster_is_down (cluster); -spin_unlock (&boot_lock); +raw_spin_unlock (&boot_lock);if (last_man) {/* Since it's Cortex A15, disable L2 prefetching. */ asm volatile(
@@ -203,7 +203,7 @@ static int hip04_cpu_kill(unsigned int l_cpu) cpu >= HIP04_MAX_CPUS_PER_CLUSTER); count =TIMEOUT_MSEC /POLL_MSEC ; -spin_lock_irq (&boot_lock); +raw_spin_lock_irq (&boot_lock);for (tries =0 ; tries < count; tries++) {if (hip04_cpu_table[cluster][cpu]) goto err;
@@ -211,10 +211,10 @@ static int hip04_cpu_kill(unsigned int l_cpu) data =readl_relaxed (sysctrl +SC_CPU_RESET_STATUS (cluster));if (data &CORE_WFI_STATUS (cpu))break ; -spin_unlock_irq (&boot_lock); +raw_spin_unlock_irq (&boot_lock);/* Wait for clean L2 when the whole cluster is down. */ msleep (POLL_MSEC ); -spin_lock_irq (&boot_lock); +raw_spin_lock_irq (&boot_lock); }if (tries >= count) goto err;
@@ -231,10 +231,10 @@ static int hip04_cpu_kill(unsigned int l_cpu) goto err;if (hip04_cluster_is_down (cluster))hip04_set_snoop_filter (cluster,0 ); -spin_unlock_irq (&boot_lock); +raw_spin_unlock_irq (&boot_lock);return 1 ; err: -spin_unlock_irq (&boot_lock); +raw_spin_unlock_irq (&boot_lock); return 0; }#endif
arch/arm/mach-omap2/omap-smp.c +5 -5
@@ -69,7 +69,7 @@ static const struct omap_smp_config omap5_cfg __initconst = { .startup_addr = omap5_secondary_startup, }; -static DEFINE_SPINLOCK (boot_lock); +static DEFINE_RAW_SPINLOCK (boot_lock);void __iomem *omap4_get_scu_base (void ) {
@@ -136,8 +136,8 @@ static void omap4_secondary_init(unsigned int cpu)/* * Synchronise with the boot thread. */ -spin_lock (&boot_lock); -spin_unlock (&boot_lock); +raw_spin_lock (&boot_lock); +raw_spin_unlock (&boot_lock); }static int omap4_boot_secondary (unsigned int cpu,struct task_struct *idle)
@@ -150,7 +150,7 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)* Set synchronisation state between this boot processor * and the secondary one */ -spin_lock (&boot_lock); +raw_spin_lock (&boot_lock);/* * Update the AuxCoreBoot0 with boot state for secondary core.
@@ -229,7 +229,7 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)* Now the secondary core is starting up let it run its * calibrations, then wait for it to finish */ -spin_unlock (&boot_lock); +raw_spin_unlock (&boot_lock);return 0 ; }
arch/arm/mach-prima2/platsmp.c +5 -5
@@ -22,7 +22,7 @@static void __iomem *clk_base; -static DEFINE_SPINLOCK (boot_lock); +static DEFINE_RAW_SPINLOCK (boot_lock);static void sirfsoc_secondary_init (unsigned int cpu) {
@@ -36,8 +36,8 @@ static void sirfsoc_secondary_init(unsigned int cpu)/* * Synchronise with the boot thread. */ -spin_lock (&boot_lock); -spin_unlock (&boot_lock); +raw_spin_lock (&boot_lock); +raw_spin_unlock (&boot_lock); }static const struct of_device_id clk_ids[] = {
@@ -75,7 +75,7 @@ static int sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle)/* make sure write buffer is drained */ mb (); -spin_lock (&boot_lock); +raw_spin_lock (&boot_lock);/* * The secondary processor is waiting to be released from
@@ -107,7 +107,7 @@ static int sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle)* now the secondary core is starting up let it run its * calibrations, then wait for it to finish */ -spin_unlock (&boot_lock); +raw_spin_unlock (&boot_lock);return pen_release !=-1 ? -ENOSYS :0 ; }
arch/arm/mach-qcom/platsmp.c +5 -5
@@ -46,7 +46,7 @@extern void secondary_startup_arm (void ); -static DEFINE_SPINLOCK (boot_lock); +static DEFINE_RAW_SPINLOCK (boot_lock);#ifdef CONFIG_HOTPLUG_CPU static void qcom_cpu_die (unsigned int cpu)
@@ -60,8 +60,8 @@ static void qcom_secondary_init(unsigned int cpu)/* * Synchronise with the boot thread. */ -spin_lock (&boot_lock); -spin_unlock (&boot_lock); +raw_spin_lock (&boot_lock); +raw_spin_unlock (&boot_lock); }static int scss_release_secondary (unsigned int cpu)
@@ -284,7 +284,7 @@ static int qcom_boot_secondary(unsigned int cpu, int (*func)(unsigned int))* set synchronisation state between this boot processor * and the secondary one */ -spin_lock (&boot_lock); +raw_spin_lock (&boot_lock);/* * Send the secondary CPU a soft interrupt, thereby causing
@@ -297,7 +297,7 @@ static int qcom_boot_secondary(unsigned int cpu, int (*func)(unsigned int))* now the secondary core is starting up let it run its * calibrations, then wait for it to finish */ -spin_unlock (&boot_lock); +raw_spin_unlock (&boot_lock);return ret; }
arch/arm/mach-spear/platsmp.c +5 -5
@@ -32,7 +32,7 @@ static void write_pen_release(int val)sync_cache_w (&pen_release); } -static DEFINE_SPINLOCK (boot_lock); +static DEFINE_RAW_SPINLOCK (boot_lock);static void __iomem *scu_base =IOMEM (VA_SCU_BASE );
@@ -47,8 +47,8 @@ static void spear13xx_secondary_init(unsigned int cpu)/* * Synchronise with the boot thread. */ -spin_lock (&boot_lock); -spin_unlock (&boot_lock); +raw_spin_lock (&boot_lock); +raw_spin_unlock (&boot_lock); }static int spear13xx_boot_secondary (unsigned int cpu,struct task_struct *idle)
@@ -59,7 +59,7 @@ static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle)* set synchronisation state between this boot processor * and the secondary one */ -spin_lock (&boot_lock); +raw_spin_lock (&boot_lock);/* * The secondary processor is waiting to be released from
@@ -84,7 +84,7 @@ static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle)* now the secondary core is starting up let it run its * calibrations, then wait for it to finish */ -spin_unlock (&boot_lock); +raw_spin_unlock (&boot_lock);return pen_release !=-1 ? -ENOSYS :0 ; }
arch/arm/mach-sti/platsmp.c +5 -5
@@ -35,7 +35,7 @@ static void write_pen_release(int val)sync_cache_w (&pen_release); } -static DEFINE_SPINLOCK (boot_lock); +static DEFINE_RAW_SPINLOCK (boot_lock);static void sti_secondary_init (unsigned int cpu) {
@@ -48,8 +48,8 @@ static void sti_secondary_init(unsigned int cpu)/* * Synchronise with the boot thread. */ -spin_lock (&boot_lock); -spin_unlock (&boot_lock); +raw_spin_lock (&boot_lock); +raw_spin_unlock (&boot_lock); }static int sti_boot_secondary (unsigned int cpu,struct task_struct *idle)
@@ -60,7 +60,7 @@ static int sti_boot_secondary(unsigned int cpu, struct task_struct *idle)* set synchronisation state between this boot processor * and the secondary one */ -spin_lock (&boot_lock); +raw_spin_lock (&boot_lock);/* * The secondary processor is waiting to be released from
@@ -91,7 +91,7 @@ static int sti_boot_secondary(unsigned int cpu, struct task_struct *idle)* now the secondary core is starting up let it run its * calibrations, then wait for it to finish */ -spin_unlock (&boot_lock); +raw_spin_unlock (&boot_lock);return pen_release !=-1 ? -ENOSYS :0 ; }
arch/arm/mach-sunxi/mc_smp.c +10 -10
@@ -367,7 +367,7 @@ static void sunxi_cluster_cache_disable_without_axi(void)static int sunxi_mc_smp_cpu_table[SUNXI_NR_CLUSTERS ][SUNXI_CPUS_PER_CLUSTER ];int sunxi_mc_smp_first_comer; -static DEFINE_SPINLOCK (boot_lock); +static DEFINE_RAW_SPINLOCK (boot_lock);static bool sunxi_mc_smp_cluster_is_down (unsigned int cluster) {
@@ -399,7 +399,7 @@ static int sunxi_mc_smp_boot_secondary(unsigned int l_cpu, struct task_struct *iif (cluster >=SUNXI_NR_CLUSTERS || cpu >=SUNXI_CPUS_PER_CLUSTER )return -EINVAL ; -spin_lock_irq (&boot_lock); +raw_spin_lock_irq (&boot_lock);if (sunxi_mc_smp_cpu_table[cluster][cpu]) goto out;
@@ -417,7 +417,7 @@ static int sunxi_mc_smp_boot_secondary(unsigned int l_cpu, struct task_struct *i out: sunxi_mc_smp_cpu_table[cluster][cpu]++; -spin_unlock_irq (&boot_lock); +raw_spin_unlock_irq (&boot_lock);return 0 ; }
@@ -448,13 +448,13 @@ static void sunxi_mc_smp_cpu_die(unsigned int l_cpu) cluster =MPIDR_AFFINITY_LEVEL (mpidr,1 );pr_debug ("%s: cluster %u cpu %u\n" , __func__, cluster, cpu); -spin_lock (&boot_lock); +raw_spin_lock (&boot_lock); sunxi_mc_smp_cpu_table[cluster][cpu]--;if (sunxi_mc_smp_cpu_table[cluster][cpu] ==1 ) {/* A power_up request went ahead of us. */ pr_debug ("%s: aborting due to a power up request\n" , __func__); -spin_unlock (&boot_lock); +raw_spin_unlock (&boot_lock);return ; }else if (sunxi_mc_smp_cpu_table[cluster][cpu] >1 ) { pr_err("Cluster %d CPU%d boots multiple times\n",
@@ -463,7 +463,7 @@ static void sunxi_mc_smp_cpu_die(unsigned int l_cpu) } last_man =sunxi_mc_smp_cluster_is_down (cluster); -spin_unlock (&boot_lock); +raw_spin_unlock (&boot_lock);gic_cpu_if_down (0 );if (last_man)
@@ -542,11 +542,11 @@ static int sunxi_mc_smp_cpu_kill(unsigned int l_cpu)/* wait for CPU core to die and enter WFI */ count =TIMEOUT_USEC /POLL_USEC ; -spin_lock_irq (&boot_lock); +raw_spin_lock_irq (&boot_lock);for (tries =0 ; tries < count; tries++) { -spin_unlock_irq (&boot_lock); +raw_spin_unlock_irq (&boot_lock);usleep_range (POLL_USEC /2 ,POLL_USEC ); -spin_lock_irq (&boot_lock); +raw_spin_lock_irq (&boot_lock);/* * If the user turns off a bunch of cores@the same
@@ -593,7 +593,7 @@ static int sunxi_mc_smp_cpu_kill(unsigned int l_cpu)sunxi_cluster_powerdown (cluster); out: -spin_unlock_irq (&boot_lock); +raw_spin_unlock_irq (&boot_lock);pr_debug ("%s: cluster %u cpu %u powerdown: %d\n" , __func__, cluster, cpu, ret);return !ret;
arch/arm/plat-versatile/platsmp.c +5 -5
@@ -32,7 +32,7 @@ static void write_pen_release(int val)sync_cache_w (&pen_release); } -static DEFINE_SPINLOCK (boot_lock); +static DEFINE_RAW_SPINLOCK (boot_lock);void versatile_secondary_init (unsigned int cpu) {
@@ -45,8 +45,8 @@ void versatile_secondary_init(unsigned int cpu)/* * Synchronise with the boot thread. */ -spin_lock (&boot_lock); -spin_unlock (&boot_lock); +raw_spin_lock (&boot_lock); +raw_spin_unlock (&boot_lock); }int versatile_boot_secondary (unsigned int cpu,struct task_struct *idle)
@@ -57,7 +57,7 @@ int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle)* Set synchronisation state between this boot processor * and the secondary one */ -spin_lock (&boot_lock); +raw_spin_lock (&boot_lock);/* * This is really belt and braces; we hold unintended secondary
@@ -87,7 +87,7 @@ int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle)* now the secondary core is starting up let it run its * calibrations, then wait for it to finish */ -spin_unlock (&boot_lock); +raw_spin_unlock (&boot_lock);return pen_release !=-1 ? -ENOSYS :0 ; }
Signature · 1 line
2.18.0
Andreas Färber
maintainerPATCH 1/3 arm: Convert arm boot_lock to raw
Am 11.07.2018 um 13:00 schrieb Sebastian Andrzej Siewior:
Quoted 75 lines
From: Frank Rowand <[email protected]>
The arm
boot_lockis used by the secondary processor startup code. The locking task is the idle thread, which hasidle->sched_class==&idle_sched_class.idle_sched_class->enqueue_task== NULL, so if the idle task blocks on the lock, the attempt to wake it when the lock becomes available will fail:
try_to_wake_up()
...activate_task() enqueue_task() p->sched_class->enqueue_task(rq, p, flags)Fix by converting
boot_lockto a raw spin lock.Cc "Andreas F?rber" <[email protected]>Cc Kukjin Kim <[email protected]>Cc Krzysztof Kozlowski <[email protected]>Cc Wei Xu <[email protected]>Cc Tony Lindgren <[email protected]>Cc Barry Song <[email protected]>Cc Andy Gross <[email protected]>Cc David Brown <[email protected]>Cc Viresh Kumar <[email protected]>Cc Shiraz Hashim <[email protected]>Cc Patrice Chotard <[email protected]>Cc Maxime Ripard <[email protected]>Cc Chen-Yu Tsai <[email protected]>Cc linux-samsung-soc at vger.kernel.orgCc linux-omap at vger.kernel.orgCc linux-arm-msm at vger.kernel.orgCc linux-soc at vger.kernel.orgSigned-off-by Frank Rowand <[email protected]>Link http://lkml.kernel.org/r/4E77B952.3010606 at am.sony.comSigned-off-by Thomas Gleixner <[email protected]>Tested-by Tony Lindgren <[email protected]>Signed-off-by Sebastian Andrzej Siewior <[email protected]>--- arch/arm/mach-actions/platsmp.c | 6 +++--- arch/arm/mach-exynos/platsmp.c | 12 ++++++------ arch/arm/mach-hisi/platmcpm.c | 22 +++++++++++----------- arch/arm/mach-omap2/omap-smp.c | 10 +++++----- arch/arm/mach-prima2/platsmp.c | 10 +++++----- arch/arm/mach-qcom/platsmp.c | 10 +++++----- arch/arm/mach-spear/platsmp.c | 10 +++++----- arch/arm/mach-sti/platsmp.c | 10 +++++----- arch/arm/mach-sunxi/mc_smp.c | 20 ++++++++++---------- arch/arm/plat-versatile/platsmp.c | 10 +++++----- 10 files changed, 60 insertions(+), 60 deletions(-)arch/arm/mach-actions/platsmp.c +2
-2@@ -39,7 +39,7 @@ static void __iomem *sps_base_addr;static void __iomem *timer_base_addr;static int ncores; -static DEFINE_SPINLOCK (boot_lock); +static DEFINE_RAW_SPINLOCK (boot_lock);void owl_secondary_startup (void );@@ -93,7 +93,7 @@ static int s500_smp_boot_secondary(unsigned int cpu, struct task_struct *idle)udelay (10 ); -spin_lock (&boot_lock); +raw_spin_lock (&boot_lock);smp_send_reschedule (cpu);
arch/arm/mach-actions/platsmp.c static int s500_smp_boot_secondary(unsigned int cpu, struct task_struct *idle) · line 112
Quoted 8 lines
arch/arm/mach-actions/platsmp.c +1
-1@@ -106,7 +106,7 @@ static int s500_smp_boot_secondary(unsigned int cpu, struct task_struct *idle)writel (0 , timer_base_addr +OWL_CPU1_ADDR + (cpu -1 ) *4 );writel (0 , timer_base_addr +OWL_CPU1_FLAG + (cpu -1 ) *4 ); -spin_unlock (&boot_lock); +raw_spin_unlock (&boot_lock);return 0 ; }
[snip]
Looks okay, so
Regards,
Andreas
Signature · 3 lines
SUSE Linux GmbH, Maxfeldstr. 5, 90409 N?rnberg, Germany GF: Felix Imend?rffer, Jane Smithard, Graham Norton HRB 21284 (AG N?rnberg)
PATCH 1/3 arm: Convert arm boot_lock to raw
In reply to Sebastian Andrzej SiewiorQuoted 39 lines · Sebastian Andrzej Siewior
From: Frank Rowand <[email protected]>
The arm
boot_lockis used by the secondary processor startup code. The locking task is the idle thread, which hasidle->sched_class==&idle_sched_class.idle_sched_class->enqueue_task== NULL, so if the idle task blocks on the lock, the attempt to wake it when the lock becomes available will fail:
try_to_wake_up()
...activate_task() enqueue_task() p->sched_class->enqueue_task(rq, p, flags)Fix by converting
boot_lockto a raw spin lock.Cc "Andreas F?rber" <[email protected]>Cc Kukjin Kim <[email protected]>Cc Krzysztof Kozlowski <[email protected]>Cc Wei Xu <[email protected]>Cc Tony Lindgren <[email protected]>Cc Barry Song <[email protected]>Cc Andy Gross <[email protected]>Cc David Brown <[email protected]>Cc Viresh Kumar <[email protected]>Cc Shiraz Hashim <[email protected]>Cc Patrice Chotard <[email protected]>Cc Maxime Ripard <[email protected]>Cc Chen-Yu Tsai <[email protected]>Cc linux-samsung-soc at vger.kernel.orgCc linux-omap at vger.kernel.orgCc linux-arm-msm at vger.kernel.orgCc linux-soc at vger.kernel.orgSigned-off-by Frank Rowand <[email protected]>Link http://lkml.kernel.org/r/4E77B952.3010606 at am.sony.comSigned-off-by Thomas Gleixner <[email protected]>Tested-by Tony Lindgren <[email protected]>Signed-off-by Sebastian Andrzej Siewior <[email protected]>
Quoted 2 lines
--- arch/arm/mach-spear/platsmp.c | 10 +++++-----
Acked-by Viresh Kumar <[email protected]>
Signature · 1 line
viresh
PATCH 1/3 arm: Convert arm boot_lock to raw
In reply to Sebastian Andrzej SiewiorHi Sebastian
Quoted 39 lines · Sebastian Andrzej Siewior
From: Frank Rowand <[email protected]>
The arm
boot_lockis used by the secondary processor startup code. The locking task is the idle thread, which hasidle->sched_class==&idle_sched_class.idle_sched_class->enqueue_task== NULL, so if the idle task blocks on the lock, the attempt to wake it when the lock becomes available will fail:
try_to_wake_up()... activate_task() enqueue_task() p->sched_class->enqueue_task(rq, p, flags)Fix by converting
boot_lockto a raw spin lock.Cc "Andreas F?rber" <[email protected]>Cc Kukjin Kim <[email protected]>Cc Krzysztof Kozlowski <[email protected]>Cc Wei Xu <[email protected]>Cc Tony Lindgren <[email protected]>Cc Barry Song <[email protected]>Cc Andy Gross <[email protected]>Cc David Brown <[email protected]>Cc Viresh Kumar <[email protected]>Cc Shiraz Hashim <[email protected]>Cc Patrice Chotard <[email protected]>Cc Maxime Ripard <[email protected]>Cc Chen-Yu Tsai <[email protected]>Cc linux-samsung-soc at vger.kernel.orgCc linux-omap at vger.kernel.orgCc linux-arm-msm at vger.kernel.orgCc linux-soc at vger.kernel.orgSigned-off-by Frank Rowand <[email protected]>Link http://lkml.kernel.org/r/4E77B952.3010606 at am.sony.comSigned-off-by Thomas Gleixner <[email protected]>Tested-by Tony Lindgren <[email protected]>Signed-off-by Sebastian Andrzej Siewior <[email protected]>
Quoted 13 lines
--- arch/arm/mach-actions/platsmp.c | 6 +++--- arch/arm/mach-exynos/platsmp.c | 12 ++++++------ arch/arm/mach-hisi/platmcpm.c | 22 +++++++++++----------- arch/arm/mach-omap2/omap-smp.c | 10 +++++----- arch/arm/mach-prima2/platsmp.c | 10 +++++----- arch/arm/mach-qcom/platsmp.c | 10 +++++----- arch/arm/mach-spear/platsmp.c | 10 +++++----- arch/arm/mach-sti/platsmp.c | 10 +++++----- arch/arm/mach-sunxi/mc_smp.c | 20 ++++++++++---------- arch/arm/plat-versatile/platsmp.c | 10 +++++----- 10 files changed, 60 insertions(+), 60 deletions(-)
For mach-sti:
Acked-by Patrice Chotard <[email protected]>
Thanks
Wei Xu
maintainerPATCH 1/3 arm: Convert arm boot_lock to raw
In reply to Sebastian Andrzej SiewiorQuoted 39 lines · Sebastian Andrzej Siewior
From: Frank Rowand <[email protected]>
The arm
boot_lockis used by the secondary processor startup code. The locking task is the idle thread, which hasidle->sched_class==&idle_sched_class.idle_sched_class->enqueue_task== NULL, so if the idle task blocks on the lock, the attempt to wake it when the lock becomes available will fail:
try_to_wake_up()
...activate_task() enqueue_task() p->sched_class->enqueue_task(rq, p, flags)Fix by converting
boot_lockto a raw spin lock.Cc "Andreas F?rber" <[email protected]>Cc Kukjin Kim <[email protected]>Cc Krzysztof Kozlowski <[email protected]>Cc Wei Xu <[email protected]>Cc Tony Lindgren <[email protected]>Cc Barry Song <[email protected]>Cc Andy Gross <[email protected]>Cc David Brown <[email protected]>Cc Viresh Kumar <[email protected]>Cc Shiraz Hashim <[email protected]>Cc Patrice Chotard <[email protected]>Cc Maxime Ripard <[email protected]>Cc Chen-Yu Tsai <[email protected]>Cc linux-samsung-soc at vger.kernel.orgCc linux-omap at vger.kernel.orgCc linux-arm-msm at vger.kernel.orgCc linux-soc at vger.kernel.orgSigned-off-by Frank Rowand <[email protected]>Link http://lkml.kernel.org/r/4E77B952.3010606 at am.sony.comSigned-off-by Thomas Gleixner <[email protected]>Tested-by Tony Lindgren <[email protected]>Signed-off-by Sebastian Andrzej Siewior <[email protected]>
Quoted 4 lines
--- arch/arm/mach-actions/platsmp.c | 6 +++--- arch/arm/mach-exynos/platsmp.c | 12 ++++++------ arch/arm/mach-hisi/platmcpm.c | 22 +++++++++++-----------
Thanks!
Best Regards,
Wei
PATCH 2/3 arm: kprobe: replace patch_lock to raw lock
In reply to Sebastian Andrzej SiewiorFrom: Yang Shi <[email protected]>
When running kprobe on -rt kernel, the below bug is caught:
BUG: sleeping function called from invalid context at kernel/locking/rtmutex.c:931 in_atomic(): 1, irqs_disabled(): 128, pid: 14, name: migration/0 INFO: lockdep is turned off. irq event stamp: 238 hardirqs last enabled at (237): [<80b5aecc>] _raw_spin_unlock_irqrestore+0x88/0x90 hardirqs last disabled at (238): [<80b56d88>] __schedule+0xec/0x94c softirqs last enabled at (0): [<80225584>] copy_process.part.5+0x30c/0x1994 softirqs last disabled at (0): [< (null)>] (null) Preemption disabled at:[<802f2b98>] cpu_stopper_thread+0xc0/0x140 CPU: 0 PID: 14 Comm: migration/0 Tainted: G O 4.8.3-rt2 #1 Hardware name: Freescale LS1021A [<80212e7c>] (unwind_backtrace) from [<8020cd2c>] (show_stack+0x20/0x24) [<8020cd2c>] (show_stack) from [<80689e14>] (dump_stack+0xa0/0xcc) [<80689e14>] (dump_stack) from [<8025a43c>] (___might_sleep+0x1b8/0x2a4) [<8025a43c>] (___might_sleep) from [<80b5b324>] (rt_spin_lock+0x34/0x74) [<80b5b324>] (rt_spin_lock) from [<80b5c31c>] (__patch_text_real+0x70/0xe8) [<80b5c31c>] (__patch_text_real) from [<80b5c3ac>] (patch_text_stop_machine+0x18/0x20) [<80b5c3ac>] (patch_text_stop_machine) from [<802f2920>] (multi_cpu_stop+0xfc/0x134) [<802f2920>] (multi_cpu_stop) from [<802f2ba0>] (cpu_stopper_thread+0xc8/0x140) [<802f2ba0>] (cpu_stopper_thread) from [<802563a4>] (smpboot_thread_fn+0x1a4/0x354) [<802563a4>] (smpboot_thread_fn) from [<80251d38>] (kthread+0x104/0x11c) [<80251d38>] (kthread) from [<80207f70>] (ret_from_fork+0x14/0x24)
Since patch_text_stop_machine() is called in stop_machine() which disables IRQ, sleepable lock should be not used in this atomic context, so replace patch_lock to raw lock.
Signed-off-by Yang Shi <[email protected]>
Signed-off-by Sebastian Andrzej Siewior <[email protected]>
--- arch/arm/kernel/patch.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
arch/arm/kernel/patch.c +3 -3
@@ -16,7 +16,7 @@ struct patch {unsigned int insn; }; -static DEFINE_SPINLOCK (patch_lock); +static DEFINE_RAW_SPINLOCK (patch_lock);static void __kprobes *patch_map (void *addr,int fixmap,unsigned long *flags) __acquires(&patch_lock)
@@ -33,7 +33,7 @@ static void __kprobes *patch_map(void *addr, int fixmap, unsigned long *flags)return addr;if (flags) -spin_lock_irqsave (&patch_lock, *flags); +raw_spin_lock_irqsave (&patch_lock, *flags);else __acquire (&patch_lock);
@@ -48,7 +48,7 @@ static void __kprobes patch_unmap(int fixmap, unsigned long *flags)clear_fixmap (fixmap);if (flags) -spin_unlock_irqrestore (&patch_lock, *flags); +raw_spin_unlock_irqrestore (&patch_lock, *flags);else __release (&patch_lock); }
Signature · 1 line
2.18.0
PATCH 3/3 arm: use a raw_spin_lock in unwind
In reply to Sebastian Andrzej SiewiorMostly unwind is done with irqs enabled however SLUB may call it with irqs disabled while creating a new SLUB cache.
I had system freeze while loading a module which called kmem_cache_create() on init. That means SLUB's __slab_alloc() disabled interrupts and then
->new_slab_objects()
->new_slab()
->setup_object()
->setup_object_debug()
->init_tracking()
->set_track()
->save_stack_trace()
->save_stack_trace_tsk()
->walk_stackframe()
->unwind_frame()
->unwind_find_idx()
=>spin_lock_irqsave(&unwind_lock);Signed-off-by Sebastian Andrzej Siewior <[email protected]>
--- arch/arm/kernel/unwind.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)
arch/arm/kernel/unwind.c +7 -7
@@ -93,7 +93,7 @@ extern const struct unwind_idx __start_unwind_idx[];static const struct unwind_idx *__origin_unwind_idx;extern const struct unwind_idx __stop_unwind_idx[]; -static DEFINE_SPINLOCK (unwind_lock); +static DEFINE_RAW_SPINLOCK (unwind_lock);static LIST_HEAD (unwind_tables);/* Convert a prel31 symbol to an absolute address */
@@ -201,7 +201,7 @@ static const struct unwind_idx *unwind_find_idx(unsigned long addr)/* module unwind tables */ struct unwind_table *table; -spin_lock_irqsave (&unwind_lock, flags); +raw_spin_lock_irqsave (&unwind_lock, flags);list_for_each_entry (table, &unwind_tables, list) {if (addr >= table->begin_addr && addr < table->end_addr) {
@@ -213,7 +213,7 @@ static const struct unwind_idx *unwind_find_idx(unsigned long addr)break ; } } -spin_unlock_irqrestore (&unwind_lock, flags); +raw_spin_unlock_irqrestore (&unwind_lock, flags); }pr_debug ("%s: idx = %p\n" , __func__, idx);
@@ -529,9 +529,9 @@ struct unwind_table *unwind_table_add(unsigned long start, unsigned long size, tab->begin_addr = text_addr; tab->end_addr = text_addr + text_size; -spin_lock_irqsave (&unwind_lock, flags); +raw_spin_lock_irqsave (&unwind_lock, flags);list_add_tail (&tab->list, &unwind_tables); -spin_unlock_irqrestore (&unwind_lock, flags); +raw_spin_unlock_irqrestore (&unwind_lock, flags);return tab; }
@@ -543,9 +543,9 @@ void unwind_table_del(struct unwind_table *tab)if (!tab)return ; -spin_lock_irqsave (&unwind_lock, flags); +raw_spin_lock_irqsave (&unwind_lock, flags);list_del (&tab->list); -spin_unlock_irqrestore (&unwind_lock, flags); +raw_spin_unlock_irqrestore (&unwind_lock, flags);kfree (tab); }
Signature · 1 line
2.18.0