Add NFC register definitions for Allwinner A20 SoC
Subsystems (2)
PATCH 1/1 Add NFC register definitions for Allwinner A20 SoC
And while at it, why not finally add the DT register definitions for Allwinner A20 NFC. I'm certainly not the author of these, and they have been around for many years already. Its quite unlikely they will suddenly change, or vary between different A20-based devices. The A20 SoC is gradually becoming obsolete, so why wait any more. Note: one whould typically need to also add NFC node definition on top of this in order to actually use it.
---arch/arm/dts/sun7i-a20.dtsi | 69
+++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 69 insertions(+)
arch/arm/dts/sun7i-a20.dtsi +0 -0
@@ -920,6 +920,75 @@
pins = "PI20", "PI21"; function = "uart7"; };
+ nand_pins_a: nand_base0 at 0 {
+ allwinner,pins = "PC0", "PC1", "PC2",
+ "PC5", "PC8", "PC9", "PC10",
+ "PC11", "PC12", "PC13", "PC14",
+ "PC15", "PC16";
+ allwinner,function = "nand0";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
+ nand_cs0_pins_a: nand_cs at 0 {
+ allwinner,pins = "PC4";
+ allwinner,function = "nand0";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
+ nand_cs1_pins_a: nand_cs at 1 {
+ allwinner,pins = "PC3";
+ allwinner,function = "nand0";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
+ nand_cs2_pins_a: nand_cs at 2 {
+ allwinner,pins = "PC17";
+ allwinner,function = "nand0";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
+ nand_cs3_pins_a: nand_cs at 3 {
+ allwinner,pins = "PC18";
+ allwinner,function = "nand0";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
+ nand_cs4_pins_a: nand_cs at 4 {
+ allwinner,pins = "PC19";
+ allwinner,function = "nand0";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
+ nand_cs5_pins_a: nand_cs at 5 {
+ allwinner,pins = "PC20";
+ allwinner,function = "nand0";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
+ nand_cs6_pins_a: nand_cs at 6 {
+ allwinner,pins = "PC21";
+ allwinner,function = "nand0";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
+ nand_cs7_pins_a: nand_cs at 7 {
+ allwinner,pins = "PC22";
+ allwinner,function = "nand0";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
+ nand_rb0_pins_a: nand_rb at 0 {
+ allwinner,pins = "PC6";
+ allwinner,function = "nand0";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
+ nand_rb1_pins_a: nand_rb at 1 {
+ allwinner,pins = "PC7";
+ allwinner,function = "nand0";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
};
timer at 1c20c00 {Signature · 1 line
2.1.2
PATCH 1/1 Add NFC register definitions for Allwinner A20 SoC
Quoted 19 lines · Nikolai Zhubr
And while at it, why not finally add the DT register definitions for Allwinner A20 NFC. I'm certainly not the author of these, and they have been around for many years already. Its quite unlikely they will suddenly change, or vary between different A20-based devices. The A20 SoC is gradually becoming obsolete, so why wait any more. Note: one whould typically need to also add NFC node definition on top of this in order to actually use it.
Signed-off-by Nikolai Zhubr <[email protected]>---
arch/arm/dts/sun7i-a20.dtsi| 69
+++++++++++++++++++++++++++++++++++++++++++++1 file changed, 69 insertions(+)arch/arm/dts/sun7i-a20.dtsi +0
-0@@ -920,6 +920,75 @@ pins = "PI20", "PI21";
arch/arm/dts/sun7i-a20.dtsi line 930
Quoted 10 lines
arch/arm/dts/sun7i-a20.dtsi +8
-0function = "uart7"; }; + nand_pins_a: nand_base0 at 0 { + allwinner,pins = "PC0", "PC1", "PC2", + "PC5", "PC8", "PC9", "PC10", + "PC11", "PC12", "PC13", "PC14", + "PC15", "PC16"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>;
allwinner,{pins,function,drive,pull} syntax has been deprecated in favor or general pinctrl syntax.
You can check how sun5i.dtsi defines these blocks.
Quoted 71 lines
arch/arm/dts/sun7i-a20.dtsi +61
-0+ }; + nand_cs0_pins_a: nand_cs at 0 { + allwinner,pins = "PC4"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + nand_cs1_pins_a: nand_cs at 1 { + allwinner,pins = "PC3"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + nand_cs2_pins_a: nand_cs at 2 { + allwinner,pins = "PC17"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + nand_cs3_pins_a: nand_cs at 3 { + allwinner,pins = "PC18"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + nand_cs4_pins_a: nand_cs at 4 { + allwinner,pins = "PC19"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + nand_cs5_pins_a: nand_cs at 5 { + allwinner,pins = "PC20"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + nand_cs6_pins_a: nand_cs at 6 { + allwinner,pins = "PC21"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + nand_cs7_pins_a: nand_cs at 7 { + allwinner,pins = "PC22"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + nand_rb0_pins_a: nand_rb at 0 { + allwinner,pins = "PC6"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + nand_rb1_pins_a: nand_rb at 1 { + allwinner,pins = "PC7"; + allwinner,function = "nand0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; }; timer at 1c20c00 {Signature · 6 lines
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PATCH 1/1 Add NFC register definitions for Allwinner A20 SoC
Hi,
26.12.2018 14:28, Priit Laes:
Quoted 2 lines
Quoted 2 lines
And while at it, why not finally add the DT register definitions for Allwinner A20 NFC. I'm certainly not the author of these, and they have been
[...]
Quoted 12 lines
Review
Quoted 8 lines
(quoted diff) +8
-0+ nand_pins_a: nand_base0 at 0 { + allwinner,pins = "PC0", "PC1", "PC2", + "PC5", "PC8", "PC9", "PC10", + "PC11", "PC12", "PC13", "PC14", + "PC15", "PC16"; + allwinner,function = "nand0"; + allwinner,drive =<0>; + allwinner,pull =<0>;allwinner,{pins,function,drive,pull} syntax has been deprecated in favor or general pinctrl syntax.
Quoted 1 line
You can check how
sun5i.dtsidefines these blocks.
Well, I could certainly do such editing, but I'm not sure if something related in the tree will also need to be updated accordingly, therefore I'd prefer to refrain.
I'm rather a u-boot user than a u-boot developer, I can do some simple searching and testing, but probably not refactoring.
Thing is, however, the original Allwinner's implementation of nand boot procedure for A20 appeared to be so messy and fragile and inconvenient that using u-boot's mainline approach is basically the only reasonable choice for this device. (And btw great thanks to all developers who implemented it!)
Regards,
Nikolai
Quoted 74 lines
Quoted 73 lines
(quoted diff) +61
-0+ }; + nand_cs0_pins_a: nand_cs at 0 { + allwinner,pins = "PC4"; + allwinner,function = "nand0"; + allwinner,drive =<0>; + allwinner,pull =<0>; + }; + nand_cs1_pins_a: nand_cs at 1 { + allwinner,pins = "PC3"; + allwinner,function = "nand0"; + allwinner,drive =<0>; + allwinner,pull =<0>; + }; + nand_cs2_pins_a: nand_cs at 2 { + allwinner,pins = "PC17"; + allwinner,function = "nand0"; + allwinner,drive =<0>; + allwinner,pull =<0>; + }; + nand_cs3_pins_a: nand_cs at 3 { + allwinner,pins = "PC18"; + allwinner,function = "nand0"; + allwinner,drive =<0>; + allwinner,pull =<0>; + }; + nand_cs4_pins_a: nand_cs at 4 { + allwinner,pins = "PC19"; + allwinner,function = "nand0"; + allwinner,drive =<0>; + allwinner,pull =<0>; + }; + nand_cs5_pins_a: nand_cs at 5 { + allwinner,pins = "PC20"; + allwinner,function = "nand0"; + allwinner,drive =<0>; + allwinner,pull =<0>; + }; + nand_cs6_pins_a: nand_cs at 6 { + allwinner,pins = "PC21"; + allwinner,function = "nand0"; + allwinner,drive =<0>; + allwinner,pull =<0>; + }; + nand_cs7_pins_a: nand_cs at 7 { + allwinner,pins = "PC22"; + allwinner,function = "nand0"; + allwinner,drive =<0>; + allwinner,pull =<0>; + }; + nand_rb0_pins_a: nand_rb at 0 { + allwinner,pins = "PC6"; + allwinner,function = "nand0"; + allwinner,drive =<0>; + allwinner,pull =<0>; + }; + nand_rb1_pins_a: nand_rb at 1 { + allwinner,pins = "PC7"; + allwinner,function = "nand0"; + allwinner,drive =<0>; + allwinner,pull =<0>; + };}; timer at 1c20c00 {--
2.1.2--
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PATCH 1/1 Add NFC register definitions for Allwinner A20 SoC
In reply to Nikolai ZhubrQuoted 9 lines · Nikolai Zhubr
And while at it, why not finally add the DT register definitions for Allwinner A20 NFC. I'm certainly not the author of these, and they have been around for many years already. Its quite unlikely they will suddenly change, or vary between different A20-based devices. The A20 SoC is gradually becoming obsolete, so why wait any more. Note: one whould typically need to also add NFC node definition on top of this in order to actually use it.
Quoted 3 lines
Signed-off-by Nikolai Zhubr <[email protected]>---
arch/arm/dts/sun7i-a20.dtsi| 69
dts(i) changes need to be synced from Linux,we don't encourage to add them explicitly. Better sync from Linux if required.