Remember the state of

PATCH New Hollis Blanchard 1 participant 1 message Mar 28, 2008

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Hollis Blanchard

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2008-03-28 02:49 UTC #0 lore raw

PATCH 1/1 Remember the state of

2 files changed, 9 insertions(+), 2 deletions(-)
qemu/hw/i8254.c       |    2 ++
qemu/hw/ppc4xx_devs.c |    9 +++++++--

# HG changeset patch
# User Hollis Blanchard <[email protected]>
# Date 1206672261 18000
# Branch merge
# Node ID 5c61aade5a1cfeecc270f4c0c176709a3a611e87
# Parent 86c8ce190142bc39927ffaf0cfd8773f04a35086 [qemu ppc uic] Remember the state of level-triggered interrupts.

This fixes the following race condition:
1. target handles an interrupt and begins to EOI
2. device raises an interrupt, setting UIC SR
3. target finishes EOI by clearing SR bit

On hardware, a device with a level-triggered interrupt would instantly re-assert SR after step 3, so we need to do the same.

Signed-off-by Hollis Blanchard <[email protected]>

qemu/hw/i8254.c +2 -0

@@ -27,6 +27,8 @@
 #include "qemu-timer.h"
 
 #include "qemu-kvm.h"
+
+#undef KVM_CAP_PIT
 
 //#define DEBUG_PIT

qemu/hw/ppc4xx_devs.c +7 -2

@@ -278,6 +278,7 @@ struct ppcuic_t {
 struct ppcuic_t {
     uint32_t dcr_base;
     int use_vectors;
+    uint32_t level;  /* Remembers the state of level-triggered interrupts. */
     uint32_t uicsr;  /* Status register */
     uint32_t uicer;  /* Enable register */
     uint32_t uiccr;  /* Critical register */

@@ -385,10 +386,13 @@ static void ppcuic_set_irq (void *opaque
             uic->uicsr |= mask;
     } else {
         /* Level sensitive interrupt */
-        if (level = 1)
+        if (level = 1) {
             uic->uicsr |= mask;
-        else
+            uic->level |= mask;
+        } else {
             uic->uicsr &= ~mask;
+            uic->level &= ~mask;
+	}
     }
 #ifdef DEBUG_UIC
     if (loglevel & CPU_LOG_INT) {

@@ -460,6 +464,7 @@ static void dcr_write_uic (void *opaque,
     switch (dcrn) {
     case DCR_UICSR:
         uic->uicsr &= ~val;
+        uic->uicsr |= uic->level;
         ppcuic_trigger_irq(uic);
         break;
     case DCR_UICSRS:

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