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ARM: Alpine: smp support

PATCH New Tsahee Zidenberg 3 participants 3 messages Jan 25, 2015 – Jan 26, 2015

Subsystems (3)
Arm (32-bit) Arm sub-architectures Arm/Annapurna Labs alpine architecture
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Tsahee Zidenberg

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#0 lore raw

PATCH 3/4 ARM: Alpine: smp support

This patch introduces support for waking up secondary CPU cores on Alpine platform.

Signed-off-by Barak Wasserstrom <[email protected]>
Signed-off-by Tsahee Zidenberg <[email protected]>
---
 arch/arm/mach-alpine/Kconfig             |  1 +
 arch/arm/mach-alpine/Makefile            |  1 +
 arch/arm/mach-alpine/alpine_cpu_pm.c     | 68 ++++++++++++++++++++++++++++++++
 arch/arm/mach-alpine/alpine_cpu_pm.h     | 26 ++++++++++++
 arch/arm/mach-alpine/alpine_cpu_resume.h | 38 ++++++++++++++++++
 arch/arm/mach-alpine/platsmp.c           | 48 ++++++++++++++++++++++
 6 files changed, 182 insertions(+)
 create mode 100644 arch/arm/mach-alpine/alpine_cpu_pm.c
 create mode 100644 arch/arm/mach-alpine/alpine_cpu_pm.h
 create mode 100644 arch/arm/mach-alpine/alpine_cpu_resume.h
 create mode 100644 arch/arm/mach-alpine/platsmp.c
arch/arm/mach-alpine/Kconfig +1 -0
index 937cad2..2cb163d 100644
@@ -4,5 +4,6 @@ config ARCH_ALPINE
 	select GENERIC_IRQ_CHIP
 	select HAVE_ARM_ARCH_TIMER
 	select ARM_GIC
+	select HAVE_SMP
 	help
 	  This enables support for the Annapurna Labs Alpine V1 boards.
arch/arm/mach-alpine/Makefile +1 -0
index 8ba9e99..fad7a68 100644
@@ -3,3 +3,4 @@
 #
 
 obj-y				+= alpine_machine.o
+obj-$(CONFIG_SMP)		+= platsmp.o alpine_cpu_pm.o
arch/arm/mach-alpine/alpine_cpu_pm.c new file +68 -0

68 lines not on this page · raw message

arch/arm/mach-alpine/alpine_cpu_pm.h new file +26 -0
new file mode 100644
index 0000000..62a5f0a
@@ -0,0 +1,26 @@
+/*
+ * Low-level power-management support for Alpine platform.
+ *
+ * Copyright (C) 2015 Annapurna Labs Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ALPINE_CPU_PM_H__
+#define __ALPINE_CPU_PM_H__
+
+/* Alpine CPU Power Management Services Initialization */
+void __init alpine_cpu_pm_init(void);
+
+/* Wake-up a CPU */
+int alpine_cpu_wakeup(unsigned int cpu, uint32_t phys_resume_addr);
+
+#endif /* __ALPINE_CPU_PM_H__ */
arch/arm/mach-alpine/alpine_cpu_resume.h new file +38 -0
new file mode 100644
index 0000000..e6fe1a3
@@ -0,0 +1,38 @@
+/*
+ * Annapurna labs cpu-resume register structure.
+ *
+ * Copyright (C) 2015 Annapurna Labs Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef ALPINE_CPU_RESUME_H_
+#define ALPINE_CPU_RESUME_H_
+
+/* Per-cpu regs */
+struct al_cpu_resume_regs_per_cpu {
+	uint32_t	flags;
+	uint32_t	resume_addr;
+};
+
+/* general regs */
+struct al_cpu_resume_regs {
+	/* Watermark for validating the CPU resume struct */
+	uint32_t watermark;
+	uint32_t flags;
+	struct al_cpu_resume_regs_per_cpu per_cpu[];
+};
+
+/* The expected magic number for validating the resume addresses */
+#define AL_CPU_RESUME_MAGIC_NUM		0xf0e1d200
+#define AL_CPU_RESUME_MAGIC_NUM_MASK	0xffffff00
+
+#endif /* ALPINE_CPU_RESUME_H_ */
arch/arm/mach-alpine/platsmp.c new file +48 -0

48 lines not on this page · raw message

Signature · 1 line
1.9.1
#1 lore raw

PATCH 3/4 ARM: Alpine: smp support

Quoted 2 lines · On Sunday 25 January 2015 20:30:56 Tsahee Zidenberg wrote:

This patch introduces support for waking up secondary CPU cores on Alpine platform.

The actual code looks good, I just have minor comments about the formatting:

arch/arm/mach-alpine/alpine_cpu_pm.c line 56

Quoted 3 lines
arch/arm/mach-alpine/alpine_cpu_pm.c new file +3 -0
+
+	np = of_find_compatible_node(
+		NULL, NULL, "annapurna-labs,al-cpu-resume");

When wrapping lines, please continue the next line at the point of the opening braces, like:

	np = of_find_compatible_node(NULL, NULL,
	                             "annapurna-labs,al-cpu-resume");

arch/arm/mach-alpine/alpine_cpu_pm.c line 58

Quoted 2 lines
arch/arm/mach-alpine/alpine_cpu_pm.c new file +2 -0
+	al_cpu_resume_regs =
+			(struct al_cpu_resume_regs __iomem *)of_iomap(np, 0);

Or remove a type case when it is not required.

arch/arm/mach-alpine/platsmp.c line 25

Quoted 2 lines
arch/arm/mach-alpine/platsmp.c new file +2 -0
+int __cpuinit alpine_boot_secondary(unsigned int cpu
+				, struct task_struct *idle)

As above.

Arnd

#2 lore raw

PATCH 3/4 ARM: Alpine: smp support

In reply to Tsahee Zidenberg
Quoted 17 lines · Tsahee Zidenberg

This patch introduces support for waking up secondary CPU cores on Alpine platform.

Signed-off-by Barak Wasserstrom <[email protected]>
Signed-off-by Tsahee Zidenberg <[email protected]>
---
 arch/arm/mach-alpine/Kconfig             |  1 +
 arch/arm/mach-alpine/Makefile            |  1 +
 arch/arm/mach-alpine/alpine_cpu_pm.c     | 68 ++++++++++++++++++++++++++++++++
 arch/arm/mach-alpine/alpine_cpu_pm.h     | 26 ++++++++++++
 arch/arm/mach-alpine/alpine_cpu_resume.h | 38 ++++++++++++++++++
 arch/arm/mach-alpine/platsmp.c           | 48 ++++++++++++++++++++++
 6 files changed, 182 insertions(+)
 create mode 100644 arch/arm/mach-alpine/alpine_cpu_pm.c
 create mode 100644 arch/arm/mach-alpine/alpine_cpu_pm.h
 create mode 100644 arch/arm/mach-alpine/alpine_cpu_resume.h
 create mode 100644 arch/arm/mach-alpine/platsmp.c

[...]

Quoted 7 lines
arch/arm/mach-alpine/alpine_cpu_pm.c new file +7 -0
+/* NB registers */
+#define AL_SYSFAB_POWER_CONTROL_OFFSET(cpu)	(0x2000 + (cpu)*0x100 + 0x20)
+
+static void __iomem *al_sysfabric_service_base;
+static struct al_cpu_resume_regs __iomem *al_cpu_resume_regs;
+static int wakeup_supported;
+

arch/arm/mach-alpine/alpine_cpu_pm.c line 41

Quoted 10 lines
arch/arm/mach-alpine/alpine_cpu_pm.c new file +10 -0
+int alpine_cpu_wakeup(unsigned int cpu, uint32_t phys_resume_addr)
+{
+	if (!wakeup_supported)
+		return -ENOSYS;
+
+	/* Set CPU resume address */
+	writel(phys_resume_addr, &al_cpu_resume_regs->per_cpu[cpu].resume_addr);
+
+	/* Power-up the CPU */
+	writel(0, (al_sysfabric_service_base + AL_SYSFAB_POWER_CONTROL_OFFSET(cpu)));

Surely you want to map from the logical ID to the physical ID first? That caller didn't.

Mark.