Realtek ECC engine (was NAND errors)

Hi Miquel,

on the weekend I was able to hack together a very basic working version of the Realtek ECC engine. See https://github.com/openwrt/openwrt/pull/19746
Until now I was only focused on the devices that are available for testing (Linksys LGS328C & LGS352C). Driver can now handle exactly the identified data layout:

- 2048 bytes data (4*512 bytes)
- 64 bytes OOB consisting of
- 4*6 bytes tag
- 4*10 bytes ECC

There are two things I do not yet understand:

1. Interaction between request handling and mtd_ooblayout_ops. For now I simply take the request data & oob buffers and put data where it "seems" right.

2. The hardware does a lot of good things. It returns ok/errors/bitflips and I can simply pass them back. But how do I tell the upper layers that 4 bitflips are getting close to the 6 bits the engine can handle. Is it in the driver or DTS? That currently reads.

soc: soc {
	compatible = "simple-bus";
	#address-cells = <1>;
	#size-cells = <1>;
	ranges = <0x0 0x18000000 0x20000>;

	ecc0: ecc@1a600 {
		status = "okay";
		compatible = "realtek,nand-ecc-engine";
		reg = <0x1a600 0x54>;
	};	

	snand: spi@1a400 {
		compatible = "realtek,rtl9301-snand";
		reg = <0x1a400 0x44>;
		interrupt-parent = <&intc>;
		interrupts = <19 2>;
		clocks = <&lx_clk>;
		#address-cells = <1>;
		#size-cells = <0>;	
		status = "okay";

		flash@0 {
			compatible = "spi-nand";
			reg = <0>;
			nand-ecc-engine = <&ecc0>;
			partitions {
				compatible = "fixed-partitions";

Thanks in advance.

Markus

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Hi Markus,

Well done!

mtd_ooblayout_ops are just operations the core will call to get the location of the ECC bytes and the location of the free bytes (available for users, but only jffs2 would use that nowadays I guess). You should give the "physical" layout, ie. where the hardware engine puts its own data, and where it does not.

In the ->init_ctx(), fill the nand->ecc.ctx.conf.strength field with the engine capability. Then, in the ->finish_io_req() hook, update mtd->ecc_stats.failed/corrected and return the maximum number of bitlfips observed in the current step. The SPI NAND layer will forward the max_bitflip value or -EBADMSG in case of error, which will then be transformed by mtdcore.c:1744 into an -EUCLEAN for UBI to act upon in case the bitflip threshold was reached.

Looks really nice!

Looking forward for this change upstream.

Thanks,
Miquèl

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