iommu/vt-d: PRS isn't usable if PDS isn't supported
Subsystems (3)
Lu Baolu
maintainerPATCH 1/1 iommu/vt-d: PRS isn't usable if PDS isn't supported
The specification, Section 7.10, "Software Steps to Drain Page Requests & Responses," requires software to submit an Invalidation Wait Descriptor (inv_wait_dsc) with the Page-request Drain (PD=1) flag set, along with the Invalidation Wait Completion Status Write flag (SW=1). It then waits for the Invalidation Wait Descriptor's completion.
However, the PD field in the Invalidation Wait Descriptor is optional, as stated in Section 6.5.2.9, "Invalidation Wait Descriptor":
"Page-request Drain (PD): Remapping hardware implementations reporting
Page-request draining as not supported (PDS = 0 in ECAP_REG) treat this field as reserved."
This implies that if the IOMMU doesn't support the PDS capability, software can't drain page requests and group responses as expected.
Do not enable PCI/PRI if the IOMMU doesn't support PDS.
--- drivers/iommu/intel/iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/iommu/intel/iommu.c +1 -1
@@ -3812,7 +3812,7 @@ static struct iommu_device *intel_iommu_probe_device(struct device *dev) }if (info->ats_supported &&ecap_prs (iommu->ecap) && -pci_pri_supported (pdev)) +ecap_pds (iommu->ecap) &&pci_pri_supported (pdev)) info->pri_supported =1 ; } }
Signature · 1 line
2.43.0
Quoted 9 lines · Lu Baolu
The specification, Section 7.10, "Software Steps to Drain Page Requests & Responses," requires software to submit an Invalidation Wait Descriptor (
inv_wait_dsc) with the Page-request Drain (PD=1) flag set, along with the Invalidation Wait Completion Status Write flag (SW=1). It then waits for the Invalidation Wait Descriptor's completion.However, the PD field in the Invalidation Wait Descriptor is optional, as stated in Section 6.5.2.9, "Invalidation Wait Descriptor":
Quoted 8 lines
"Page-request Drain (PD): Remapping hardware implementations reporting
Page-request draining as not supported (PDS = 0 inECAP_REG) treat this field as reserved."This implies that if the IOMMU doesn't support the PDS capability, software can't drain page requests and group responses as expected.
Do not enable PCI/PRI if the IOMMU doesn't support PDS.
After giving the spec another look, this is probably the way to go. However the PDS also mentions that DT must be set. Should we check ecap_dev_iotlb_support(iommu->ecap) as well?
Quoted 15 lines
Reported-by Joel Granados <[email protected]>Fixes 66ac4db36f4c ("iommu/vt-d: Add page request draining support")Signed-off-by Lu Baolu <[email protected]>--- drivers/iommu/intel/iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)drivers/iommu/intel/iommu.c +0
-0
drivers/iommu/intel/iommu.c static struct iommu_device *intel_iommu_probe_device(struct device *dev) · line 3815
Quoted 5 lines
drivers/iommu/intel/iommu.c +1
-1@@ -3812,7 +3812,7 @@ static struct iommu_device *intel_iommu_probe_device(struct device *dev) }if (info->ats_supported &&ecap_prs (iommu->ecap) && -pci_pri_supported (pdev)) +ecap_pds (iommu->ecap) &&pci_pri_supported (pdev))
Should this be
+ ecap_dev_iotlb_support(iommu->ecap) && ecap_pds(iommu->ecap) && pci_pri_supported(pdev))
???
best
Signature · 1 line
Joel Granados
Baolu Lu
maintainerQuoted 14 lines · Joel Granados
Quoted 13 lines · Lu Baolu
The specification, Section 7.10, "Software Steps to Drain Page Requests & Responses," requires software to submit an Invalidation Wait Descriptor (
inv_wait_dsc) with the Page-request Drain (PD=1) flag set, along with the Invalidation Wait Completion Status Write flag (SW=1). It then waits for the Invalidation Wait Descriptor's completion.However, the PD field in the Invalidation Wait Descriptor is optional, as stated in Section 6.5.2.9, "Invalidation Wait Descriptor":
"Page-request Drain (PD): Remapping hardware implementations reporting
Page-request draining as not supported (PDS = 0 inECAP_REG) treat this field as reserved."
Quoted 8 lines
Quoted 4 lines
This implies that if the IOMMU doesn't support the PDS capability, software can't drain page requests and group responses as expected.
Do not enable PCI/PRI if the IOMMU doesn't support PDS.
After giving the spec another look, this is probably the way to go. However the PDS also mentions that DT must be set. Should we check
ecap_dev_iotlb_support(iommu->ecap)as well?
It has already been checked.
Quoted 17 lines
Quoted 17 lines
Reported-by Joel Granados <[email protected]>Fixes 66ac4db36f4c ("iommu/vt-d: Add page request draining support")Signed-off-by Lu Baolu <[email protected]>--- drivers/iommu/intel/iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)drivers/iommu/intel/iommu.c +0
-0@@ -3812,7 +3812,7 @@ static struct iommu_device *intel_iommu_probe_device(struct device *dev) }
Quoted 7 lines
drivers/iommu/intel/iommu.c static struct iommu_device *intel_iommu_probe_device(struct device *dev) · line 3815
Quoted 3 lines
drivers/iommu/intel/iommu.c +1
-1if (info->ats_supported &&ecap_prs (iommu->ecap) && -pci_pri_supported (pdev)) +ecap_pds (iommu->ecap) &&pci_pri_supported (pdev))Should this be
+ecap_dev_iotlb_support(iommu->ecap)&&ecap_pds(iommu->ecap)&&pci_pri_supported(pdev))???
ecap_dev_iotlb_support() has already been checked as it's part of the info->ats_supported check. The dependency chain is:ecap_dev_iotlb_support() -> ats_support -> pri_support.
Thanks,
baolu
Quoted 18 lines · Baolu Lu
Quoted 17 lines · Joel Granados
Quoted 16 lines · Lu Baolu
The specification, Section 7.10, "Software Steps to Drain Page Requests & Responses," requires software to submit an Invalidation Wait Descriptor (
inv_wait_dsc) with the Page-request Drain (PD=1) flag set, along with the Invalidation Wait Completion Status Write flag (SW=1). It then waits for the Invalidation Wait Descriptor's completion.However, the PD field in the Invalidation Wait Descriptor is optional, as stated in Section 6.5.2.9, "Invalidation Wait Descriptor":
"Page-request Drain (PD): Remapping hardware implementations reporting
Page-request draining as not supported (PDS = 0 inECAP_REG) treat this field as reserved."This implies that if the IOMMU doesn't support the PDS capability, software can't drain page requests and group responses as expected.
Quoted 7 lines
Quoted 5 lines
Quoted 1 line
Do not enable PCI/PRI if the IOMMU doesn't support PDS.
After giving the spec another look, this is probably the way to go. However the PDS also mentions that DT must be set. Should we check
ecap_dev_iotlb_support(iommu->ecap)as well?It has already been checked.
Yes. In intel_iommu_probe_device. Thx for the clarification.
Best
Signature · 1 line
Joel Granados
Baolu Lu
maintainerQuoted 18 lines · Lu Baolu
The specification, Section 7.10, "Software Steps to Drain Page Requests & Responses," requires software to submit an Invalidation Wait Descriptor (
inv_wait_dsc) with the Page-request Drain (PD=1) flag set, along with the Invalidation Wait Completion Status Write flag (SW=1). It then waits for the Invalidation Wait Descriptor's completion.However, the PD field in the Invalidation Wait Descriptor is optional, as stated in Section 6.5.2.9, "Invalidation Wait Descriptor":
"Page-request Drain (PD): Remapping hardware implementations reporting
Page-request draining as not supported (PDS = 0 inECAP_REG) treat this field as reserved."This implies that if the IOMMU doesn't support the PDS capability, software can't drain page requests and group responses as expected.
Do not enable PCI/PRI if the IOMMU doesn't support PDS.
Quoted 8 lines
Reported-by Joel Granados<[email protected]>Fixes 66ac4db36f4c ("iommu/vt-d: Add page request draining support")Signed-off-by Lu Baolu<[email protected]>--- drivers/iommu/intel/iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Queued for v6.18.