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arm64: dts: hi3660: Add property for fixing CPUIdle

PATCH Applied Leo Yan 3 participants 3 messages Mar 10, 2025 – Mar 18, 2025

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Leo Yan

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#0 lore raw

PATCH 1/1 arm64: dts: hi3660: Add property for fixing CPUIdle

During CPU low power modes, ETM components will lose their context. Add the "arm,coresight-loses-context-with-cpu" property to ETM nodes to save and restore ETM context for CPU idle states.

Signed-off-by Leo Yan <[email protected]>
---
 arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi +8 -0
index 79a55a0fa2f1..4c6a075908d1 100644
@@ -17,6 +17,7 @@ etm@ecc40000 {
 			clocks = <&crg_ctrl HI3660_PCLK>;
 			clock-names = "apb_pclk";
 			cpu = <&cpu0>;
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {

@@ -34,6 +35,7 @@ etm@ecd40000 {
 			clocks = <&crg_ctrl HI3660_PCLK>;
 			clock-names = "apb_pclk";
 			cpu = <&cpu1>;
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {

@@ -51,6 +53,7 @@ etm@ece40000 {
 			clocks = <&crg_ctrl HI3660_PCLK>;
 			clock-names = "apb_pclk";
 			cpu = <&cpu2>;
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {

@@ -68,6 +71,7 @@ etm@ecf40000 {
 			clocks = <&crg_ctrl HI3660_PCLK>;
 			clock-names = "apb_pclk";
 			cpu = <&cpu3>;
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {

@@ -160,6 +164,7 @@ etm@ed440000 {
 			clocks = <&crg_ctrl HI3660_PCLK>;
 			clock-names = "apb_pclk";
 			cpu = <&cpu4>;
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {

@@ -177,6 +182,7 @@ etm@ed540000 {
 			clocks = <&crg_ctrl HI3660_PCLK>;
 			clock-names = "apb_pclk";
 			cpu = <&cpu5>;
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {

@@ -194,6 +200,7 @@ etm@ed640000 {
 			clocks = <&crg_ctrl HI3660_PCLK>;
 			clock-names = "apb_pclk";
 			cpu = <&cpu6>;
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {

@@ -211,6 +218,7 @@ etm@ed740000 {
 			clocks = <&crg_ctrl HI3660_PCLK>;
 			clock-names = "apb_pclk";
 			cpu = <&cpu7>;
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {
Signature · 1 line
2.34.1
Reviewed-by on v1 1/1
#1 lore raw
Quoted 70 lines · Leo Yan

During CPU low power modes, ETM components will lose their context. Add the "arm,coresight-loses-context-with-cpu" property to ETM nodes to save and restore ETM context for CPU idle states.

Signed-off-by Leo Yan <[email protected]>
---
  arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi | 8 ++++++++
  1 file changed, 8 insertions(+)
arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi +7 -0
index 79a55a0fa2f1..4c6a075908d1 100644
@@ -17,6 +17,7 @@ etm@ecc40000 {
  			clocks = <&crg_ctrl HI3660_PCLK>;
  			clock-names = "apb_pclk";
  			cpu = <&cpu0>;
+			arm,coresight-loses-context-with-cpu;
 
  			out-ports {
  				port {

@@ -34,6 +35,7 @@ etm@ecd40000 {
  			clocks = <&crg_ctrl HI3660_PCLK>;
  			clock-names = "apb_pclk";
  			cpu = <&cpu1>;
+			arm,coresight-loses-context-with-cpu;
 
  			out-ports {
  				port {

@@ -51,6 +53,7 @@ etm@ece40000 {
  			clocks = <&crg_ctrl HI3660_PCLK>;
  			clock-names = "apb_pclk";
  			cpu = <&cpu2>;
+			arm,coresight-loses-context-with-cpu;
 
  			out-ports {
  				port {

@@ -68,6 +71,7 @@ etm@ecf40000 {
  			clocks = <&crg_ctrl HI3660_PCLK>;
  			clock-names = "apb_pclk";
  			cpu = <&cpu3>;
+			arm,coresight-loses-context-with-cpu;
 
  			out-ports {
  				port {

@@ -160,6 +164,7 @@ etm@ed440000 {
  			clocks = <&crg_ctrl HI3660_PCLK>;
  			clock-names = "apb_pclk";
  			cpu = <&cpu4>;
+			arm,coresight-loses-context-with-cpu;
 
  			out-ports {
  				port {

@@ -177,6 +182,7 @@ etm@ed540000 {
  			clocks = <&crg_ctrl HI3660_PCLK>;
  			clock-names = "apb_pclk";
  			cpu = <&cpu5>;
+			arm,coresight-loses-context-with-cpu;
 
  			out-ports {
  				port {

@@ -194,6 +200,7 @@ etm@ed640000 {
  			clocks = <&crg_ctrl HI3660_PCLK>;
  			clock-names = "apb_pclk";
  			cpu = <&cpu6>;
+			arm,coresight-loses-context-with-cpu;
 
  			out-ports {
  				port {

arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi etm@ed740000 { · line 224

Quoted 7 lines
arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi +1 -0
@@ -211,6 +218,7 @@ etm@ed740000 {
  			clocks = <&crg_ctrl HI3660_PCLK>;
  			clock-names = "apb_pclk";
  			cpu = <&cpu7>;
+			arm,coresight-loses-context-with-cpu;
 
  			out-ports {
  				port {
Reviewed-by James Clark <[email protected]>
maintainer Applied
#2 lore raw
In reply to Leo Yan

Hi Leo,

Quoted 6 lines · Leo Yan

During CPU low power modes, ETM components will lose their context. Add the "arm,coresight-loses-context-with-cpu" property to ETM nodes to save and restore ETM context for CPU idle states.

Signed-off-by Leo Yan <[email protected]>

---

Applied to the HiSilicon arm64 dt tree.
Thanks!

Best Regards,
Wei

Quoted 72 lines
 arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi +8 -0
index 79a55a0fa2f1..4c6a075908d1 100644
@@ -17,6 +17,7 @@ etm@ecc40000 {
 			clocks = <&crg_ctrl HI3660_PCLK>;
 			clock-names = "apb_pclk";
 			cpu = <&cpu0>;
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {

@@ -34,6 +35,7 @@ etm@ecd40000 {
 			clocks = <&crg_ctrl HI3660_PCLK>;
 			clock-names = "apb_pclk";
 			cpu = <&cpu1>;
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {

@@ -51,6 +53,7 @@ etm@ece40000 {
 			clocks = <&crg_ctrl HI3660_PCLK>;
 			clock-names = "apb_pclk";
 			cpu = <&cpu2>;
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {

@@ -68,6 +71,7 @@ etm@ecf40000 {
 			clocks = <&crg_ctrl HI3660_PCLK>;
 			clock-names = "apb_pclk";
 			cpu = <&cpu3>;
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {

@@ -160,6 +164,7 @@ etm@ed440000 {
 			clocks = <&crg_ctrl HI3660_PCLK>;
 			clock-names = "apb_pclk";
 			cpu = <&cpu4>;
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {

@@ -177,6 +182,7 @@ etm@ed540000 {
 			clocks = <&crg_ctrl HI3660_PCLK>;
 			clock-names = "apb_pclk";
 			cpu = <&cpu5>;
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {

@@ -194,6 +200,7 @@ etm@ed640000 {
 			clocks = <&crg_ctrl HI3660_PCLK>;
 			clock-names = "apb_pclk";
 			cpu = <&cpu6>;
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {

@@ -211,6 +218,7 @@ etm@ed740000 {
 			clocks = <&crg_ctrl HI3660_PCLK>;
 			clock-names = "apb_pclk";
 			cpu = <&cpu7>;
+			arm,coresight-loses-context-with-cpu;
 
 			out-ports {
 				port {