Remove unused code and cleanup devicetree bindings for DPU driver
Subsystems (5)
cover Remove unused code and cleanup devicetree bindings for DPU driver
This patch series aims at removing unused code from DPU driver and also cleaning up its devicetree bindings.
Following functionality is removed in this series:
- Removed display port driver, it will be posted back later after verification on SDM845
- Removed HDCP 1.x support, it will be posted back with display port driver
- Removed writeback support, it will be added at later stage based on DRM writeback connector series
Additionally, following cleanups are done:
- Remove bus_scale config from devicetree and use static config in driver
- Cleanup devicetree binding to model actual (tree like) HW hierarchy
- Cleanup unused utility functions
This series is rebased on following:
1. https://lists.freedesktop.org/archives/freedreno/2018-May/002502.html
2. https://lists.freedesktop.org/archives/freedreno/2018-May/002565.html
Jordan Crouse (1):
drm/msm/dpu: Remove unused code and move the header
Rajesh Yadav (10):
dt-bindings: msm/disp: remove unused dsi & panel bindings
dt-bindings: msm/disp: remove unused display port bindings Revert "drm/msm: Add DisplayPort support"
dt-bindings: msm/disp: remove unused writeback bindings drm/msm/dpu: remove writeback support
drm/msm/dpu: remove hdcp support
drm/msm/dpu: remove dt parsing logic for bus_scale config
dt-bindings: msm/disp: cleanup bindings for Snapdragon 845 DPU drm/msm/dpu: correct dpu_io_util.h include path drm/msm/dpu: move dpu_io_util to dpu folder
.../devicetree/bindings/display/msm/dpu.txt | 318 ++-- .../devicetree/bindings/drm/msm/dpu-dp.txt | 217 --- .../devicetree/bindings/drm/msm/dpu-dsi.txt | 102 -- .../devicetree/bindings/drm/msm/dpu-wb.txt | 23 - .../devicetree/bindings/drm/msm/mdss-dsi-panel.txt | 772 ---------- .../devicetree/bindings/fb/mdss-dsi-panel.txt | 742 --------- Documentation/devicetree/bindings/fb/mdss-pll.txt | 103 -- drivers/gpu/drm/msm/Makefile | 21 +- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 3 +- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 94 +- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 2 - drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 63 - .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 1349 ----------------- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 41 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 77 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c | 3 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 19 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 6 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 12 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h | 4 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c | 321 ---- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h | 186 --- drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.c | 186 +++ drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.h | 61 + drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 5 - drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c | 253 ++-- drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 42 +- drivers/gpu/drm/msm/disp/dpu1/dpu_wb.c | 767 ---------- drivers/gpu/drm/msm/disp/dpu1/dpu_wb.h | 232 --- drivers/gpu/drm/msm/dp/dp_audio.c | 806 ---------- drivers/gpu/drm/msm/dp/dp_audio.h | 81 - drivers/gpu/drm/msm/dp/dp_aux.c | 570 ------- drivers/gpu/drm/msm/dp/dp_aux.h | 44 - drivers/gpu/drm/msm/dp/dp_catalog.c | 1320 ---------------- drivers/gpu/drm/msm/dp/dp_catalog.h | 163 -- drivers/gpu/drm/msm/dp/dp_ctrl.c | 1474 ------------------ drivers/gpu/drm/msm/dp/dp_ctrl.h | 50 - drivers/gpu/drm/msm/dp/dp_debug.c | 503 ------- drivers/gpu/drm/msm/dp/dp_debug.h | 60 - drivers/gpu/drm/msm/dp/dp_display.c | 1255 ---------------- drivers/gpu/drm/msm/dp/dp_display.h | 52 - drivers/gpu/drm/msm/dp/dp_drm.c | 538 ------- drivers/gpu/drm/msm/dp/dp_drm.h | 96 -- drivers/gpu/drm/msm/dp/dp_hdcp2p2.c | 927 ------------ drivers/gpu/drm/msm/dp/dp_link.c | 1548 ------------------- drivers/gpu/drm/msm/dp/dp_link.h | 184 --- drivers/gpu/drm/msm/dp/dp_panel.c | 526 ------- drivers/gpu/drm/msm/dp/dp_panel.h | 115 -- drivers/gpu/drm/msm/dp/dp_parser.c | 645 -------- drivers/gpu/drm/msm/dp/dp_parser.h | 200 --- drivers/gpu/drm/msm/dp/dp_power.c | 593 -------- drivers/gpu/drm/msm/dp/dp_power.h | 56 - drivers/gpu/drm/msm/dp/dp_reg.h | 231 --- drivers/gpu/drm/msm/dp/dp_usbpd.c | 491 ------ drivers/gpu/drm/msm/dp/dp_usbpd.h | 101 -- drivers/gpu/drm/msm/dpu_hdcp.h | 74 - drivers/gpu/drm/msm/dpu_hdcp_1x.c | 1579 -------------------- drivers/gpu/drm/msm/dpu_io_util.c | 556 ------- drivers/gpu/drm/msm/msm_drv.h | 1 - include/drm/drm_dp_helper.h | 23 - include/linux/dpu_io_util.h | 115 -- 64 files changed, 556 insertions(+), 20450 deletions(-) delete mode 100644 Documentation/devicetree/bindings/drm/msm/dpu-dp.txt delete mode 100644 Documentation/devicetree/bindings/drm/msm/dpu-dsi.txt delete mode 100644 Documentation/devicetree/bindings/drm/msm/dpu-wb.txt delete mode 100644 Documentation/devicetree/bindings/drm/msm/mdss-dsi-panel.txt delete mode 100644 Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt delete mode 100644 Documentation/devicetree/bindings/fb/mdss-pll.txt delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.c create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.h delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_wb.c delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_wb.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_audio.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_audio.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_aux.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_aux.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_catalog.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_catalog.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_ctrl.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_ctrl.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_debug.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_debug.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_display.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_display.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_drm.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_drm.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp2p2.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_link.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_link.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_panel.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_panel.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_parser.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_parser.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_power.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_power.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_reg.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_usbpd.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_usbpd.h delete mode 100644 drivers/gpu/drm/msm/dpu_hdcp.h delete mode 100644 drivers/gpu/drm/msm/dpu_hdcp_1x.c delete mode 100644 drivers/gpu/drm/msm/dpu_io_util.c delete mode 100644 include/linux/dpu_io_util.h
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The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ Freedreno mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/freedreno
A message that is not in the archive (sent off-list or not yet received): 1527691788-9350-1-git-send-email-ryadav-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
PATCH 1/11 dt-bindings: msm/disp: remove unused dsi & panel bindings
DPU driver switched to existing upstream dsi driver so removing the dsi-staging specific dsi and panel bindings.
--- .../devicetree/bindings/drm/msm/dpu-dsi.txt | 102 --- .../devicetree/bindings/drm/msm/mdss-dsi-panel.txt | 772 --------------------- .../devicetree/bindings/fb/mdss-dsi-panel.txt | 742 -------------------- Documentation/devicetree/bindings/fb/mdss-pll.txt | 103 --- 4 files changed, 1719 deletions(-) delete mode 100644 Documentation/devicetree/bindings/drm/msm/dpu-dsi.txt delete mode 100644 Documentation/devicetree/bindings/drm/msm/mdss-dsi-panel.txt delete mode 100644 Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt delete mode 100644 Documentation/devicetree/bindings/fb/mdss-pll.txt
Documentation/devicetree/bindings/drm/msm/dpu-dsi.txt deleted +0 -102
@@ -1,102 +0,0 @@ -Qualcomm Technologies, Inc. - -mdss-dsi is the master DSI device which supports multiple DSI host controllers -that are compatible with MIPI display serial interface specification. - -DSI Controller: -Required properties: -- compatible: Should be "qcom,dsi-ctrl-hw-v<version>". Supported - versions include 1.4, 2.0 and 2.2. - eg: qcom,dsi-ctrl-hw-v1.4, qcom,dsi-ctrl-hw-v2.0, - qcom,dsi-ctrl-hw-v2.2 - And for dsi phy driver: - qcom,dsi-phy-v0.0-hpm, qcom,dsi-phy-v0.0-lpm, - qcom,dsi-phy-v1.0, qcom,dsi-phy-v2.0, - qcom,dsi-phy-v3.0 -- reg: Base address and length of DSI controller's memory - mapped regions. -- reg-names: A list of strings that name the list of regs. - "dsi_ctrl" - DSI controller memory region. - "mmss_misc" - MMSS misc memory region. -- cell-index: Specifies the controller instance. -- clocks: Clocks required for DSI controller operation. -- clock-names: Names of the clocks corresponding to handles. Following - clocks are required: - "mdp_core_clk" - "iface_clk" - "core_mmss_clk" - "bus_clk" - "byte_clk" - "pixel_clk" - "core_clk" - "byte_clk_rcg" - "pixel_clk_rcg" -- gdsc-supply: phandle to gdsc regulator node. -- vdda-supply: phandle to vdda regulator node. -- vcca-supply: phandle to vcca regulator node. -- interrupt-parent phandle to the interrupt parent device node. -- interrupts: The interrupt signal from the DSI block. - -Bus Scaling Data: -- qcom,msm-bus,name: String property describing MDSS client. -- qcom,msm-bus,num-cases: This is the number of bus scaling use cases - defined in the vectors property. This must be - set to <2> for MDSS DSI driver where use-case 0 - is used to remove BW votes from the system. Use - case 1 is used to generate bandwidth requestes - when sending command packets. -- qcom,msm-bus,num-paths: This represents number of paths in each bus - scaling usecase. This value depends on number of - AXI master ports dedicated to MDSS for - particular chipset. -- qcom,msm-bus,vectors-KBps: A series of 4 cell properties, with a format - of (src, dst, ab, ib) which is defined at - Documentation/devicetree/bindings/arm/msm/msm_bus.txt. - DSI driver should always set average bandwidth - (ab) to 0 and always use instantaneous - bandwidth(ib) values. - -Optional properties: -- label: String to describe controller. -- qcom,platform-te-gpio: Specifies the gpio used for TE. -- qcom,dsi-display-active: Current active display -- qcom,dsi-ctrl: handle to dsi controller device -- qcom,dsi-phy: handle to dsi phy device -- qcom,dsi-manager: Specifies dsi manager is present -- qcom,dsi-display: Specifies dsi display is present -- qcom,hdmi-display: Specifies hdmi is present -- qcom,dp-display: Specified dp is present -- qcom,<type>-supply-entries: A node that lists the elements of the supply used by the - a particular "type" of DSI module. The module "types" - can be "core", "ctrl", and "phy". Within the same type, - there can be more than one instance of this binding, - in which case the entry would be appended with the - supply entry index. - e.g. qcom,ctrl-supply-entry@0 - -- qcom,supply-name: name of the supply (vdd/vdda/vddio) - -- qcom,supply-min-voltage: minimum voltage level (uV) - -- qcom,supply-max-voltage: maximum voltage level (uV) - -- qcom,supply-enable-load: load drawn (uA) from enabled supply - -- qcom,supply-disable-load: load drawn (uA) from disabled supply - -- qcom,supply-pre-on-sleep: time to sleep (ms) before turning on - -- qcom,supply-post-on-sleep: time to sleep (ms) after turning on - -- qcom,supply-pre-off-sleep: time to sleep (ms) before turning off - -- qcom,supply-post-off-sleep: time to sleep (ms) after turning off -- qcom,mdss-mdp-transfer-time-us: Specifies the dsi transfer time for command mode - panels in microseconds. Driver uses this number to adjust - the clock rate according to the expected transfer time. - Increasing this value would slow down the mdp processing - and can result in slower performance. - Decreasing this value can speed up the mdp processing, - but this can also impact power consumption. - As a rule this time should not be higher than the time - that would be expected with the processing at the - dsi link rate since anyways this would be the maximum - transfer time that could be achieved. - If ping pong split enabled, this time should not be higher - than two times the dsi link rate time. - If the property is not specified, then the default value is 14000 us. -- qcom,dsi-phy-isolation-enabled: A boolean property enables the phy isolation from dsi - controller. This must be enabled for debugging purpose - only with simulator panel. It should not be enabled for - normal DSI panels.
Documentation/devicetree/bindings/drm/msm/mdss-dsi-panel.txt deleted +0 -772
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Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt deleted +0 -742
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Documentation/devicetree/bindings/fb/mdss-pll.txt deleted +0 -103
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The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ Freedreno mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/freedreno
PATCH 2/11 dt-bindings: msm/disp: remove unused display port bindings
In reply to a message not in the archiveDPU display port driver is not enabled yet so
removing the bindings. The driver code is also
reverted. The bindings will be added back when
display port driver is reworked and enabled for
sdm845.
--- .../devicetree/bindings/drm/msm/dpu-dp.txt | 217 --------------------- 1 file changed, 217 deletions(-) delete mode 100644 Documentation/devicetree/bindings/drm/msm/dpu-dp.txt
Documentation/devicetree/bindings/drm/msm/dpu-dp.txt deleted +0 -217
@@ -1,217 +0,0 @@ -Qualcomm Technologies, Inc. -dpu-dp is the master Display Port device which supports DP host controllers that are compatible with VESA Display Port interface specification. -DP Controller: Required properties: -- compatible: Should be "qcom,dp-display". -- reg: Base address and length of DP hardware's memory mapped regions. -- reg-names: A list of strings that name the list of regs. "dp_ctrl" - DP controller memory region. - "dp_phy" - DP PHY memory region. - "dp_ln_tx0" - USB3 DP PHY combo TX-0 lane memory region. - "dp_ln_tx1" - USB3 DP PHY combo TX-1 lane memory region. - "dp_mmss_cc" - Display Clock Control memory region. - "qfprom_physical" - QFPROM Phys memory region. - "dp_pll" - USB3 DP combo PLL memory region. - "usb3_dp_com" - USB3 DP PHY combo memory region. - "hdcp_physical" - DP HDCP memory region. -- cell-index: Specifies the controller instance. -- clocks: Clocks required for Display Port operation. -- clock-names: Names of the clocks corresponding to handles. Following clocks are required: - "core_aux_clk", "core_usb_ref_clk_src","core_usb_ref_clk", "core_usb_cfg_ahb_clk", - "core_usb_pipe_clk", "ctrl_link_clk", "ctrl_link_iface_clk", "ctrl_crypto_clk", - "ctrl_pixel_clk", "pixel_clk_rcg", "pixel_parent". -- gdsc-supply: phandle to gdsc regulator node. -- vdda-1p2-supply: phandle to vdda 1.2V regulator node. -- vdda-0p9-supply: phandle to vdda 0.9V regulator node. -- interrupt-parent phandle to the interrupt parent device node. -- interrupts: The interrupt signal from the DSI block. -- qcom,aux-en-gpio: Specifies the aux-channel enable gpio. -- qcom,aux-sel-gpio: Specifies the aux-channel select gpio. -- qcom,usbplug-cc-gpio: Specifies the usbplug orientation gpio. -- qcom,aux-cfg0-settings: Specifies the DP AUX configuration 0 settings. The first - entry in this array corresponds to the register offset - within DP AUX, while the remaining entries indicate the - programmable values. -- qcom,aux-cfg1-settings: Specifies the DP AUX configuration 1 settings. The first - entry in this array corresponds to the register offset - within DP AUX, while the remaining entries indicate the - programmable values. -- qcom,aux-cfg2-settings: Specifies the DP AUX configuration 2 settings. The first - entry in this array corresponds to the register offset - within DP AUX, while the remaining entries indicate the - programmable values. -- qcom,aux-cfg3-settings: Specifies the DP AUX configuration 3 settings. The first - entry in this array corresponds to the register offset - within DP AUX, while the remaining entries indicate the - programmable values. -- qcom,aux-cfg4-settings: Specifies the DP AUX configuration 4 settings. The first - entry in this array corresponds to the register offset - within DP AUX, while the remaining entries indicate the - programmable values. -- qcom,aux-cfg5-settings: Specifies the DP AUX configuration 5 settings. The first - entry in this array corresponds to the register offset - within DP AUX, while the remaining entries indicate the - programmable values. -- qcom,aux-cfg6-settings: Specifies the DP AUX configuration 6 settings. The first - entry in this array corresponds to the register offset - within DP AUX, while the remaining entries indicate the - programmable values. -- qcom,aux-cfg7-settings: Specifies the DP AUX configuration 7 settings. The first - entry in this array corresponds to the register offset - within DP AUX, while the remaining entries indicate the - programmable values. -- qcom,aux-cfg8-settings: Specifies the DP AUX configuration 8 settings. The first - entry in this array corresponds to the register offset - within DP AUX, while the remaining entries indicate the - programmable values. -- qcom,aux-cfg9-settings: Specifies the DP AUX configuration 9 settings. The first - entry in this array corresponds to the register offset - within DP AUX, while the remaining entries indicate the - programmable values. -- qcom,max-pclk-frequency-khz: An integer specifying the max. pixel clock in KHz supported by Display Port. -- qcom,dp-usbpd-detection: Phandle for the PMI regulator node for USB PHY PD detection. -- qcom,<type>-supply-entries: A node that lists the elements of the supply used by the a particular "type" of DSI module. The module "types" - can be "core", "ctrl", and "phy". Within the same type, - there can be more than one instance of this binding, - in which case the entry would be appended with the - supply entry index. - e.g. qcom,ctrl-supply-entry@0 - -- qcom,supply-name: name of the supply (vdd/vdda/vddio) - -- qcom,supply-min-voltage: minimum voltage level (uV) - -- qcom,supply-max-voltage: maximum voltage level (uV) - -- qcom,supply-enable-load: load drawn (uA) from enabled supply - -- qcom,supply-disable-load: load drawn (uA) from disabled supply - -- qcom,supply-pre-on-sleep: time to sleep (ms) before turning on - -- qcom,supply-post-on-sleep: time to sleep (ms) after turning on - -- qcom,supply-pre-off-sleep: time to sleep (ms) before turning off - -- qcom,supply-post-off-sleep: time to sleep (ms) after turning off -- pinctrl-names: List of names to assign mdss pin states defined in pinctrl device node - Refer to pinctrl-bindings.txt -- pinctrl-<0..n>: Lists phandles each pointing to the pin configuration node within a pin - controller. These pin configurations are installed in the pinctrl - device node. Refer to pinctrl-bindings.txt - -msm_ext_disp is a device which manages the interaction between external -display interfaces, e.g. Display Port, and the audio subsystem. - -Optional properties: -- qcom,ext-disp: phandle for msm-ext-display module -- compatible: Must be "qcom,msm-ext-disp" - -[Optional child nodes]: These nodes are for devices which are -dependent on msm_ext_disp. If msm_ext_disp is disabled then -these devices will be disabled as well. Ex. Audio Codec device. - -- ext_disp_audio_codec: Node for Audio Codec. -- compatible : "qcom,msm-ext-disp-audio-codec-rx"; - -Example: - ext_disp: qcom,msm-ext-disp { - compatible = "qcom,msm-ext-disp"; - ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx { - compatible = "qcom,msm-ext-disp-audio-codec-rx"; - }; - }; - - dpu_dp: qcom,dp_display@0{ - cell-index = <0>; - compatible = "qcom,dp-display"; - - gdsc-supply = <&mdss_core_gdsc>; - vdda-1p2-supply = <&pm8998_l26>; - vdda-0p9-supply = <&pm8998_l1>; - - reg = <0xae90000 0xa84>, - <0x88eaa00 0x200>, - <0x88ea200 0x200>, - <0x88ea600 0x200>, - <0xaf02000 0x1a0>, - <0x780000 0x621c>, - <0x88ea030 0x10>, - <0x88e8000 0x621c>, - <0x0aee1000 0x034>; - reg-names = "dp_ctrl", "dp_phy", "dp_ln_tx0", "dp_ln_tx1", - "dp_mmss_cc", "qfprom_physical", "dp_pll", - "usb3_dp_com", "hdcp_physical"; - - interrupt-parent = <&mdss_mdp>; - interrupts = <12 0>; - - clocks = <&clock_dispcc DISP_CC_MDSS_DP_AUX_CLK>, - <&clock_rpmh RPMH_CXO_CLK>, - <&clock_gcc GCC_USB3_PRIM_CLKREF_CLK>, - <&clock_gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, - <&clock_gcc GCC_USB3_PRIM_PHY_PIPE_CLK>, - <&clock_dispcc DISP_CC_MDSS_DP_LINK_CLK>, - <&clock_dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>, - <&clock_dispcc DISP_CC_MDSS_DP_CRYPTO_CLK>, - <&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK>, - <&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>, - <&mdss_dp_pll DP_VCO_DIVIDED_CLK_SRC_MUX>; - clock-names = "core_aux_clk", "core_usb_ref_clk_src", - "core_usb_ref_clk", "core_usb_cfg_ahb_clk", - "core_usb_pipe_clk", "ctrl_link_clk", - "ctrl_link_iface_clk", "ctrl_crypto_clk", - "ctrl_pixel_clk", "pixel_clk_rcg", "pixel_parent"; - - qcom,dp-usbpd-detection = <&pmi8998_pdphy>; - qcom,ext-disp = <&ext_disp>; - - qcom,aux-cfg0-settings = [1c 00]; - qcom,aux-cfg1-settings = [20 13 23 1d]; - qcom,aux-cfg2-settings = [24 00]; - qcom,aux-cfg3-settings = [28 00]; - qcom,aux-cfg4-settings = [2c 0a]; - qcom,aux-cfg5-settings = [30 26]; - qcom,aux-cfg6-settings = [34 0a]; - qcom,aux-cfg7-settings = [38 03]; - qcom,aux-cfg8-settings = [3c bb]; - qcom,aux-cfg9-settings = [40 03]; - qcom,max-pclk-frequency-khz = <593470>; - pinctrl-names = "mdss_dp_active", "mdss_dp_sleep"; - pinctrl-0 = <&dpu_dp_aux_active &dpu_dp_usbplug_cc_active>; - pinctrl-1 = <&dpu_dp_aux_suspend &dpu_dp_usbplug_cc_suspend>; - qcom,aux-en-gpio = <&tlmm 43 0>; - qcom,aux-sel-gpio = <&tlmm 51 0>; - qcom,usbplug-cc-gpio = <&tlmm 38 0>; - qcom,core-supply-entries { - #address-cells = <1>; - #size-cells = <0>; - - qcom,core-supply-entry@0 { - reg = <0>; - qcom,supply-name = "gdsc"; - qcom,supply-min-voltage = <0>; - qcom,supply-max-voltage = <0>; - qcom,supply-enable-load = <0>; - qcom,supply-disable-load = <0>; - }; - }; - - qcom,ctrl-supply-entries { - #address-cells = <1>; - #size-cells = <0>; - - qcom,ctrl-supply-entry@0 { - reg = <0>; - qcom,supply-name = "vdda-1p2"; - qcom,supply-min-voltage = <1200000>; - qcom,supply-max-voltage = <1200000>; - qcom,supply-enable-load = <21800>; - qcom,supply-disable-load = <4>; - }; - }; - - qcom,phy-supply-entries { - #address-cells = <1>; - #size-cells = <0>; - - qcom,phy-supply-entry@0 { - reg = <0>; - qcom,supply-name = "vdda-0p9"; - qcom,supply-min-voltage = <880000>; - qcom,supply-max-voltage = <880000>; - qcom,supply-enable-load = <36000>; - qcom,supply-disable-load = <32>; - }; - }; - }; -};
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The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ Freedreno mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/freedreno
PATCH 3/11 Revert "drm/msm: Add DisplayPort support"
In reply to a message not in the archiveDPU display port driver is not enabled yet so
reverting the driver patch.
It will be added back when the driver is reworked
and enabled for sdm845 SoC.
--- drivers/gpu/drm/msm/Makefile | 14 - drivers/gpu/drm/msm/dp/dp_audio.c | 806 ------------------ drivers/gpu/drm/msm/dp/dp_audio.h | 81 -- drivers/gpu/drm/msm/dp/dp_aux.c | 570 ------------- drivers/gpu/drm/msm/dp/dp_aux.h | 44 - drivers/gpu/drm/msm/dp/dp_catalog.c | 1320 ----------------------------- drivers/gpu/drm/msm/dp/dp_catalog.h | 163 ---- drivers/gpu/drm/msm/dp/dp_ctrl.c | 1474 --------------------------------- drivers/gpu/drm/msm/dp/dp_ctrl.h | 50 -- drivers/gpu/drm/msm/dp/dp_debug.c | 503 ------------ drivers/gpu/drm/msm/dp/dp_debug.h | 60 -- drivers/gpu/drm/msm/dp/dp_display.c | 1255 ---------------------------- drivers/gpu/drm/msm/dp/dp_display.h | 52 -- drivers/gpu/drm/msm/dp/dp_drm.c | 538 ------------ drivers/gpu/drm/msm/dp/dp_drm.h | 96 --- drivers/gpu/drm/msm/dp/dp_hdcp2p2.c | 927 --------------------- drivers/gpu/drm/msm/dp/dp_link.c | 1548 ----------------------------------- drivers/gpu/drm/msm/dp/dp_link.h | 184 ----- drivers/gpu/drm/msm/dp/dp_panel.c | 526 ------------ drivers/gpu/drm/msm/dp/dp_panel.h | 115 --- drivers/gpu/drm/msm/dp/dp_parser.c | 645 --------------- drivers/gpu/drm/msm/dp/dp_parser.h | 200 ----- drivers/gpu/drm/msm/dp/dp_power.c | 593 -------------- drivers/gpu/drm/msm/dp/dp_power.h | 56 -- drivers/gpu/drm/msm/dp/dp_reg.h | 231 ------ drivers/gpu/drm/msm/dp/dp_usbpd.c | 491 ----------- drivers/gpu/drm/msm/dp/dp_usbpd.h | 101 --- include/drm/drm_dp_helper.h | 23 - 28 files changed, 12666 deletions(-) delete mode 100644 drivers/gpu/drm/msm/dp/dp_audio.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_audio.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_aux.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_aux.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_catalog.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_catalog.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_ctrl.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_ctrl.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_debug.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_debug.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_display.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_display.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_drm.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_drm.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp2p2.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_link.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_link.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_panel.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_panel.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_parser.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_parser.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_power.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_power.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_reg.h delete mode 100644 drivers/gpu/drm/msm/dp/dp_usbpd.c delete mode 100644 drivers/gpu/drm/msm/dp/dp_usbpd.h
drivers/gpu/drm/msm/Makefile +0 -14
@@ -99,20 +99,6 @@ msm-y := \ msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o -msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_usbpd.o \ - dp/dp_parser.o \ - dp/dp_power.o \ - dp/dp_catalog.o \ - dp/dp_aux.o \ - dp/dp_panel.o \ - dp/dp_link.o \ - dp/dp_ctrl.o \ - dp/dp_audio.o \ - dp/dp_debug.o \ - dp/dp_display.o \ - dp/dp_drm.o \ - dp/dp_hdcp2p2.o - msm_wb-$(CONFIG_DRM_MSM_WRITEBACK) += disp/dpu1/dpu_wb.o \ disp/dpu1/dpu_encoder_phys_wb.o
drivers/gpu/drm/msm/dp/dp_audio.c deleted +0 -806
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drivers/gpu/drm/msm/dp/dp_audio.h deleted +0 -81
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drivers/gpu/drm/msm/dp/dp_aux.c deleted +0 -570
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drivers/gpu/drm/msm/dp/dp_aux.h deleted +0 -44
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drivers/gpu/drm/msm/dp/dp_catalog.c deleted +0 -1320
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drivers/gpu/drm/msm/dp/dp_catalog.h deleted +0 -163
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drivers/gpu/drm/msm/dp/dp_ctrl.c deleted +0 -1474
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drivers/gpu/drm/msm/dp/dp_ctrl.h deleted +0 -50
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drivers/gpu/drm/msm/dp/dp_debug.c deleted +0 -503
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drivers/gpu/drm/msm/dp/dp_debug.h deleted +0 -60
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drivers/gpu/drm/msm/dp/dp_display.c deleted +0 -1255
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drivers/gpu/drm/msm/dp/dp_display.h deleted +0 -52
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drivers/gpu/drm/msm/dp/dp_drm.c deleted +0 -538
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drivers/gpu/drm/msm/dp/dp_drm.h deleted +0 -96
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drivers/gpu/drm/msm/dp/dp_hdcp2p2.c deleted +0 -927
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drivers/gpu/drm/msm/dp/dp_link.c deleted +0 -1548
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drivers/gpu/drm/msm/dp/dp_link.h deleted +0 -184
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drivers/gpu/drm/msm/dp/dp_panel.c deleted +0 -526
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drivers/gpu/drm/msm/dp/dp_panel.h deleted +0 -115
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drivers/gpu/drm/msm/dp/dp_parser.c deleted +0 -645
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drivers/gpu/drm/msm/dp/dp_parser.h deleted +0 -200
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drivers/gpu/drm/msm/dp/dp_power.c deleted +0 -593
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drivers/gpu/drm/msm/dp/dp_power.h deleted +0 -56
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drivers/gpu/drm/msm/dp/dp_reg.h deleted +0 -231
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drivers/gpu/drm/msm/dp/dp_usbpd.c deleted +0 -491
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drivers/gpu/drm/msm/dp/dp_usbpd.h deleted +0 -101
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Signature · 7 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ Freedreno mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/freedreno
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PATCH 4/11 dt-bindings: msm/disp: remove unused writeback bindings
In reply to a message not in the archiveDPU writeback support is not enabled yet so removing the bindings. The corresponding driver code is also removed. The bindings will be added back when writeback support is reworked and enabled based on new DRM writeback connector at a later stage.
--- .../devicetree/bindings/drm/msm/dpu-wb.txt | 23 ---------------------- 1 file changed, 23 deletions(-) delete mode 100644 Documentation/devicetree/bindings/drm/msm/dpu-wb.txt
Documentation/devicetree/bindings/drm/msm/dpu-wb.txt deleted +0 -23
@@ -1,23 +0,0 @@ -QTI Snapdragon Display Engine (DPU) writeback display - -Required properties: -- compatible: "qcom,wb-display" - -Optional properties: -- cell-index: Index of writeback device instance. - Default to 0 if not specified. -- label: String to describe this writeback display. - Default to "unknown" if not specified. - -Example: - -/ { - ... - - dpu_wb: qcom,wb-display { - compatible = "qcom,wb-display"; - cell-index = <2>; - label = "wb_display"; - }; - -};
Signature · 7 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ Freedreno mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/freedreno
PATCH 7/11 drm/msm/dpu: remove dt parsing logic for bus_scale config
In reply to a message not in the archiveBus scale config related dt-bindings are removed.
Add bus_scale config in driver instead.
--- drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c | 254 +++++++++++++++-------- 1 file changed, 167 insertions(+), 87 deletions(-)
drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c +167 -87
@@ -20,15 +20,137 @@#include <linux/slab.h> #include <linux/mutex.h> #include <linux/of_platform.h> -#ifdef CONFIG_QCOM_BUS_SCALING -#include <linux/msm-bus.h> -#include <linux/msm-bus-board.h> -#endif #include <linux/dpu_io_util.h> #include "dpu_power_handle.h" #include "dpu_trace.h" +#ifdef CONFIG_QCOM_BUS_SCALING +#include <linux/msm-bus.h> +#include <linux/msm-bus-board.h> + +#define DPU_BUS_VECTOR_ENTRY (src_val, dst_val, ab_val, ib_val) \ + { \ + .src = src_val, \ + .dst = dst_val, \ + .ab = (ab_val), \ + .ib = (ib_val), \ + } + +static struct msm_bus_vectors dpu_reg_bus_vectors[] = { +DPU_BUS_VECTOR_ENTRY (MSM_BUS_MASTER_FIRST , +MSM_BUS_SLAVE_DISPLAY_CFG ,0 ,0 ), +DPU_BUS_VECTOR_ENTRY (MSM_BUS_MASTER_FIRST , +MSM_BUS_SLAVE_DISPLAY_CFG ,0 ,76800000 ), +DPU_BUS_VECTOR_ENTRY (MSM_BUS_MASTER_FIRST , +MSM_BUS_SLAVE_DISPLAY_CFG ,0 ,150000000 ), +DPU_BUS_VECTOR_ENTRY (MSM_BUS_MASTER_FIRST , +MSM_BUS_SLAVE_DISPLAY_CFG ,0 ,300000000 ), +}; + +static struct msm_bus_paths dpu_reg_bus_usecases[] = { { + .num_paths =1 , + .vectors = &dpu_reg_bus_vectors[0 ], +}, { + .num_paths =1 , + .vectors = &dpu_reg_bus_vectors[1 ], +}, { + .num_paths =1 , + .vectors = &dpu_reg_bus_vectors[2 ], +}, { + .num_paths =1 , + .vectors = &dpu_reg_bus_vectors[3 ], +} }; + +static struct msm_bus_scale_pdata dpu_reg_bus_scale_table = { + .usecase = dpu_reg_bus_usecases, + .num_usecases =ARRAY_SIZE (dpu_reg_bus_usecases), + .name ="mdss_reg" , +}; + +static struct msm_bus_vectors dpu_data_bus_vectors[] = { +DPU_BUS_VECTOR_ENTRY (MSM_BUS_MASTER_MDP_PORT0 , +MSM_BUS_SLAVE_MNOC_HF_MEM_NOC ,0 ,0 ), +DPU_BUS_VECTOR_ENTRY (MSM_BUS_MASTER_MDP_PORT1 , +MSM_BUS_SLAVE_MNOC_HF_MEM_NOC ,0 ,0 ), +DPU_BUS_VECTOR_ENTRY (MSM_BUS_MASTER_MDP_PORT0 , +MSM_BUS_SLAVE_MNOC_HF_MEM_NOC ,0 ,6400000000 ), +DPU_BUS_VECTOR_ENTRY (MSM_BUS_MASTER_MDP_PORT1 , +MSM_BUS_SLAVE_MNOC_HF_MEM_NOC ,0 ,6400000000 ), +DPU_BUS_VECTOR_ENTRY (MSM_BUS_MASTER_MDP_PORT0 , +MSM_BUS_SLAVE_MNOC_HF_MEM_NOC ,0 ,6400000000 ), +DPU_BUS_VECTOR_ENTRY (MSM_BUS_MASTER_MDP_PORT1 , +MSM_BUS_SLAVE_MNOC_HF_MEM_NOC ,0 ,6400000000 ), +}; + +static struct msm_bus_paths dpu_data_bus_usecases[] = { { + .num_paths =2 , + .vectors = &dpu_data_bus_vectors[0 ], +}, { + .num_paths =2 , + .vectors = &dpu_data_bus_vectors[2 ], +}, { + .num_paths =2 , + .vectors = &dpu_data_bus_vectors[4 ], +} }; + +static struct msm_bus_scale_pdata dpu_data_bus_scale_table = { + .usecase = dpu_data_bus_usecases, + .num_usecases =ARRAY_SIZE (dpu_data_bus_usecases), + .name ="mdss_mnoc" , +}; + +static struct msm_bus_vectors dpu_llcc_bus_vectors[] = { +DPU_BUS_VECTOR_ENTRY (MSM_BUS_MASTER_MNOC_HF_MEM_NOC , +MSM_BUS_SLAVE_LLCC ,0 ,0 ), +DPU_BUS_VECTOR_ENTRY (MSM_BUS_MASTER_MNOC_HF_MEM_NOC , +MSM_BUS_SLAVE_LLCC ,0 ,6400000000 ), +DPU_BUS_VECTOR_ENTRY (MSM_BUS_MASTER_MNOC_HF_MEM_NOC , +MSM_BUS_SLAVE_LLCC ,0 ,6400000000 ), +}; + +static struct msm_bus_paths dpu_llcc_bus_usecases[] = { { + .num_paths =1 , + .vectors = &dpu_llcc_bus_vectors[0 ], +}, { + .num_paths =1 , + .vectors = &dpu_llcc_bus_vectors[1 ], +}, { + .num_paths =1 , + .vectors = &dpu_llcc_bus_vectors[2 ], +} }; +static struct msm_bus_scale_pdata dpu_llcc_bus_scale_table = { + .usecase = dpu_llcc_bus_usecases, + .num_usecases =ARRAY_SIZE (dpu_llcc_bus_usecases), + .name ="mdss_llcc" , +}; + +static struct msm_bus_vectors dpu_ebi_bus_vectors[] = { +DPU_BUS_VECTOR_ENTRY (MSM_BUS_MASTER_LLCC , +MSM_BUS_SLAVE_EBI_CH0 ,0 ,0 ), +DPU_BUS_VECTOR_ENTRY (MSM_BUS_MASTER_LLCC , +MSM_BUS_SLAVE_EBI_CH0 ,0 ,6400000000 ), +DPU_BUS_VECTOR_ENTRY (MSM_BUS_MASTER_LLCC , +MSM_BUS_SLAVE_EBI_CH0 ,0 ,6400000000 ), +}; + +static struct msm_bus_paths dpu_ebi_bus_usecases[] = { { + .num_paths =1 , + .vectors = &dpu_ebi_bus_vectors[0 ], +}, { + .num_paths =1 , + .vectors = &dpu_ebi_bus_vectors[1 ], +}, { + .num_paths =1 , + .vectors = &dpu_ebi_bus_vectors[2 ], +} }; +static struct msm_bus_scale_pdata dpu_ebi_bus_scale_table = { + .usecase = dpu_ebi_bus_usecases, + .num_usecases =ARRAY_SIZE (dpu_ebi_bus_usecases), + .name ="mdss_ebi" , +}; +#endif +static const char *data_bus_name[DPU_POWER_HANDLE_DBUS_ID_MAX ] = { [DPU_POWER_HANDLE_DBUS_ID_MNOC ] ="qcom,dpu-data-bus" , [DPU_POWER_HANDLE_DBUS_ID_LLCC ] ="qcom,dpu-llcc-bus" ,
@@ -276,93 +398,54 @@ static void dpu_power_data_bus_unregister( } } -static int dpu_power_data_bus_parse (struct platform_device *pdev, -struct dpu_power_data_bus_handle *pdbus,const char *name) +static int dpu_power_data_bus_register (struct dpu_power_handle *phandle, +int index) { -struct device_node *node; -int rc =0 ; -int paths; - - pdbus->bus_channels =1 ; - rc =of_property_read_u32 (pdev->dev.of_node, -"qcom,dpu-dram-channels" , &pdbus->bus_channels); -if (rc) { -pr_debug ("number of channels property not specified\n" ); - rc =0 ; - } +struct dpu_power_data_bus_handle *pdbus = &phandle->data_bus_handle[index]; + pdbus->bus_channels =2 ; pdbus->nrt_axi_port_cnt =0 ; - rc =of_property_read_u32 (pdev->dev.of_node, -"qcom,dpu-num-nrt-paths" , - &pdbus->nrt_axi_port_cnt); -if (rc) { -pr_debug ("number of axi port property not specified\n" ); - rc =0 ; + pdbus->axi_port_cnt =1 ; + +switch (index) { +case DPU_POWER_HANDLE_DBUS_ID_MNOC : + pdbus->data_bus_scale_table = &dpu_data_bus_scale_table; + pdbus->axi_port_cnt =2 ; +break ; +case DPU_POWER_HANDLE_DBUS_ID_LLCC : + pdbus->data_bus_scale_table = &dpu_llcc_bus_scale_table; +break ; +case DPU_POWER_HANDLE_DBUS_ID_EBI : + pdbus->data_bus_scale_table = &dpu_ebi_bus_scale_table; +break ; +default : +pr_err ("invalid data_bus type: %d" , index); +return -EINVAL ; } - node =of_get_child_by_name (pdev->dev.of_node, name); -if (node) { - rc =of_property_read_u32 (node, -"qcom,msm-bus,num-paths" , &paths); -if (rc) { -pr_err ("Error. qcom,msm-bus,num-paths not found\n" ); -return rc; - } - pdbus->axi_port_cnt = paths; - - pdbus->data_bus_scale_table = -msm_bus_pdata_from_node (pdev, node); -if (IS_ERR_OR_NULL (pdbus->data_bus_scale_table)) { -pr_err ("reg bus handle parsing failed\n" ); - rc =PTR_ERR (pdbus->data_bus_scale_table); -if (!pdbus->data_bus_scale_table) - rc = -EINVAL ; - goto end; - } - pdbus->data_bus_hdl =msm_bus_scale_register_client ( - pdbus->data_bus_scale_table); -if (!pdbus->data_bus_hdl) { -pr_err ("data_bus_client register failed\n" ); - rc = -EINVAL ; - goto end; - } -pr_debug ("register %s data_bus_hdl=%x\n" , name, - pdbus->data_bus_hdl); + pdbus->data_bus_hdl =msm_bus_scale_register_client ( + pdbus->data_bus_scale_table); +if (!pdbus->data_bus_hdl) { +pr_err ("data_bus_client register failed\n" ); +return -EINVAL ; } +pr_debug ("register %s data_bus_hdl=%x\n" , data_bus_name[index], + pdbus->data_bus_hdl); -end: -return rc; +return 0 ; } -static int dpu_power_reg_bus_parse (struct platform_device *pdev, -struct dpu_power_handle *phandle) +static int dpu_power_reg_bus_register (struct dpu_power_handle *phandle) { -struct device_node *node; -struct msm_bus_scale_pdata *bus_scale_table; -int rc =0 ; - - node =of_get_child_by_name (pdev->dev.of_node,"qcom,dpu-reg-bus" ); -if (node) { - bus_scale_table =msm_bus_pdata_from_node (pdev, node); -if (IS_ERR_OR_NULL (bus_scale_table)) { -pr_err ("reg bus handle parsing failed\n" ); - rc =PTR_ERR (bus_scale_table); -if (!bus_scale_table) - rc = -EINVAL ; - goto end; - } - phandle->reg_bus_hdl =msm_bus_scale_register_client ( - bus_scale_table); -if (!phandle->reg_bus_hdl) { -pr_err ("reg_bus_client register failed\n" ); - rc = -EINVAL ; - goto end; - } -pr_debug ("register reg_bus_hdl=%x\n" , phandle->reg_bus_hdl); + phandle->reg_bus_hdl =msm_bus_scale_register_client ( + &dpu_reg_bus_scale_table); +if (!phandle->reg_bus_hdl) { +pr_err ("reg_bus_client register failed\n" ); +return -EINVAL ; } +pr_debug ("register reg_bus_hdl=%x\n" , phandle->reg_bus_hdl); -end: -return rc; +return 0 ; }static void dpu_power_reg_bus_unregister (u32 reg_bus_hdl)
@@ -419,8 +502,8 @@ static int dpu_power_reg_bus_update(u32 reg_bus_hdl, u32 usecase_ndx) return rc; }#else -static int dpu_power_data_bus_parse (struct platform_device *pdev, -struct dpu_power_data_bus_handle *pdbus,const char *name) +static int dpu_power_data_bus_register (struct dpu_power_handle *phandle, +int index) {return 0 ; }
@@ -438,8 +521,7 @@ int dpu_power_data_bus_set_quota(struct dpu_power_handle *phandle,return 0 ; } -static int dpu_power_reg_bus_parse (struct platform_device *pdev, -struct dpu_power_handle *phandle) +static int dpu_power_reg_bus_register (struct dpu_power_handle *phandle) {return 0 ; }
@@ -473,7 +555,7 @@ int dpu_power_resource_init(struct platform_device *pdev, phandle->dev = &pdev->dev; - rc =dpu_power_reg_bus_parse (pdev, phandle); + rc =dpu_power_reg_bus_register (phandle);if (rc) {pr_err ("register bus parse failed rc=%d\n" , rc);return rc;
@@ -481,9 +563,7 @@ int dpu_power_resource_init(struct platform_device *pdev,for (i =DPU_POWER_HANDLE_DBUS_ID_MNOC ; i <DPU_POWER_HANDLE_DBUS_ID_MAX ; i++) { - rc =dpu_power_data_bus_parse (pdev, - &phandle->data_bus_handle[i], - data_bus_name[i]); + rc =dpu_power_data_bus_register (phandle, i);if (rc) {pr_err ("register data bus parse failed id=%d rc=%d\n" , i, rc);
Signature · 7 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ Freedreno mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/freedreno
PATCH 9/11 drm/msm/dpu: Remove unused code and move the header
In reply to a message not in the archiveFrom: Jordan Crouse <[email protected]>
Remove unused code from dpu_io_util.c. The functions are only used inside of the msm driver so remove the EXPORT_SYMBOL tags and move the header dpu_io_util.h from include/linux.
--- drivers/gpu/drm/msm/dpu_io_util.c | 380 +------------------------------------- drivers/gpu/drm/msm/dpu_io_util.h | 61 ++++++ drivers/gpu/drm/msm/msm_drv.h | 1 - include/linux/dpu_io_util.h | 115 ------------ 4 files changed, 66 insertions(+), 491 deletions(-) create mode 100644 drivers/gpu/drm/msm/dpu_io_util.h delete mode 100644 include/linux/dpu_io_util.h
drivers/gpu/drm/msm/dpu_io_util.c +5 -375
@@ -13,318 +13,9 @@#include <linux/clk.h> #include <linux/err.h> -#include <linux/io.h> -#include <linux/regulator/consumer.h> #include <linux/delay.h> -#include <linux/dpu_io_util.h> -#define MAX_I2C_CMDS 16 -void dss_reg_w (struct dss_io_data *io,u32 offset,u32 value,u32 debug) -{ -u32 in_val; - -if (!io || !io->base) { -DEV_ERR ("%pS->%s: invalid input\n" , -__builtin_return_address (0 ), __func__); -return ; - } - -if (offset > io->len) { -DEV_ERR ("%pS->%s: offset out of range\n" , -__builtin_return_address (0 ), __func__); -return ; - } - -writel_relaxed (value, io->base + offset); -if (debug) { - in_val =readl_relaxed (io->base + offset); -DEV_DBG ("[%08x] => %08x [%08x]\n" , - (u32 )(unsigned long )(io->base + offset), - value, in_val); - } -}/* dss_reg_w */ -EXPORT_SYMBOL (dss_reg_w); - -u32 dss_reg_r (struct dss_io_data *io,u32 offset,u32 debug) -{ -u32 value; - -if (!io || !io->base) { -DEV_ERR ("%pS->%s: invalid input\n" , -__builtin_return_address (0 ), __func__); -return -EINVAL ; - } - -if (offset > io->len) { -DEV_ERR ("%pS->%s: offset out of range\n" , -__builtin_return_address (0 ), __func__); -return -EINVAL ; - } - - value =readl_relaxed (io->base + offset); -if (debug) -DEV_DBG ("[%08x] <= %08x\n" , - (u32 )(unsigned long )(io->base + offset), value); - -return value; -}/* dss_reg_r */ -EXPORT_SYMBOL (dss_reg_r); - -void dss_reg_dump (void __iomem *base,u32 length,const char *prefix, -u32 debug) -{ -if (debug) -print_hex_dump (KERN_INFO , prefix,DUMP_PREFIX_OFFSET ,32 ,4 , - (void *)base, length, false); -}/* dss_reg_dump */ -EXPORT_SYMBOL (dss_reg_dump); - -static struct resource *msm_dss_get_res_byname (struct platform_device *pdev, -unsigned int type,const char *name) -{ -struct resource *res =NULL ; - - res =platform_get_resource_byname (pdev, type, name); -if (!res) -DEV_ERR ("%s: '%s' resource not found\n" , __func__, name); - -return res; -}/* msm_dss_get_res_byname */ -EXPORT_SYMBOL (msm_dss_get_res_byname); - -int msm_dss_ioremap_byname (struct platform_device *pdev, -struct dss_io_data *io_data,const char *name) -{ -struct resource *res =NULL ; - -if (!pdev || !io_data) { -DEV_ERR ("%pS->%s: invalid input\n" , -__builtin_return_address (0 ), __func__); -return -EINVAL ; - } - - res =msm_dss_get_res_byname (pdev,IORESOURCE_MEM , name); -if (!res) { -DEV_ERR ("%pS->%s: '%s' msm_dss_get_res_byname failed\n" , -__builtin_return_address (0 ), __func__, name); -return -ENODEV ; - } - - io_data->len = (u32 )resource_size (res); - io_data->base =ioremap (res->start, io_data->len); -if (!io_data->base) { -DEV_ERR ("%pS->%s: '%s' ioremap failed\n" , -__builtin_return_address (0 ), __func__, name); -return -EIO ; - } - -return 0 ; -}/* msm_dss_ioremap_byname */ -EXPORT_SYMBOL (msm_dss_ioremap_byname); - -void msm_dss_iounmap (struct dss_io_data *io_data) -{ -if (!io_data) { -DEV_ERR ("%pS->%s: invalid input\n" , -__builtin_return_address (0 ), __func__); -return ; - } - -if (io_data->base) { -iounmap (io_data->base); - io_data->base =NULL ; - } - io_data->len =0 ; -}/* msm_dss_iounmap */ -EXPORT_SYMBOL (msm_dss_iounmap); - -int msm_dss_config_vreg (struct device *dev,struct dss_vreg *in_vreg, -int num_vreg,int config) -{ -int i =0 , rc =0 ; -struct dss_vreg *curr_vreg =NULL ; -enum dss_vreg_type type; - -if (!in_vreg || !num_vreg) -return rc; - -if (config) { -for (i =0 ; i < num_vreg; i++) { - curr_vreg = &in_vreg[i]; - curr_vreg->vreg =regulator_get (dev, - curr_vreg->vreg_name); - rc =PTR_RET (curr_vreg->vreg); -if (rc) { -DEV_ERR ("%pS->%s: %s get failed. rc=%d\n" , -__builtin_return_address (0 ), __func__, - curr_vreg->vreg_name, rc); - curr_vreg->vreg =NULL ; - goto vreg_get_fail; - } - type = (regulator_count_voltages (curr_vreg->vreg) >0 ) - ?DSS_REG_LDO :DSS_REG_VS ; -if (type ==DSS_REG_LDO ) { - rc =regulator_set_voltage ( - curr_vreg->vreg, - curr_vreg->min_voltage, - curr_vreg->max_voltage); -if (rc <0 ) { -DEV_ERR ("%pS->%s: %s set vltg fail\n" , -__builtin_return_address (0 ), - __func__, - curr_vreg->vreg_name); - goto vreg_set_voltage_fail; - } - } - } - }else { -for (i = num_vreg-1 ; i >=0 ; i--) { - curr_vreg = &in_vreg[i]; -if (curr_vreg->vreg) { - type = (regulator_count_voltages ( - curr_vreg->vreg) >0 ) - ?DSS_REG_LDO :DSS_REG_VS ; -if (type ==DSS_REG_LDO ) { -regulator_set_voltage (curr_vreg->vreg, -0 , curr_vreg->max_voltage); - } -regulator_put (curr_vreg->vreg); - curr_vreg->vreg =NULL ; - } - } - } -return 0 ; - -vreg_unconfig: -if (type ==DSS_REG_LDO ) -regulator_set_load (curr_vreg->vreg,0 ); - -vreg_set_voltage_fail: -regulator_put (curr_vreg->vreg); - curr_vreg->vreg =NULL ; - -vreg_get_fail: -for (i--; i >=0 ; i--) { - curr_vreg = &in_vreg[i]; - type = (regulator_count_voltages (curr_vreg->vreg) >0 ) - ?DSS_REG_LDO :DSS_REG_VS ; - goto vreg_unconfig; - } -return rc; -}/* msm_dss_config_vreg */ -EXPORT_SYMBOL (msm_dss_config_vreg); - -int msm_dss_enable_vreg (struct dss_vreg *in_vreg,int num_vreg,int enable) -{ -int i =0 , rc =0 ; -bool need_sleep; - -if (enable) { -for (i =0 ; i < num_vreg; i++) { - rc =PTR_RET (in_vreg[i].vreg); -if (rc) { -DEV_ERR ("%pS->%s: %s regulator error. rc=%d\n" , -__builtin_return_address (0 ), __func__, - in_vreg[i].vreg_name, rc); - goto vreg_set_opt_mode_fail; - } - need_sleep = !regulator_is_enabled (in_vreg[i].vreg); -if (in_vreg[i].pre_on_sleep && need_sleep) -usleep_range (in_vreg[i].pre_on_sleep *1000 , - in_vreg[i].pre_on_sleep *1000 ); - rc =regulator_set_load (in_vreg[i].vreg, - in_vreg[i].enable_load); -if (rc <0 ) { -DEV_ERR ("%pS->%s: %s set opt m fail\n" , -__builtin_return_address (0 ), __func__, - in_vreg[i].vreg_name); - goto vreg_set_opt_mode_fail; - } - rc =regulator_enable (in_vreg[i].vreg); -if (in_vreg[i].post_on_sleep && need_sleep) -usleep_range (in_vreg[i].post_on_sleep *1000 , - in_vreg[i].post_on_sleep *1000 ); -if (rc <0 ) { -DEV_ERR ("%pS->%s: %s enable failed\n" , -__builtin_return_address (0 ), __func__, - in_vreg[i].vreg_name); - goto disable_vreg; - } - } - }else { -for (i = num_vreg-1 ; i >=0 ; i--) { -if (in_vreg[i].pre_off_sleep) -usleep_range (in_vreg[i].pre_off_sleep *1000 , - in_vreg[i].pre_off_sleep *1000 ); -regulator_set_load (in_vreg[i].vreg, - in_vreg[i].disable_load); -regulator_disable (in_vreg[i].vreg); -if (in_vreg[i].post_off_sleep) -usleep_range (in_vreg[i].post_off_sleep *1000 , - in_vreg[i].post_off_sleep *1000 ); - } - } -return rc; - -disable_vreg: -regulator_set_load (in_vreg[i].vreg, in_vreg[i].disable_load); - -vreg_set_opt_mode_fail: -for (i--; i >=0 ; i--) { -if (in_vreg[i].pre_off_sleep) -usleep_range (in_vreg[i].pre_off_sleep *1000 , - in_vreg[i].pre_off_sleep *1000 ); -regulator_set_load (in_vreg[i].vreg, - in_vreg[i].disable_load); -regulator_disable (in_vreg[i].vreg); -if (in_vreg[i].post_off_sleep) -usleep_range (in_vreg[i].post_off_sleep *1000 , - in_vreg[i].post_off_sleep *1000 ); - } - -return rc; -}/* msm_dss_enable_vreg */ -EXPORT_SYMBOL (msm_dss_enable_vreg); - -int msm_dss_enable_gpio (struct dss_gpio *in_gpio,int num_gpio,int enable) -{ -int i =0 , rc =0 ; - -if (enable) { -for (i =0 ; i < num_gpio; i++) { -DEV_DBG ("%pS->%s: %s enable\n" , -__builtin_return_address (0 ), __func__, - in_gpio[i].gpio_name); - - rc =gpio_request (in_gpio[i].gpio, - in_gpio[i].gpio_name); -if (rc <0 ) { -DEV_ERR ("%pS->%s: %s enable failed\n" , -__builtin_return_address (0 ), __func__, - in_gpio[i].gpio_name); - goto disable_gpio; - } -gpio_set_value (in_gpio[i].gpio, in_gpio[i].value); - } - }else { -for (i = num_gpio-1 ; i >=0 ; i--) { -DEV_DBG ("%pS->%s: %s disable\n" , -__builtin_return_address (0 ), __func__, - in_gpio[i].gpio_name); -if (in_gpio[i].gpio) -gpio_free (in_gpio[i].gpio); - } - } -return rc; - -disable_gpio: -for (i--; i >=0 ; i--) -if (in_gpio[i].gpio) -gpio_free (in_gpio[i].gpio); - -return rc; -}/* msm_dss_enable_gpio */ -EXPORT_SYMBOL (msm_dss_enable_gpio); +#include "dpu_io_util.h" void msm_dss_put_clk (struct dss_clk *clk_arry,int num_clk) {
@@ -335,8 +26,7 @@ void msm_dss_put_clk(struct dss_clk *clk_arry, int num_clk)clk_put (clk_arry[i].clk); clk_arry[i].clk =NULL ; } -}/* msm_dss_put_clk */ -EXPORT_SYMBOL (msm_dss_put_clk); +}int msm_dss_get_clk (struct device *dev,struct dss_clk *clk_arry,int num_clk) {
@@ -363,8 +53,7 @@ int msm_dss_get_clk(struct device *dev, struct dss_clk *clk_arry, int num_clk) }return rc; -}/* msm_dss_get_clk */ -EXPORT_SYMBOL (msm_dss_get_clk); +}int msm_dss_clk_set_rate (struct dss_clk *clk_arry,int num_clk) {
@@ -397,8 +86,7 @@ int msm_dss_clk_set_rate(struct dss_clk *clk_arry, int num_clk) }return rc; -}/* msm_dss_clk_set_rate */ -EXPORT_SYMBOL (msm_dss_clk_set_rate); +}int msm_dss_enable_clk (struct dss_clk *clk_arry,int num_clk,int enable) {
@@ -445,8 +133,7 @@ int msm_dss_enable_clk(struct dss_clk *clk_arry, int num_clk, int enable) }return rc; -}/* msm_dss_enable_clk */ -EXPORT_SYMBOL (msm_dss_enable_clk); +}int msm_dss_parse_clock (struct platform_device *pdev,struct dss_module_power *mp)
@@ -497,60 +184,3 @@ int msm_dss_parse_clock(struct platform_device *pdev,return rc; } - -int dpu_i2c_byte_read (struct i2c_client *client,uint8_t slave_addr, -uint8_t reg_offset,uint8_t *read_buf) -{ -struct i2c_msg msgs[2 ]; -int ret =-1 ; - -pr_debug ("%s: reading from slave_addr=[%x] and offset=[%x]\n" , - __func__, slave_addr, reg_offset); - - msgs[0 ].addr = slave_addr >>1 ; - msgs[0 ].flags =0 ; - msgs[0 ].buf = ®_offset; - msgs[0 ].len =1 ; - - msgs[1 ].addr = slave_addr >>1 ; - msgs[1 ].flags =I2C_M_RD ; - msgs[1 ].buf = read_buf; - msgs[1 ].len =1 ; - - ret =i2c_transfer (client->adapter, msgs,2 ); -if (ret <1 ) { -pr_err ("%s: I2C READ FAILED=[%d]\n" , __func__, ret); -return -EACCES ; - } -pr_debug ("%s: i2c buf is [%x]\n" , __func__, *read_buf); -return 0 ; -} -EXPORT_SYMBOL (dpu_i2c_byte_read); - -int dpu_i2c_byte_write (struct i2c_client *client,uint8_t slave_addr, -uint8_t reg_offset,uint8_t *value) -{ -struct i2c_msg msgs[1 ]; -uint8_t data[2 ]; -int status = -EACCES ; - -pr_debug ("%s: writing from slave_addr=[%x] and offset=[%x]\n" , - __func__, slave_addr, reg_offset); - - data[0 ] = reg_offset; - data[1 ] = *value; - - msgs[0 ].addr = slave_addr >>1 ; - msgs[0 ].flags =0 ; - msgs[0 ].len =2 ; - msgs[0 ].buf = data; - - status =i2c_transfer (client->adapter, msgs,1 ); -if (status <1 ) { -pr_err ("I2C WRITE FAILED=[%d]\n" , status); -return -EACCES ; - } -pr_debug ("%s: I2C write status=%x\n" , __func__, status); -return status; -} -EXPORT_SYMBOL (dpu_i2c_byte_write);
drivers/gpu/drm/msm/dpu_io_util.h new file +61 -0
61 lines not on this page · raw message
drivers/gpu/drm/msm/msm_drv.h +0 -1
@@ -33,7 +33,6 @@#include <linux/types.h> #include <linux/of_graph.h> #include <linux/of_device.h> -#include <linux/dpu_io_util.h> #include <asm/sizes.h> #include <linux/kthread.h>
include/linux/dpu_io_util.h deleted +0 -115
115 lines not on this page · raw message
Signature · 7 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ Freedreno mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/freedreno
A message that is not in the archive (sent off-list or not yet received): 1527691788-9350-10-git-send-email-ryadav-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
Re: [DPU PATCH 09/11] drm/msm/dpu: Remove unused code and move the header
Quoted 10 lines · Rajesh Yadav
From: Jordan Crouse <[email protected]>
Remove unused code from
dpu_io_util.c. The functions are only used inside of the msm driver so remove theEXPORT_SYMBOLtags and move the headerdpu_io_util.hfrominclude/linux.Signed-off-by Jordan Crouse <[email protected]>[[email protected]: rebased and removed some extra unused code]Signed-off-by Rajesh Yadav <[email protected]>
Hi Rajesh and Jordan,
I'm backporting this series for testing, and have found that the mdss-pll driver uses both dpu_io_util and a bunch of functions/struct members removed in this patchset. Do we anticipate having to add those back for mdss-pll?
Sean
Quoted 635 lines
--- drivers/gpu/drm/msm/dpu_io_util.c | 380 +------------------------------------- drivers/gpu/drm/msm/dpu_io_util.h | 61 ++++++ drivers/gpu/drm/msm/msm_drv.h | 1 - include/linux/dpu_io_util.h | 115 ------------ 4 files changed, 66 insertions(+), 491 deletions(-) create mode 100644 drivers/gpu/drm/msm/dpu_io_util.h delete mode 100644 include/linux/dpu_io_util.hdrivers/gpu/drm/msm/dpu_io_util.c +5
-375@@ -13,318 +13,9 @@#include <linux/clk.h> #include <linux/err.h> -#include <linux/io.h> -#include <linux/regulator/consumer.h> #include <linux/delay.h> -#include <linux/dpu_io_util.h> -#define MAX_I2C_CMDS 16 -void dss_reg_w (struct dss_io_data *io,u32 offset,u32 value,u32 debug) -{ -u32 in_val; - -if (!io || !io->base) { -DEV_ERR ("%pS->%s: invalid input\n" , -__builtin_return_address (0 ), __func__); -return ; - } - -if (offset > io->len) { -DEV_ERR ("%pS->%s: offset out of range\n" , -__builtin_return_address (0 ), __func__); -return ; - } - -writel_relaxed (value, io->base + offset); -if (debug) { - in_val =readl_relaxed (io->base + offset); -DEV_DBG ("[%08x] => %08x [%08x]\n" , - (u32 )(unsigned long )(io->base + offset), - value, in_val); - } -}/* dss_reg_w */ -EXPORT_SYMBOL (dss_reg_w); - -u32 dss_reg_r (struct dss_io_data *io,u32 offset,u32 debug) -{ -u32 value; - -if (!io || !io->base) { -DEV_ERR ("%pS->%s: invalid input\n" , -__builtin_return_address (0 ), __func__); -return -EINVAL ; - } - -if (offset > io->len) { -DEV_ERR ("%pS->%s: offset out of range\n" , -__builtin_return_address (0 ), __func__); -return -EINVAL ; - } - - value =readl_relaxed (io->base + offset); -if (debug) -DEV_DBG ("[%08x] <= %08x\n" , - (u32 )(unsigned long )(io->base + offset), value); - -return value; -}/* dss_reg_r */ -EXPORT_SYMBOL (dss_reg_r); - -void dss_reg_dump (void __iomem *base,u32 length,const char *prefix, -u32 debug) -{ -if (debug) -print_hex_dump (KERN_INFO , prefix,DUMP_PREFIX_OFFSET ,32 ,4 , - (void *)base, length, false); -}/* dss_reg_dump */ -EXPORT_SYMBOL (dss_reg_dump); - -static struct resource *msm_dss_get_res_byname (struct platform_device *pdev, -unsigned int type,const char *name) -{ -struct resource *res =NULL ; - - res =platform_get_resource_byname (pdev, type, name); -if (!res) -DEV_ERR ("%s: '%s' resource not found\n" , __func__, name); - -return res; -}/* msm_dss_get_res_byname */ -EXPORT_SYMBOL (msm_dss_get_res_byname); - -int msm_dss_ioremap_byname (struct platform_device *pdev, -struct dss_io_data *io_data,const char *name) -{ -struct resource *res =NULL ; - -if (!pdev || !io_data) { -DEV_ERR ("%pS->%s: invalid input\n" , -__builtin_return_address (0 ), __func__); -return -EINVAL ; - } - - res =msm_dss_get_res_byname (pdev,IORESOURCE_MEM , name); -if (!res) { -DEV_ERR ("%pS->%s: '%s' msm_dss_get_res_byname failed\n" , -__builtin_return_address (0 ), __func__, name); -return -ENODEV ; - } - - io_data->len = (u32 )resource_size (res); - io_data->base =ioremap (res->start, io_data->len); -if (!io_data->base) { -DEV_ERR ("%pS->%s: '%s' ioremap failed\n" , -__builtin_return_address (0 ), __func__, name); -return -EIO ; - } - -return 0 ; -}/* msm_dss_ioremap_byname */ -EXPORT_SYMBOL (msm_dss_ioremap_byname); - -void msm_dss_iounmap (struct dss_io_data *io_data) -{ -if (!io_data) { -DEV_ERR ("%pS->%s: invalid input\n" , -__builtin_return_address (0 ), __func__); -return ; - } - -if (io_data->base) { -iounmap (io_data->base); - io_data->base =NULL ; - } - io_data->len =0 ; -}/* msm_dss_iounmap */ -EXPORT_SYMBOL (msm_dss_iounmap); - -int msm_dss_config_vreg (struct device *dev,struct dss_vreg *in_vreg, -int num_vreg,int config) -{ -int i =0 , rc =0 ; -struct dss_vreg *curr_vreg =NULL ; -enum dss_vreg_type type; - -if (!in_vreg || !num_vreg) -return rc; - -if (config) { -for (i =0 ; i < num_vreg; i++) { - curr_vreg = &in_vreg[i]; - curr_vreg->vreg =regulator_get (dev, - curr_vreg->vreg_name); - rc =PTR_RET (curr_vreg->vreg); -if (rc) { -DEV_ERR ("%pS->%s: %s get failed. rc=%d\n" , -__builtin_return_address (0 ), __func__, - curr_vreg->vreg_name, rc); - curr_vreg->vreg =NULL ; - goto vreg_get_fail; - } - type = (regulator_count_voltages (curr_vreg->vreg) >0 ) - ?DSS_REG_LDO :DSS_REG_VS ; -if (type ==DSS_REG_LDO ) { - rc =regulator_set_voltage ( - curr_vreg->vreg, - curr_vreg->min_voltage, - curr_vreg->max_voltage); -if (rc <0 ) { -DEV_ERR ("%pS->%s: %s set vltg fail\n" , -__builtin_return_address (0 ), - __func__, - curr_vreg->vreg_name); - goto vreg_set_voltage_fail; - } - } - } - }else { -for (i = num_vreg-1 ; i >=0 ; i--) { - curr_vreg = &in_vreg[i]; -if (curr_vreg->vreg) { - type = (regulator_count_voltages ( - curr_vreg->vreg) >0 ) - ?DSS_REG_LDO :DSS_REG_VS ; -if (type ==DSS_REG_LDO ) { -regulator_set_voltage (curr_vreg->vreg, -0 , curr_vreg->max_voltage); - } -regulator_put (curr_vreg->vreg); - curr_vreg->vreg =NULL ; - } - } - } -return 0 ; - -vreg_unconfig: -if (type ==DSS_REG_LDO ) -regulator_set_load (curr_vreg->vreg,0 ); - -vreg_set_voltage_fail: -regulator_put (curr_vreg->vreg); - curr_vreg->vreg =NULL ; - -vreg_get_fail: -for (i--; i >=0 ; i--) { - curr_vreg = &in_vreg[i]; - type = (regulator_count_voltages (curr_vreg->vreg) >0 ) - ?DSS_REG_LDO :DSS_REG_VS ; - goto vreg_unconfig; - } -return rc; -}/* msm_dss_config_vreg */ -EXPORT_SYMBOL (msm_dss_config_vreg); - -int msm_dss_enable_vreg (struct dss_vreg *in_vreg,int num_vreg,int enable) -{ -int i =0 , rc =0 ; -bool need_sleep; - -if (enable) { -for (i =0 ; i < num_vreg; i++) { - rc =PTR_RET (in_vreg[i].vreg); -if (rc) { -DEV_ERR ("%pS->%s: %s regulator error. rc=%d\n" , -__builtin_return_address (0 ), __func__, - in_vreg[i].vreg_name, rc); - goto vreg_set_opt_mode_fail; - } - need_sleep = !regulator_is_enabled (in_vreg[i].vreg); -if (in_vreg[i].pre_on_sleep && need_sleep) -usleep_range (in_vreg[i].pre_on_sleep *1000 , - in_vreg[i].pre_on_sleep *1000 ); - rc =regulator_set_load (in_vreg[i].vreg, - in_vreg[i].enable_load); -if (rc <0 ) { -DEV_ERR ("%pS->%s: %s set opt m fail\n" , -__builtin_return_address (0 ), __func__, - in_vreg[i].vreg_name); - goto vreg_set_opt_mode_fail; - } - rc =regulator_enable (in_vreg[i].vreg); -if (in_vreg[i].post_on_sleep && need_sleep) -usleep_range (in_vreg[i].post_on_sleep *1000 , - in_vreg[i].post_on_sleep *1000 ); -if (rc <0 ) { -DEV_ERR ("%pS->%s: %s enable failed\n" , -__builtin_return_address (0 ), __func__, - in_vreg[i].vreg_name); - goto disable_vreg; - } - } - }else { -for (i = num_vreg-1 ; i >=0 ; i--) { -if (in_vreg[i].pre_off_sleep) -usleep_range (in_vreg[i].pre_off_sleep *1000 , - in_vreg[i].pre_off_sleep *1000 ); -regulator_set_load (in_vreg[i].vreg, - in_vreg[i].disable_load); -regulator_disable (in_vreg[i].vreg); -if (in_vreg[i].post_off_sleep) -usleep_range (in_vreg[i].post_off_sleep *1000 , - in_vreg[i].post_off_sleep *1000 ); - } - } -return rc; - -disable_vreg: -regulator_set_load (in_vreg[i].vreg, in_vreg[i].disable_load); - -vreg_set_opt_mode_fail: -for (i--; i >=0 ; i--) { -if (in_vreg[i].pre_off_sleep) -usleep_range (in_vreg[i].pre_off_sleep *1000 , - in_vreg[i].pre_off_sleep *1000 ); -regulator_set_load (in_vreg[i].vreg, - in_vreg[i].disable_load); -regulator_disable (in_vreg[i].vreg); -if (in_vreg[i].post_off_sleep) -usleep_range (in_vreg[i].post_off_sleep *1000 , - in_vreg[i].post_off_sleep *1000 ); - } - -return rc; -}/* msm_dss_enable_vreg */ -EXPORT_SYMBOL (msm_dss_enable_vreg); - -int msm_dss_enable_gpio (struct dss_gpio *in_gpio,int num_gpio,int enable) -{ -int i =0 , rc =0 ; - -if (enable) { -for (i =0 ; i < num_gpio; i++) { -DEV_DBG ("%pS->%s: %s enable\n" , -__builtin_return_address (0 ), __func__, - in_gpio[i].gpio_name); - - rc =gpio_request (in_gpio[i].gpio, - in_gpio[i].gpio_name); -if (rc <0 ) { -DEV_ERR ("%pS->%s: %s enable failed\n" , -__builtin_return_address (0 ), __func__, - in_gpio[i].gpio_name); - goto disable_gpio; - } -gpio_set_value (in_gpio[i].gpio, in_gpio[i].value); - } - }else { -for (i = num_gpio-1 ; i >=0 ; i--) { -DEV_DBG ("%pS->%s: %s disable\n" , -__builtin_return_address (0 ), __func__, - in_gpio[i].gpio_name); -if (in_gpio[i].gpio) -gpio_free (in_gpio[i].gpio); - } - } -return rc; - -disable_gpio: -for (i--; i >=0 ; i--) -if (in_gpio[i].gpio) -gpio_free (in_gpio[i].gpio); - -return rc; -}/* msm_dss_enable_gpio */ -EXPORT_SYMBOL (msm_dss_enable_gpio); +#include "dpu_io_util.h" void msm_dss_put_clk (struct dss_clk *clk_arry,int num_clk) {@@ -335,8 +26,7 @@ void msm_dss_put_clk(struct dss_clk *clk_arry, int num_clk)clk_put (clk_arry[i].clk); clk_arry[i].clk =NULL ; } -}/* msm_dss_put_clk */ -EXPORT_SYMBOL (msm_dss_put_clk); +}int msm_dss_get_clk (struct device *dev,struct dss_clk *clk_arry,int num_clk) {@@ -363,8 +53,7 @@ int msm_dss_get_clk(struct device *dev, struct dss_clk *clk_arry, int num_clk) }return rc; -}/* msm_dss_get_clk */ -EXPORT_SYMBOL (msm_dss_get_clk); +}int msm_dss_clk_set_rate (struct dss_clk *clk_arry,int num_clk) {@@ -397,8 +86,7 @@ int msm_dss_clk_set_rate(struct dss_clk *clk_arry, int num_clk) }return rc; -}/* msm_dss_clk_set_rate */ -EXPORT_SYMBOL (msm_dss_clk_set_rate); +}int msm_dss_enable_clk (struct dss_clk *clk_arry,int num_clk,int enable) {@@ -445,8 +133,7 @@ int msm_dss_enable_clk(struct dss_clk *clk_arry, int num_clk, int enable) }return rc; -}/* msm_dss_enable_clk */ -EXPORT_SYMBOL (msm_dss_enable_clk); +}int msm_dss_parse_clock (struct platform_device *pdev,struct dss_module_power *mp)@@ -497,60 +184,3 @@ int msm_dss_parse_clock(struct platform_device *pdev,return rc; } - -int dpu_i2c_byte_read (struct i2c_client *client,uint8_t slave_addr, -uint8_t reg_offset,uint8_t *read_buf) -{ -struct i2c_msg msgs[2 ]; -int ret =-1 ; - -pr_debug ("%s: reading from slave_addr=[%x] and offset=[%x]\n" , - __func__, slave_addr, reg_offset); - - msgs[0 ].addr = slave_addr >>1 ; - msgs[0 ].flags =0 ; - msgs[0 ].buf = ®_offset; - msgs[0 ].len =1 ; - - msgs[1 ].addr = slave_addr >>1 ; - msgs[1 ].flags =I2C_M_RD ; - msgs[1 ].buf = read_buf; - msgs[1 ].len =1 ; - - ret =i2c_transfer (client->adapter, msgs,2 ); -if (ret <1 ) { -pr_err ("%s: I2C READ FAILED=[%d]\n" , __func__, ret); -return -EACCES ; - } -pr_debug ("%s: i2c buf is [%x]\n" , __func__, *read_buf); -return 0 ; -} -EXPORT_SYMBOL (dpu_i2c_byte_read); - -int dpu_i2c_byte_write (struct i2c_client *client,uint8_t slave_addr, -uint8_t reg_offset,uint8_t *value) -{ -struct i2c_msg msgs[1 ]; -uint8_t data[2 ]; -int status = -EACCES ; - -pr_debug ("%s: writing from slave_addr=[%x] and offset=[%x]\n" , - __func__, slave_addr, reg_offset); - - data[0 ] = reg_offset; - data[1 ] = *value; - - msgs[0 ].addr = slave_addr >>1 ; - msgs[0 ].flags =0 ; - msgs[0 ].len =2 ; - msgs[0 ].buf = data; - - status =i2c_transfer (client->adapter, msgs,1 ); -if (status <1 ) { -pr_err ("I2C WRITE FAILED=[%d]\n" , status); -return -EACCES ; - } -pr_debug ("%s: I2C write status=%x\n" , __func__, status); -return status; -} -EXPORT_SYMBOL (dpu_i2c_byte_write);drivers/gpu/drm/msm/dpu_io_util.h new file +61
-0@@ -0,0 +1,61 @@ +/* Copyright (c) 2012, 2017-2018, The Linux Foundation. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 and +* only version 2 as published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ + +#ifndef __DPU_IO_UTIL_H__ +#define __DPU_IO_UTIL_H__ + +#include <linux/gpio.h> +#include <linux/platform_device.h> +#include <linux/types.h> + +#ifdef DEBUG +#define DEV_DBG(fmt, args...) pr_err(fmt, ##args) +#else +#define DEV_DBG(fmt, args...) pr_debug(fmt, ##args) +#endif +#define DEV_INFO(fmt, args...) pr_info(fmt, ##args) +#define DEV_WARN(fmt, args...) pr_warn(fmt, ##args) +#define DEV_ERR(fmt, args...) pr_err(fmt, ##args) + +struct dss_gpio { +unsigned int gpio; +unsigned int value; +char gpio_name[32 ]; +}; + +enum dss_clk_type { +DSS_CLK_AHB ,/* no set rate. rate controlled through rpm */ +DSS_CLK_PCLK , +}; + +struct dss_clk { +struct clk *clk;/* clk handle */ +char clk_name[32 ]; +enum dss_clk_type type; +unsigned long rate; +unsigned long max_rate; +}; + +struct dss_module_power { +unsigned int num_gpio; +struct dss_gpio *gpio_config; +unsigned int num_clk; +struct dss_clk *clk_config; +}; + +int msm_dss_get_clk (struct device *dev,struct dss_clk *clk_arry,int num_clk); +void msm_dss_put_clk (struct dss_clk *clk_arry,int num_clk); +int msm_dss_clk_set_rate (struct dss_clk *clk_arry,int num_clk); +int msm_dss_enable_clk (struct dss_clk *clk_arry,int num_clk,int enable); +int msm_dss_parse_clock (struct platform_device *pdev, +struct dss_module_power *mp); +#endif /* __DPU_IO_UTIL_H__ */ drivers/gpu/drm/msm/msm_drv.h +0
-1@@ -33,7 +33,6 @@#include <linux/types.h> #include <linux/of_graph.h> #include <linux/of_device.h> -#include <linux/dpu_io_util.h> #include <asm/sizes.h> #include <linux/kthread.h> include/linux/dpu_io_util.h deleted +0
-116@@ -1,115 +0,0 @@ -/* Copyright (c) 2012, 2017-2018, The Linux Foundation. All rights reserved. -* -* This program is free software; you can redistribute it and/or modify -* it under the terms of the GNU General Public License version 2 and -* only version 2 as published by the Free Software Foundation. -* -* This program is distributed in the hope that it will be useful, -* but WITHOUT ANY WARRANTY; without even the implied warranty of -* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -* GNU General Public License for more details. -*/ - -#ifndef __DPU_IO_UTIL_H__ -#define __DPU_IO_UTIL_H__ - -#include <linux/gpio.h> -#include <linux/platform_device.h> -#include <linux/regulator/consumer.h> -#include <linux/i2c.h> -#include <linux/types.h> - -#ifdef DEBUG -#define DEV_DBG(fmt, args...) pr_err(fmt, ##args) -#else -#define DEV_DBG(fmt, args...) pr_debug(fmt, ##args) -#endif -#define DEV_INFO(fmt, args...) pr_info(fmt, ##args) -#define DEV_WARN(fmt, args...) pr_warn(fmt, ##args) -#define DEV_ERR(fmt, args...) pr_err(fmt, ##args) - -struct dss_io_data { -u32 len; -void __iomem *base; -}; - -void dss_reg_w (struct dss_io_data *io,u32 offset,u32 value,u32 debug); -u32 dss_reg_r (struct dss_io_data *io,u32 offset,u32 debug); -void dss_reg_dump (void __iomem *base,u32 len,const char *prefix,u32 debug); - -#define DSS_REG_W_ND (io, offset, val) dss_reg_w(io, offset, val, false) -#define DSS_REG_W (io, offset, val) dss_reg_w(io, offset, val, true) -#define DSS_REG_R_ND (io, offset) dss_reg_r(io, offset, false) -#define DSS_REG_R (io, offset) dss_reg_r(io, offset, true) - -enum dss_vreg_type { -DSS_REG_LDO , -DSS_REG_VS , -}; - -struct dss_vreg { -struct regulator *vreg;/* vreg handle */ -char vreg_name[32 ]; -int min_voltage; -int max_voltage; -int enable_load; -int disable_load; -int pre_on_sleep; -int post_on_sleep; -int pre_off_sleep; -int post_off_sleep; -}; - -struct dss_gpio { -unsigned int gpio; -unsigned int value; -char gpio_name[32 ]; -}; - -enum dss_clk_type { -DSS_CLK_AHB ,/* no set rate. rate controlled through rpm */ -DSS_CLK_PCLK , -DSS_CLK_OTHER , -}; - -struct dss_clk { -struct clk *clk;/* clk handle */ -char clk_name[32 ]; -enum dss_clk_type type; -unsigned long rate; -unsigned long max_rate; -}; - -struct dss_module_power { -unsigned int num_vreg; -struct dss_vreg *vreg_config; -unsigned int num_gpio; -struct dss_gpio *gpio_config; -unsigned int num_clk; -struct dss_clk *clk_config; -}; - -int msm_dss_ioremap_byname (struct platform_device *pdev, -struct dss_io_data *io_data,const char *name); -void msm_dss_iounmap (struct dss_io_data *io_data); - -int msm_dss_enable_gpio (struct dss_gpio *in_gpio,int num_gpio,int enable); -int msm_dss_gpio_enable (struct dss_gpio *in_gpio,int num_gpio,int enable); - -int msm_dss_config_vreg (struct device *dev,struct dss_vreg *in_vreg, -int num_vreg,int config); -int msm_dss_enable_vreg (struct dss_vreg *in_vreg,int num_vreg,int enable); - -int msm_dss_get_clk (struct device *dev,struct dss_clk *clk_arry,int num_clk); -void msm_dss_put_clk (struct dss_clk *clk_arry,int num_clk); -int msm_dss_clk_set_rate (struct dss_clk *clk_arry,int num_clk); -int msm_dss_enable_clk (struct dss_clk *clk_arry,int num_clk,int enable); -int msm_dss_parse_clock (struct platform_device *pdev, -struct dss_module_power *mp); - -int dpu_i2c_byte_read (struct i2c_client *client,uint8_t slave_addr, -uint8_t reg_offset,uint8_t *read_buf); -int dpu_i2c_byte_write (struct i2c_client *client,uint8_t slave_addr, -uint8_t reg_offset,uint8_t *value); - -#endif /* __DPU_IO_UTIL_H__ */ --
Quoted 3 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
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Re: [DPU PATCH 09/11] drm/msm/dpu: Remove unused code and move the header
Quoted 12 lines · Sean Paul
Quoted 10 lines · Rajesh Yadav
From: Jordan Crouse <[email protected]>
Remove unused code from
dpu_io_util.c. The functions are only used inside of the msm driver so remove theEXPORT_SYMBOLtags and move the headerdpu_io_util.hfrominclude/linux.Signed-off-by Jordan Crouse <[email protected]>[[email protected]: rebased and removed some extra unused code]Signed-off-by Rajesh Yadav <[email protected]>
Quoted 5 lines
Hi Rajesh and Jordan,
I'm backporting this series for testing, and have found that the mdss-pll driver uses bothdpu_io_utiland a bunch of functions/struct members removed in this patchset. Do we anticipate having to add those back for mdss-pll?
At some point in the distant past some of the downstream folks discovered that they were using relatively similar functions so they decided to share the code. The code originally lived in the display driver so it happened that the exported code continued to be hosted there.
I'm not sure what the upstream status of the mdss-pll code is but I can't imagine that sharing this code would be in the long term plan and even if it was basic module guidelines would dictate that it would live with mdss-pll which would be more likely to be either be built in or act as a dependency for DPU.
Jordan
Quoted 638 lines
Quoted 638 lines
--- drivers/gpu/drm/msm/dpu_io_util.c | 380 +------------------------------------- drivers/gpu/drm/msm/dpu_io_util.h | 61 ++++++ drivers/gpu/drm/msm/msm_drv.h | 1 - include/linux/dpu_io_util.h | 115 ------------ 4 files changed, 66 insertions(+), 491 deletions(-) create mode 100644 drivers/gpu/drm/msm/dpu_io_util.h delete mode 100644 include/linux/dpu_io_util.hdrivers/gpu/drm/msm/dpu_io_util.c +5
-375@@ -13,318 +13,9 @@#include <linux/clk.h> #include <linux/err.h> -#include <linux/io.h> -#include <linux/regulator/consumer.h> #include <linux/delay.h> -#include <linux/dpu_io_util.h> -#define MAX_I2C_CMDS 16 -void dss_reg_w (struct dss_io_data *io,u32 offset,u32 value,u32 debug) -{ -u32 in_val; - -if (!io || !io->base) { -DEV_ERR ("%pS->%s: invalid input\n" , -__builtin_return_address (0 ), __func__); -return ; - } - -if (offset > io->len) { -DEV_ERR ("%pS->%s: offset out of range\n" , -__builtin_return_address (0 ), __func__); -return ; - } - -writel_relaxed (value, io->base + offset); -if (debug) { - in_val =readl_relaxed (io->base + offset); -DEV_DBG ("[%08x] => %08x [%08x]\n" , - (u32 )(unsigned long )(io->base + offset), - value, in_val); - } -}/* dss_reg_w */ -EXPORT_SYMBOL (dss_reg_w); - -u32 dss_reg_r (struct dss_io_data *io,u32 offset,u32 debug) -{ -u32 value; - -if (!io || !io->base) { -DEV_ERR ("%pS->%s: invalid input\n" , -__builtin_return_address (0 ), __func__); -return -EINVAL ; - } - -if (offset > io->len) { -DEV_ERR ("%pS->%s: offset out of range\n" , -__builtin_return_address (0 ), __func__); -return -EINVAL ; - } - - value =readl_relaxed (io->base + offset); -if (debug) -DEV_DBG ("[%08x] <= %08x\n" , - (u32 )(unsigned long )(io->base + offset), value); - -return value; -}/* dss_reg_r */ -EXPORT_SYMBOL (dss_reg_r); - -void dss_reg_dump (void __iomem *base,u32 length,const char *prefix, -u32 debug) -{ -if (debug) -print_hex_dump (KERN_INFO , prefix,DUMP_PREFIX_OFFSET ,32 ,4 , - (void *)base, length, false); -}/* dss_reg_dump */ -EXPORT_SYMBOL (dss_reg_dump); - -static struct resource *msm_dss_get_res_byname (struct platform_device *pdev, -unsigned int type,const char *name) -{ -struct resource *res =NULL ; - - res =platform_get_resource_byname (pdev, type, name); -if (!res) -DEV_ERR ("%s: '%s' resource not found\n" , __func__, name); - -return res; -}/* msm_dss_get_res_byname */ -EXPORT_SYMBOL (msm_dss_get_res_byname); - -int msm_dss_ioremap_byname (struct platform_device *pdev, -struct dss_io_data *io_data,const char *name) -{ -struct resource *res =NULL ; - -if (!pdev || !io_data) { -DEV_ERR ("%pS->%s: invalid input\n" , -__builtin_return_address (0 ), __func__); -return -EINVAL ; - } - - res =msm_dss_get_res_byname (pdev,IORESOURCE_MEM , name); -if (!res) { -DEV_ERR ("%pS->%s: '%s' msm_dss_get_res_byname failed\n" , -__builtin_return_address (0 ), __func__, name); -return -ENODEV ; - } - - io_data->len = (u32 )resource_size (res); - io_data->base =ioremap (res->start, io_data->len); -if (!io_data->base) { -DEV_ERR ("%pS->%s: '%s' ioremap failed\n" , -__builtin_return_address (0 ), __func__, name); -return -EIO ; - } - -return 0 ; -}/* msm_dss_ioremap_byname */ -EXPORT_SYMBOL (msm_dss_ioremap_byname); - -void msm_dss_iounmap (struct dss_io_data *io_data) -{ -if (!io_data) { -DEV_ERR ("%pS->%s: invalid input\n" , -__builtin_return_address (0 ), __func__); -return ; - } - -if (io_data->base) { -iounmap (io_data->base); - io_data->base =NULL ; - } - io_data->len =0 ; -}/* msm_dss_iounmap */ -EXPORT_SYMBOL (msm_dss_iounmap); - -int msm_dss_config_vreg (struct device *dev,struct dss_vreg *in_vreg, -int num_vreg,int config) -{ -int i =0 , rc =0 ; -struct dss_vreg *curr_vreg =NULL ; -enum dss_vreg_type type; - -if (!in_vreg || !num_vreg) -return rc; - -if (config) { -for (i =0 ; i < num_vreg; i++) { - curr_vreg = &in_vreg[i]; - curr_vreg->vreg =regulator_get (dev, - curr_vreg->vreg_name); - rc =PTR_RET (curr_vreg->vreg); -if (rc) { -DEV_ERR ("%pS->%s: %s get failed. rc=%d\n" , -__builtin_return_address (0 ), __func__, - curr_vreg->vreg_name, rc); - curr_vreg->vreg =NULL ; - goto vreg_get_fail; - } - type = (regulator_count_voltages (curr_vreg->vreg) >0 ) - ?DSS_REG_LDO :DSS_REG_VS ; -if (type ==DSS_REG_LDO ) { - rc =regulator_set_voltage ( - curr_vreg->vreg, - curr_vreg->min_voltage, - curr_vreg->max_voltage); -if (rc <0 ) { -DEV_ERR ("%pS->%s: %s set vltg fail\n" , -__builtin_return_address (0 ), - __func__, - curr_vreg->vreg_name); - goto vreg_set_voltage_fail; - } - } - } - }else { -for (i = num_vreg-1 ; i >=0 ; i--) { - curr_vreg = &in_vreg[i]; -if (curr_vreg->vreg) { - type = (regulator_count_voltages ( - curr_vreg->vreg) >0 ) - ?DSS_REG_LDO :DSS_REG_VS ; -if (type ==DSS_REG_LDO ) { -regulator_set_voltage (curr_vreg->vreg, -0 , curr_vreg->max_voltage); - } -regulator_put (curr_vreg->vreg); - curr_vreg->vreg =NULL ; - } - } - } -return 0 ; - -vreg_unconfig: -if (type ==DSS_REG_LDO ) -regulator_set_load (curr_vreg->vreg,0 ); - -vreg_set_voltage_fail: -regulator_put (curr_vreg->vreg); - curr_vreg->vreg =NULL ; - -vreg_get_fail: -for (i--; i >=0 ; i--) { - curr_vreg = &in_vreg[i]; - type = (regulator_count_voltages (curr_vreg->vreg) >0 ) - ?DSS_REG_LDO :DSS_REG_VS ; - goto vreg_unconfig; - } -return rc; -}/* msm_dss_config_vreg */ -EXPORT_SYMBOL (msm_dss_config_vreg); - -int msm_dss_enable_vreg (struct dss_vreg *in_vreg,int num_vreg,int enable) -{ -int i =0 , rc =0 ; -bool need_sleep; - -if (enable) { -for (i =0 ; i < num_vreg; i++) { - rc =PTR_RET (in_vreg[i].vreg); -if (rc) { -DEV_ERR ("%pS->%s: %s regulator error. rc=%d\n" , -__builtin_return_address (0 ), __func__, - in_vreg[i].vreg_name, rc); - goto vreg_set_opt_mode_fail; - } - need_sleep = !regulator_is_enabled (in_vreg[i].vreg); -if (in_vreg[i].pre_on_sleep && need_sleep) -usleep_range (in_vreg[i].pre_on_sleep *1000 , - in_vreg[i].pre_on_sleep *1000 ); - rc =regulator_set_load (in_vreg[i].vreg, - in_vreg[i].enable_load); -if (rc <0 ) { -DEV_ERR ("%pS->%s: %s set opt m fail\n" , -__builtin_return_address (0 ), __func__, - in_vreg[i].vreg_name); - goto vreg_set_opt_mode_fail; - } - rc =regulator_enable (in_vreg[i].vreg); -if (in_vreg[i].post_on_sleep && need_sleep) -usleep_range (in_vreg[i].post_on_sleep *1000 , - in_vreg[i].post_on_sleep *1000 ); -if (rc <0 ) { -DEV_ERR ("%pS->%s: %s enable failed\n" , -__builtin_return_address (0 ), __func__, - in_vreg[i].vreg_name); - goto disable_vreg; - } - } - }else { -for (i = num_vreg-1 ; i >=0 ; i--) { -if (in_vreg[i].pre_off_sleep) -usleep_range (in_vreg[i].pre_off_sleep *1000 , - in_vreg[i].pre_off_sleep *1000 ); -regulator_set_load (in_vreg[i].vreg, - in_vreg[i].disable_load); -regulator_disable (in_vreg[i].vreg); -if (in_vreg[i].post_off_sleep) -usleep_range (in_vreg[i].post_off_sleep *1000 , - in_vreg[i].post_off_sleep *1000 ); - } - } -return rc; - -disable_vreg: -regulator_set_load (in_vreg[i].vreg, in_vreg[i].disable_load); - -vreg_set_opt_mode_fail: -for (i--; i >=0 ; i--) { -if (in_vreg[i].pre_off_sleep) -usleep_range (in_vreg[i].pre_off_sleep *1000 , - in_vreg[i].pre_off_sleep *1000 ); -regulator_set_load (in_vreg[i].vreg, - in_vreg[i].disable_load); -regulator_disable (in_vreg[i].vreg); -if (in_vreg[i].post_off_sleep) -usleep_range (in_vreg[i].post_off_sleep *1000 , - in_vreg[i].post_off_sleep *1000 ); - } - -return rc; -}/* msm_dss_enable_vreg */ -EXPORT_SYMBOL (msm_dss_enable_vreg); - -int msm_dss_enable_gpio (struct dss_gpio *in_gpio,int num_gpio,int enable) -{ -int i =0 , rc =0 ; - -if (enable) { -for (i =0 ; i < num_gpio; i++) { -DEV_DBG ("%pS->%s: %s enable\n" , -__builtin_return_address (0 ), __func__, - in_gpio[i].gpio_name); - - rc =gpio_request (in_gpio[i].gpio, - in_gpio[i].gpio_name); -if (rc <0 ) { -DEV_ERR ("%pS->%s: %s enable failed\n" , -__builtin_return_address (0 ), __func__, - in_gpio[i].gpio_name); - goto disable_gpio; - } -gpio_set_value (in_gpio[i].gpio, in_gpio[i].value); - } - }else { -for (i = num_gpio-1 ; i >=0 ; i--) { -DEV_DBG ("%pS->%s: %s disable\n" , -__builtin_return_address (0 ), __func__, - in_gpio[i].gpio_name); -if (in_gpio[i].gpio) -gpio_free (in_gpio[i].gpio); - } - } -return rc; - -disable_gpio: -for (i--; i >=0 ; i--) -if (in_gpio[i].gpio) -gpio_free (in_gpio[i].gpio); - -return rc; -}/* msm_dss_enable_gpio */ -EXPORT_SYMBOL (msm_dss_enable_gpio); +#include "dpu_io_util.h" void msm_dss_put_clk (struct dss_clk *clk_arry,int num_clk) {@@ -335,8 +26,7 @@ void msm_dss_put_clk(struct dss_clk *clk_arry, int num_clk)clk_put (clk_arry[i].clk); clk_arry[i].clk =NULL ; } -}/* msm_dss_put_clk */ -EXPORT_SYMBOL (msm_dss_put_clk); +}int msm_dss_get_clk (struct device *dev,struct dss_clk *clk_arry,int num_clk) {@@ -363,8 +53,7 @@ int msm_dss_get_clk(struct device *dev, struct dss_clk *clk_arry, int num_clk) }return rc; -}/* msm_dss_get_clk */ -EXPORT_SYMBOL (msm_dss_get_clk); +}int msm_dss_clk_set_rate (struct dss_clk *clk_arry,int num_clk) {@@ -397,8 +86,7 @@ int msm_dss_clk_set_rate(struct dss_clk *clk_arry, int num_clk) }return rc; -}/* msm_dss_clk_set_rate */ -EXPORT_SYMBOL (msm_dss_clk_set_rate); +}int msm_dss_enable_clk (struct dss_clk *clk_arry,int num_clk,int enable) {@@ -445,8 +133,7 @@ int msm_dss_enable_clk(struct dss_clk *clk_arry, int num_clk, int enable) }return rc; -}/* msm_dss_enable_clk */ -EXPORT_SYMBOL (msm_dss_enable_clk); +}int msm_dss_parse_clock (struct platform_device *pdev,struct dss_module_power *mp)@@ -497,60 +184,3 @@ int msm_dss_parse_clock(struct platform_device *pdev,return rc; } - -int dpu_i2c_byte_read (struct i2c_client *client,uint8_t slave_addr, -uint8_t reg_offset,uint8_t *read_buf) -{ -struct i2c_msg msgs[2 ]; -int ret =-1 ; - -pr_debug ("%s: reading from slave_addr=[%x] and offset=[%x]\n" , - __func__, slave_addr, reg_offset); - - msgs[0 ].addr = slave_addr >>1 ; - msgs[0 ].flags =0 ; - msgs[0 ].buf = ®_offset; - msgs[0 ].len =1 ; - - msgs[1 ].addr = slave_addr >>1 ; - msgs[1 ].flags =I2C_M_RD ; - msgs[1 ].buf = read_buf; - msgs[1 ].len =1 ; - - ret =i2c_transfer (client->adapter, msgs,2 ); -if (ret <1 ) { -pr_err ("%s: I2C READ FAILED=[%d]\n" , __func__, ret); -return -EACCES ; - } -pr_debug ("%s: i2c buf is [%x]\n" , __func__, *read_buf); -return 0 ; -} -EXPORT_SYMBOL (dpu_i2c_byte_read); - -int dpu_i2c_byte_write (struct i2c_client *client,uint8_t slave_addr, -uint8_t reg_offset,uint8_t *value) -{ -struct i2c_msg msgs[1 ]; -uint8_t data[2 ]; -int status = -EACCES ; - -pr_debug ("%s: writing from slave_addr=[%x] and offset=[%x]\n" , - __func__, slave_addr, reg_offset); - - data[0 ] = reg_offset; - data[1 ] = *value; - - msgs[0 ].addr = slave_addr >>1 ; - msgs[0 ].flags =0 ; - msgs[0 ].len =2 ; - msgs[0 ].buf = data; - - status =i2c_transfer (client->adapter, msgs,1 ); -if (status <1 ) { -pr_err ("I2C WRITE FAILED=[%d]\n" , status); -return -EACCES ; - } -pr_debug ("%s: I2C write status=%x\n" , __func__, status); -return status; -} -EXPORT_SYMBOL (dpu_i2c_byte_write);drivers/gpu/drm/msm/dpu_io_util.h new file +61
-0@@ -0,0 +1,61 @@ +/* Copyright (c) 2012, 2017-2018, The Linux Foundation. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 and +* only version 2 as published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ + +#ifndef __DPU_IO_UTIL_H__ +#define __DPU_IO_UTIL_H__ + +#include <linux/gpio.h> +#include <linux/platform_device.h> +#include <linux/types.h> + +#ifdef DEBUG +#define DEV_DBG(fmt, args...) pr_err(fmt, ##args) +#else +#define DEV_DBG(fmt, args...) pr_debug(fmt, ##args) +#endif +#define DEV_INFO(fmt, args...) pr_info(fmt, ##args) +#define DEV_WARN(fmt, args...) pr_warn(fmt, ##args) +#define DEV_ERR(fmt, args...) pr_err(fmt, ##args) + +struct dss_gpio { +unsigned int gpio; +unsigned int value; +char gpio_name[32 ]; +}; + +enum dss_clk_type { +DSS_CLK_AHB ,/* no set rate. rate controlled through rpm */ +DSS_CLK_PCLK , +}; + +struct dss_clk { +struct clk *clk;/* clk handle */ +char clk_name[32 ]; +enum dss_clk_type type; +unsigned long rate; +unsigned long max_rate; +}; + +struct dss_module_power { +unsigned int num_gpio; +struct dss_gpio *gpio_config; +unsigned int num_clk; +struct dss_clk *clk_config; +}; + +int msm_dss_get_clk (struct device *dev,struct dss_clk *clk_arry,int num_clk); +void msm_dss_put_clk (struct dss_clk *clk_arry,int num_clk); +int msm_dss_clk_set_rate (struct dss_clk *clk_arry,int num_clk); +int msm_dss_enable_clk (struct dss_clk *clk_arry,int num_clk,int enable); +int msm_dss_parse_clock (struct platform_device *pdev, +struct dss_module_power *mp); +#endif /* __DPU_IO_UTIL_H__ */ drivers/gpu/drm/msm/msm_drv.h +0
-1@@ -33,7 +33,6 @@#include <linux/types.h> #include <linux/of_graph.h> #include <linux/of_device.h> -#include <linux/dpu_io_util.h> #include <asm/sizes.h> #include <linux/kthread.h> include/linux/dpu_io_util.h deleted +0
-116@@ -1,115 +0,0 @@ -/* Copyright (c) 2012, 2017-2018, The Linux Foundation. All rights reserved. -* -* This program is free software; you can redistribute it and/or modify -* it under the terms of the GNU General Public License version 2 and -* only version 2 as published by the Free Software Foundation. -* -* This program is distributed in the hope that it will be useful, -* but WITHOUT ANY WARRANTY; without even the implied warranty of -* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -* GNU General Public License for more details. -*/ - -#ifndef __DPU_IO_UTIL_H__ -#define __DPU_IO_UTIL_H__ - -#include <linux/gpio.h> -#include <linux/platform_device.h> -#include <linux/regulator/consumer.h> -#include <linux/i2c.h> -#include <linux/types.h> - -#ifdef DEBUG -#define DEV_DBG(fmt, args...) pr_err(fmt, ##args) -#else -#define DEV_DBG(fmt, args...) pr_debug(fmt, ##args) -#endif -#define DEV_INFO(fmt, args...) pr_info(fmt, ##args) -#define DEV_WARN(fmt, args...) pr_warn(fmt, ##args) -#define DEV_ERR(fmt, args...) pr_err(fmt, ##args) - -struct dss_io_data { -u32 len; -void __iomem *base; -}; - -void dss_reg_w (struct dss_io_data *io,u32 offset,u32 value,u32 debug); -u32 dss_reg_r (struct dss_io_data *io,u32 offset,u32 debug); -void dss_reg_dump (void __iomem *base,u32 len,const char *prefix,u32 debug); - -#define DSS_REG_W_ND (io, offset, val) dss_reg_w(io, offset, val, false) -#define DSS_REG_W (io, offset, val) dss_reg_w(io, offset, val, true) -#define DSS_REG_R_ND (io, offset) dss_reg_r(io, offset, false) -#define DSS_REG_R (io, offset) dss_reg_r(io, offset, true) - -enum dss_vreg_type { -DSS_REG_LDO , -DSS_REG_VS , -}; - -struct dss_vreg { -struct regulator *vreg;/* vreg handle */ -char vreg_name[32 ]; -int min_voltage; -int max_voltage; -int enable_load; -int disable_load; -int pre_on_sleep; -int post_on_sleep; -int pre_off_sleep; -int post_off_sleep; -}; - -struct dss_gpio { -unsigned int gpio; -unsigned int value; -char gpio_name[32 ]; -}; - -enum dss_clk_type { -DSS_CLK_AHB ,/* no set rate. rate controlled through rpm */ -DSS_CLK_PCLK , -DSS_CLK_OTHER , -}; - -struct dss_clk { -struct clk *clk;/* clk handle */ -char clk_name[32 ]; -enum dss_clk_type type; -unsigned long rate; -unsigned long max_rate; -}; - -struct dss_module_power { -unsigned int num_vreg; -struct dss_vreg *vreg_config; -unsigned int num_gpio; -struct dss_gpio *gpio_config; -unsigned int num_clk; -struct dss_clk *clk_config; -}; - -int msm_dss_ioremap_byname (struct platform_device *pdev, -struct dss_io_data *io_data,const char *name); -void msm_dss_iounmap (struct dss_io_data *io_data); - -int msm_dss_enable_gpio (struct dss_gpio *in_gpio,int num_gpio,int enable); -int msm_dss_gpio_enable (struct dss_gpio *in_gpio,int num_gpio,int enable); - -int msm_dss_config_vreg (struct device *dev,struct dss_vreg *in_vreg, -int num_vreg,int config); -int msm_dss_enable_vreg (struct dss_vreg *in_vreg,int num_vreg,int enable); - -int msm_dss_get_clk (struct device *dev,struct dss_clk *clk_arry,int num_clk); -void msm_dss_put_clk (struct dss_clk *clk_arry,int num_clk); -int msm_dss_clk_set_rate (struct dss_clk *clk_arry,int num_clk); -int msm_dss_enable_clk (struct dss_clk *clk_arry,int num_clk,int enable); -int msm_dss_parse_clock (struct platform_device *pdev, -struct dss_module_power *mp); - -int dpu_i2c_byte_read (struct i2c_client *client,uint8_t slave_addr, -uint8_t reg_offset,uint8_t *read_buf); -int dpu_i2c_byte_write (struct i2c_client *client,uint8_t slave_addr, -uint8_t reg_offset,uint8_t *value); - -#endif /* __DPU_IO_UTIL_H__ */ --The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
Signature · 6 lines
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ Freedreno mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/freedreno
A message that is not in the archive (sent off-list or not yet received): 20180622153352.GE24526-9PYrDHPZ2Orvke4nUoYGnHL1okKdlPRT@public.gmane.org
Re: [DPU PATCH 09/11] drm/msm/dpu: Remove unused code and move the header
Quoted 24 lines · Jordan Crouse
Quoted 12 lines · Sean Paul
Quoted 10 lines · Rajesh Yadav
From: Jordan Crouse <[email protected]>
Remove unused code from
dpu_io_util.c. The functions are only used inside of the msm driver so remove theEXPORT_SYMBOLtags and move the headerdpu_io_util.hfrominclude/linux.Signed-off-by Jordan Crouse <[email protected]>[[email protected]: rebased and removed some extra unused code]Signed-off-by Rajesh Yadav <[email protected]>Quoted 5 lines
Hi Rajesh and Jordan,
I'm backporting this series for testing, and have found that the mdss-pll driver uses bothdpu_io_utiland a bunch of functions/struct members removed in this patchset. Do we anticipate having to add those back for mdss-pll?At some point in the distant past some of the downstream folks discovered that they were using relatively similar functions so they decided to share the code. The code originally lived in the display driver so it happened that the exported code continued to be hosted there.
Quoted 7 lines
I'm not sure what the upstream status of the mdss-pll code is but I can't imagine that sharing this code would be in the long term plan and even if it was basic module guidelines would dictate that it would live with mdss-pll which would be more likely to be either be built in or act as a dependency for DPU.
Jordan
Hi Sean,drivers/clk/qcom/mdss was needed for dsi-staging driver and can be safely dropped since we switched to upstream DSI driver. Please drop the following change to address this issue (except for the driver/gpu/drm/msm/Kconfig):
https://gitlab.freedesktop.org/seanpaul/dpu-staging/commit/2e433b56489b3e53b9d89ce7bfa15fb4698c8c58
I had tested it on my side.
Thanks,
Rajesh
Quoted 631 lines
Quoted 631 lines
Quoted 631 lines
--- drivers/gpu/drm/msm/dpu_io_util.c | 380 +------------------------------------- drivers/gpu/drm/msm/dpu_io_util.h | 61 ++++++ drivers/gpu/drm/msm/msm_drv.h | 1 - include/linux/dpu_io_util.h | 115 ------------ 4 files changed, 66 insertions(+), 491 deletions(-) create mode 100644 drivers/gpu/drm/msm/dpu_io_util.h delete mode 100644 include/linux/dpu_io_util.hdrivers/gpu/drm/msm/dpu_io_util.c +5
-375@@ -13,318 +13,9 @@#include <linux/clk.h> #include <linux/err.h> -#include <linux/io.h> -#include <linux/regulator/consumer.h> #include <linux/delay.h> -#include <linux/dpu_io_util.h> -#define MAX_I2C_CMDS 16 -void dss_reg_w (struct dss_io_data *io,u32 offset,u32 value,u32 debug) -{ -u32 in_val; - -if (!io || !io->base) { -DEV_ERR ("%pS->%s: invalid input\n" , -__builtin_return_address (0 ), __func__); -return ; - } - -if (offset > io->len) { -DEV_ERR ("%pS->%s: offset out of range\n" , -__builtin_return_address (0 ), __func__); -return ; - } - -writel_relaxed (value, io->base + offset); -if (debug) { - in_val =readl_relaxed (io->base + offset); -DEV_DBG ("[%08x] => %08x [%08x]\n" , - (u32 )(unsigned long )(io->base + offset), - value, in_val); - } -}/* dss_reg_w */ -EXPORT_SYMBOL (dss_reg_w); - -u32 dss_reg_r (struct dss_io_data *io,u32 offset,u32 debug) -{ -u32 value; - -if (!io || !io->base) { -DEV_ERR ("%pS->%s: invalid input\n" , -__builtin_return_address (0 ), __func__); -return -EINVAL ; - } - -if (offset > io->len) { -DEV_ERR ("%pS->%s: offset out of range\n" , -__builtin_return_address (0 ), __func__); -return -EINVAL ; - } - - value =readl_relaxed (io->base + offset); -if (debug) -DEV_DBG ("[%08x] <= %08x\n" , - (u32 )(unsigned long )(io->base + offset), value); - -return value; -}/* dss_reg_r */ -EXPORT_SYMBOL (dss_reg_r); - -void dss_reg_dump (void __iomem *base,u32 length,const char *prefix, -u32 debug) -{ -if (debug) -print_hex_dump (KERN_INFO , prefix,DUMP_PREFIX_OFFSET ,32 ,4 , - (void *)base, length, false); -}/* dss_reg_dump */ -EXPORT_SYMBOL (dss_reg_dump); - -static struct resource *msm_dss_get_res_byname (struct platform_device *pdev, -unsigned int type,const char *name) -{ -struct resource *res =NULL ; - - res =platform_get_resource_byname (pdev, type, name); -if (!res) -DEV_ERR ("%s: '%s' resource not found\n" , __func__, name); - -return res; -}/* msm_dss_get_res_byname */ -EXPORT_SYMBOL (msm_dss_get_res_byname); - -int msm_dss_ioremap_byname (struct platform_device *pdev, -struct dss_io_data *io_data,const char *name) -{ -struct resource *res =NULL ; - -if (!pdev || !io_data) { -DEV_ERR ("%pS->%s: invalid input\n" , -__builtin_return_address (0 ), __func__); -return -EINVAL ; - } - - res =msm_dss_get_res_byname (pdev,IORESOURCE_MEM , name); -if (!res) { -DEV_ERR ("%pS->%s: '%s' msm_dss_get_res_byname failed\n" , -__builtin_return_address (0 ), __func__, name); -return -ENODEV ; - } - - io_data->len = (u32 )resource_size (res); - io_data->base =ioremap (res->start, io_data->len); -if (!io_data->base) { -DEV_ERR ("%pS->%s: '%s' ioremap failed\n" , -__builtin_return_address (0 ), __func__, name); -return -EIO ; - } - -return 0 ; -}/* msm_dss_ioremap_byname */ -EXPORT_SYMBOL (msm_dss_ioremap_byname); - -void msm_dss_iounmap (struct dss_io_data *io_data) -{ -if (!io_data) { -DEV_ERR ("%pS->%s: invalid input\n" , -__builtin_return_address (0 ), __func__); -return ; - } - -if (io_data->base) { -iounmap (io_data->base); - io_data->base =NULL ; - } - io_data->len =0 ; -}/* msm_dss_iounmap */ -EXPORT_SYMBOL (msm_dss_iounmap); - -int msm_dss_config_vreg (struct device *dev,struct dss_vreg *in_vreg, -int num_vreg,int config) -{ -int i =0 , rc =0 ; -struct dss_vreg *curr_vreg =NULL ; -enum dss_vreg_type type; - -if (!in_vreg || !num_vreg) -return rc; - -if (config) { -for (i =0 ; i < num_vreg; i++) { - curr_vreg = &in_vreg[i]; - curr_vreg->vreg =regulator_get (dev, - curr_vreg->vreg_name); - rc =PTR_RET (curr_vreg->vreg); -if (rc) { -DEV_ERR ("%pS->%s: %s get failed. rc=%d\n" , -__builtin_return_address (0 ), __func__, - curr_vreg->vreg_name, rc); - curr_vreg->vreg =NULL ; - goto vreg_get_fail; - } - type = (regulator_count_voltages (curr_vreg->vreg) >0 ) - ?DSS_REG_LDO :DSS_REG_VS ; -if (type ==DSS_REG_LDO ) { - rc =regulator_set_voltage ( - curr_vreg->vreg, - curr_vreg->min_voltage, - curr_vreg->max_voltage); -if (rc <0 ) { -DEV_ERR ("%pS->%s: %s set vltg fail\n" , -__builtin_return_address (0 ), - __func__, - curr_vreg->vreg_name); - goto vreg_set_voltage_fail; - } - } - } - }else { -for (i = num_vreg-1 ; i >=0 ; i--) { - curr_vreg = &in_vreg[i]; -if (curr_vreg->vreg) { - type = (regulator_count_voltages ( - curr_vreg->vreg) >0 ) - ?DSS_REG_LDO :DSS_REG_VS ; -if (type ==DSS_REG_LDO ) { -regulator_set_voltage (curr_vreg->vreg, -0 , curr_vreg->max_voltage); - } -regulator_put (curr_vreg->vreg); - curr_vreg->vreg =NULL ; - } - } - } -return 0 ; - -vreg_unconfig: -if (type ==DSS_REG_LDO ) -regulator_set_load (curr_vreg->vreg,0 ); - -vreg_set_voltage_fail: -regulator_put (curr_vreg->vreg); - curr_vreg->vreg =NULL ; - -vreg_get_fail: -for (i--; i >=0 ; i--) { - curr_vreg = &in_vreg[i]; - type = (regulator_count_voltages (curr_vreg->vreg) >0 ) - ?DSS_REG_LDO :DSS_REG_VS ; - goto vreg_unconfig; - } -return rc; -}/* msm_dss_config_vreg */ -EXPORT_SYMBOL (msm_dss_config_vreg); - -int msm_dss_enable_vreg (struct dss_vreg *in_vreg,int num_vreg,int enable) -{ -int i =0 , rc =0 ; -bool need_sleep; - -if (enable) { -for (i =0 ; i < num_vreg; i++) { - rc =PTR_RET (in_vreg[i].vreg); -if (rc) { -DEV_ERR ("%pS->%s: %s regulator error. rc=%d\n" , -__builtin_return_address (0 ), __func__, - in_vreg[i].vreg_name, rc); - goto vreg_set_opt_mode_fail; - } - need_sleep = !regulator_is_enabled (in_vreg[i].vreg); -if (in_vreg[i].pre_on_sleep && need_sleep) -usleep_range (in_vreg[i].pre_on_sleep *1000 , - in_vreg[i].pre_on_sleep *1000 ); - rc =regulator_set_load (in_vreg[i].vreg, - in_vreg[i].enable_load); -if (rc <0 ) { -DEV_ERR ("%pS->%s: %s set opt m fail\n" , -__builtin_return_address (0 ), __func__, - in_vreg[i].vreg_name); - goto vreg_set_opt_mode_fail; - } - rc =regulator_enable (in_vreg[i].vreg); -if (in_vreg[i].post_on_sleep && need_sleep) -usleep_range (in_vreg[i].post_on_sleep *1000 , - in_vreg[i].post_on_sleep *1000 ); -if (rc <0 ) { -DEV_ERR ("%pS->%s: %s enable failed\n" , -__builtin_return_address (0 ), __func__, - in_vreg[i].vreg_name); - goto disable_vreg; - } - } - }else { -for (i = num_vreg-1 ; i >=0 ; i--) { -if (in_vreg[i].pre_off_sleep) -usleep_range (in_vreg[i].pre_off_sleep *1000 , - in_vreg[i].pre_off_sleep *1000 ); -regulator_set_load (in_vreg[i].vreg, - in_vreg[i].disable_load); -regulator_disable (in_vreg[i].vreg); -if (in_vreg[i].post_off_sleep) -usleep_range (in_vreg[i].post_off_sleep *1000 , - in_vreg[i].post_off_sleep *1000 ); - } - } -return rc; - -disable_vreg: -regulator_set_load (in_vreg[i].vreg, in_vreg[i].disable_load); - -vreg_set_opt_mode_fail: -for (i--; i >=0 ; i--) { -if (in_vreg[i].pre_off_sleep) -usleep_range (in_vreg[i].pre_off_sleep *1000 , - in_vreg[i].pre_off_sleep *1000 ); -regulator_set_load (in_vreg[i].vreg, - in_vreg[i].disable_load); -regulator_disable (in_vreg[i].vreg); -if (in_vreg[i].post_off_sleep) -usleep_range (in_vreg[i].post_off_sleep *1000 , - in_vreg[i].post_off_sleep *1000 ); - } - -return rc; -}/* msm_dss_enable_vreg */ -EXPORT_SYMBOL (msm_dss_enable_vreg); - -int msm_dss_enable_gpio (struct dss_gpio *in_gpio,int num_gpio,int enable) -{ -int i =0 , rc =0 ; - -if (enable) { -for (i =0 ; i < num_gpio; i++) { -DEV_DBG ("%pS->%s: %s enable\n" , -__builtin_return_address (0 ), __func__, - in_gpio[i].gpio_name); - - rc =gpio_request (in_gpio[i].gpio, - in_gpio[i].gpio_name); -if (rc <0 ) { -DEV_ERR ("%pS->%s: %s enable failed\n" , -__builtin_return_address (0 ), __func__, - in_gpio[i].gpio_name); - goto disable_gpio; - } -gpio_set_value (in_gpio[i].gpio, in_gpio[i].value); - } - }else { -for (i = num_gpio-1 ; i >=0 ; i--) { -DEV_DBG ("%pS->%s: %s disable\n" , -__builtin_return_address (0 ), __func__, - in_gpio[i].gpio_name); -if (in_gpio[i].gpio) -gpio_free (in_gpio[i].gpio); - } - } -return rc; - -disable_gpio: -for (i--; i >=0 ; i--) -if (in_gpio[i].gpio) -gpio_free (in_gpio[i].gpio); - -return rc; -}/* msm_dss_enable_gpio */ -EXPORT_SYMBOL (msm_dss_enable_gpio); +#include "dpu_io_util.h" void msm_dss_put_clk (struct dss_clk *clk_arry,int num_clk) {@@ -335,8 +26,7 @@ void msm_dss_put_clk(struct dss_clk *clk_arry, int num_clk)clk_put (clk_arry[i].clk); clk_arry[i].clk =NULL ; } -}/* msm_dss_put_clk */ -EXPORT_SYMBOL (msm_dss_put_clk); +}int msm_dss_get_clk (struct device *dev,struct dss_clk *clk_arry,int num_clk) {@@ -363,8 +53,7 @@ int msm_dss_get_clk(struct device *dev, struct dss_clk *clk_arry, int num_clk) }return rc; -}/* msm_dss_get_clk */ -EXPORT_SYMBOL (msm_dss_get_clk); +}int msm_dss_clk_set_rate (struct dss_clk *clk_arry,int num_clk) {@@ -397,8 +86,7 @@ int msm_dss_clk_set_rate(struct dss_clk *clk_arry, int num_clk) }return rc; -}/* msm_dss_clk_set_rate */ -EXPORT_SYMBOL (msm_dss_clk_set_rate); +}int msm_dss_enable_clk (struct dss_clk *clk_arry,int num_clk,int enable) {@@ -445,8 +133,7 @@ int msm_dss_enable_clk(struct dss_clk *clk_arry, int num_clk, int enable) }return rc; -}/* msm_dss_enable_clk */ -EXPORT_SYMBOL (msm_dss_enable_clk); +}int msm_dss_parse_clock (struct platform_device *pdev,struct dss_module_power *mp)@@ -497,60 +184,3 @@ int msm_dss_parse_clock(struct platform_device *pdev,return rc; } - -int dpu_i2c_byte_read (struct i2c_client *client,uint8_t slave_addr, -uint8_t reg_offset,uint8_t *read_buf) -{ -struct i2c_msg msgs[2 ]; -int ret =-1 ; - -pr_debug ("%s: reading from slave_addr=[%x] and offset=[%x]\n" , - __func__, slave_addr, reg_offset); - - msgs[0 ].addr = slave_addr >>1 ; - msgs[0 ].flags =0 ; - msgs[0 ].buf = ®_offset; - msgs[0 ].len =1 ; - - msgs[1 ].addr = slave_addr >>1 ; - msgs[1 ].flags =I2C_M_RD ; - msgs[1 ].buf = read_buf; - msgs[1 ].len =1 ; - - ret =i2c_transfer (client->adapter, msgs,2 ); -if (ret <1 ) { -pr_err ("%s: I2C READ FAILED=[%d]\n" , __func__, ret); -return -EACCES ; - } -pr_debug ("%s: i2c buf is [%x]\n" , __func__, *read_buf); -return 0 ; -} -EXPORT_SYMBOL (dpu_i2c_byte_read); - -int dpu_i2c_byte_write (struct i2c_client *client,uint8_t slave_addr, -uint8_t reg_offset,uint8_t *value) -{ -struct i2c_msg msgs[1 ]; -uint8_t data[2 ]; -int status = -EACCES ; - -pr_debug ("%s: writing from slave_addr=[%x] and offset=[%x]\n" , - __func__, slave_addr, reg_offset); - - data[0 ] = reg_offset; - data[1 ] = *value; - - msgs[0 ].addr = slave_addr >>1 ; - msgs[0 ].flags =0 ; - msgs[0 ].len =2 ; - msgs[0 ].buf = data; - - status =i2c_transfer (client->adapter, msgs,1 ); -if (status <1 ) { -pr_err ("I2C WRITE FAILED=[%d]\n" , status); -return -EACCES ; - } -pr_debug ("%s: I2C write status=%x\n" , __func__, status); -return status; -} -EXPORT_SYMBOL (dpu_i2c_byte_write);drivers/gpu/drm/msm/dpu_io_util.h new file +61
-0@@ -0,0 +1,61 @@ +/* Copyright (c) 2012, 2017-2018, The Linux Foundation. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 and +* only version 2 as published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +*/ + +#ifndef __DPU_IO_UTIL_H__ +#define __DPU_IO_UTIL_H__ + +#include <linux/gpio.h> +#include <linux/platform_device.h> +#include <linux/types.h> + +#ifdef DEBUG +#define DEV_DBG(fmt, args...) pr_err(fmt, ##args) +#else +#define DEV_DBG(fmt, args...) pr_debug(fmt, ##args) +#endif +#define DEV_INFO(fmt, args...) pr_info(fmt, ##args) +#define DEV_WARN(fmt, args...) pr_warn(fmt, ##args) +#define DEV_ERR(fmt, args...) pr_err(fmt, ##args) + +struct dss_gpio { +unsigned int gpio; +unsigned int value; +char gpio_name[32 ]; +}; + +enum dss_clk_type { +DSS_CLK_AHB ,/* no set rate. rate controlled through rpm */ +DSS_CLK_PCLK , +}; + +struct dss_clk { +struct clk *clk;/* clk handle */ +char clk_name[32 ]; +enum dss_clk_type type; +unsigned long rate; +unsigned long max_rate; +}; + +struct dss_module_power { +unsigned int num_gpio; +struct dss_gpio *gpio_config; +unsigned int num_clk; +struct dss_clk *clk_config; +}; + +int msm_dss_get_clk (struct device *dev,struct dss_clk *clk_arry,int num_clk); +void msm_dss_put_clk (struct dss_clk *clk_arry,int num_clk); +int msm_dss_clk_set_rate (struct dss_clk *clk_arry,int num_clk); +int msm_dss_enable_clk (struct dss_clk *clk_arry,int num_clk,int enable); +int msm_dss_parse_clock (struct platform_device *pdev, +struct dss_module_power *mp); +#endif /* __DPU_IO_UTIL_H__ */ drivers/gpu/drm/msm/msm_drv.h +0
-1@@ -33,7 +33,6 @@#include <linux/types.h> #include <linux/of_graph.h> #include <linux/of_device.h> -#include <linux/dpu_io_util.h> #include <asm/sizes.h> #include <linux/kthread.h> include/linux/dpu_io_util.h deleted +0
-111@@ -1,115 +0,0 @@ -/* Copyright (c) 2012, 2017-2018, The Linux Foundation. All rights reserved. -* -* This program is free software; you can redistribute it and/or modify -* it under the terms of the GNU General Public License version 2 and -* only version 2 as published by the Free Software Foundation. -* -* This program is distributed in the hope that it will be useful, -* but WITHOUT ANY WARRANTY; without even the implied warranty of -* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -* GNU General Public License for more details. -*/ - -#ifndef __DPU_IO_UTIL_H__ -#define __DPU_IO_UTIL_H__ - -#include <linux/gpio.h> -#include <linux/platform_device.h> -#include <linux/regulator/consumer.h> -#include <linux/i2c.h> -#include <linux/types.h> - -#ifdef DEBUG -#define DEV_DBG(fmt, args...) pr_err(fmt, ##args) -#else -#define DEV_DBG(fmt, args...) pr_debug(fmt, ##args) -#endif -#define DEV_INFO(fmt, args...) pr_info(fmt, ##args) -#define DEV_WARN(fmt, args...) pr_warn(fmt, ##args) -#define DEV_ERR(fmt, args...) pr_err(fmt, ##args) - -struct dss_io_data { -u32 len; -void __iomem *base; -}; - -void dss_reg_w (struct dss_io_data *io,u32 offset,u32 value,u32 debug); -u32 dss_reg_r (struct dss_io_data *io,u32 offset,u32 debug); -void dss_reg_dump (void __iomem *base,u32 len,const char *prefix,u32 debug); - -#define DSS_REG_W_ND (io, offset, val) dss_reg_w(io, offset, val, false) -#define DSS_REG_W (io, offset, val) dss_reg_w(io, offset, val, true) -#define DSS_REG_R_ND (io, offset) dss_reg_r(io, offset, false) -#define DSS_REG_R (io, offset) dss_reg_r(io, offset, true) - -enum dss_vreg_type { -DSS_REG_LDO , -DSS_REG_VS , -}; - -struct dss_vreg { -struct regulator *vreg;/* vreg handle */ -char vreg_name[32 ]; -int min_voltage; -int max_voltage; -int enable_load; -int disable_load; -int pre_on_sleep; -int post_on_sleep; -int pre_off_sleep; -int post_off_sleep; -}; - -struct dss_gpio { -unsigned int gpio; -unsigned int value; -char gpio_name[32 ]; -}; - -enum dss_clk_type { -DSS_CLK_AHB ,/* no set rate. rate controlled through rpm */ -DSS_CLK_PCLK , -DSS_CLK_OTHER , -}; - -struct dss_clk { -struct clk *clk;/* clk handle */ -char clk_name[32 ]; -enum dss_clk_type type; -unsigned long rate; -unsigned long max_rate; -}; - -struct dss_module_power { -unsigned int num_vreg; -struct dss_vreg *vreg_config; -unsigned int num_gpio; -struct dss_gpio *gpio_config; -unsigned int num_clk; -struct dss_clk *clk_config; -}; - -int msm_dss_ioremap_byname (struct platform_device *pdev, -struct dss_io_data *io_data,const char *name); -void msm_dss_iounmap (struct dss_io_data *io_data); - -int msm_dss_enable_gpio (struct dss_gpio *in_gpio,int num_gpio,int enable); -int msm_dss_gpio_enable (struct dss_gpio *in_gpio,int num_gpio,int enable); - -int msm_dss_config_vreg (struct device *dev,struct dss_vreg *in_vreg, -int num_vreg,int config); -int msm_dss_enable_vreg (struct dss_vreg *in_vreg,int num_vreg,int enable); - -int msm_dss_get_clk (struct device *dev,struct dss_clk *clk_arry,int num_clk); -void msm_dss_put_clk (struct dss_clk *clk_arry,int num_clk); -int msm_dss_clk_set_rate (struct dss_clk *clk_arry,int num_clk); -int msm_dss_enable_clk (struct dss_clk *clk_arry,int num_clk,int enable); -int msm_dss_parse_clock (struct platform_device *pdev, -struct dss_module_power *mp); - -int dpu_i2c_byte_read (struct i2c_client *client,uint8_t slave_addr, -uint8_t reg_offset,uint8_t *read_buf);
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include/linux/dpu_io_util.h deleted +0
-5-int dpu_i2c_byte_write (struct i2c_client *client,uint8_t slave_addr, -uint8_t reg_offset,uint8_t *value); - -#endif /* __DPU_IO_UTIL_H__ */ --The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
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PATCH 10/11 drm/msm/dpu: correct dpu_io_util.h include path
In reply to a message not in the archivedpu_io_util.h is moved from standard include path to driver folder, correct the include path in code.
--- drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-)
drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c +0 -1
@@ -20,7 +20,6 @@#include <linux/slab.h> #include <linux/mutex.h> #include <linux/of_platform.h> -#include <linux/dpu_io_util.h> #include "dpu_power_handle.h" #include "dpu_trace.h"
drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h +1 -1
@@ -21,7 +21,7 @@#define DPU_POWER_HANDLE_ENABLE_BUS_IB_QUOTA 1600000000#define DPU_POWER_HANDLE_DISABLE_BUS_IB_QUOTA 0 -#include <linux/dpu_io_util.h> +#include "dpu_io_util.h" /* event will be triggered before power handler disable */ #define DPU_POWER_EVENT_PRE_DISABLE 0x1
Signature · 7 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ Freedreno mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/freedreno
A message that is not in the archive (sent off-list or not yet received): 1527691788-9350-11-git-send-email-ryadav-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
Re: [DPU PATCH 10/11] drm/msm/dpu: correct dpu_io_util.h include path
Quoted 4 lines · Rajesh Yadav
dpu_io_util.his moved from standard include path to driver folder, correct the include path in code.Signed-off-by Rajesh Yadav <[email protected]>
If the previous patch doesn't compile without this fix you should squash them.
Quoted 30 lines
--- drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-)drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c +0
-1@@ -20,7 +20,6 @@#include <linux/slab.h> #include <linux/mutex.h> #include <linux/of_platform.h> -#include <linux/dpu_io_util.h> #include "dpu_power_handle.h" #include "dpu_trace.h" drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h +1
-1@@ -21,7 +21,7 @@#define DPU_POWER_HANDLE_ENABLE_BUS_IB_QUOTA 1600000000#define DPU_POWER_HANDLE_DISABLE_BUS_IB_QUOTA 0 -#include <linux/dpu_io_util.h> +#include "dpu_io_util.h" /* event will be triggered before power handler disable */ #define DPU_POWER_EVENT_PRE_DISABLE 0x1
Signature · 6 lines
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ Freedreno mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/freedreno
A message that is not in the archive (sent off-list or not yet received): 20180530163005.GC5028-9PYrDHPZ2Orvke4nUoYGnHL1okKdlPRT@public.gmane.org
Re: [DPU PATCH 10/11] drm/msm/dpu: correct dpu_io_util.h include path
Quoted 7 lines · Jordan Crouse
Quoted 4 lines · Rajesh Yadav
dpu_io_util.his moved from standard include path to driver folder, correct the include path in code.Signed-off-by Rajesh Yadav <[email protected]>If the previous patch doesn't compile without this fix you should squash them.
Hi Jordan,
Yeah you are right, will squash it in v2.
We are trying to keep msm core and dpu changes in separate patches for better squashing when they are pulled by Sean in dpu-staging tree but for this instance can't break compilation so yeah I'll squash it with previous one.
Thanks,
Rajesh
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Quoted 26 lines
--- drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-)drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c +0
-1@@ -20,7 +20,6 @@#include <linux/slab.h> #include <linux/mutex.h> #include <linux/of_platform.h> -#include <linux/dpu_io_util.h> #include "dpu_power_handle.h" #include "dpu_trace.h" drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h +0
-0@@ -21,7 +21,7 @@#define DPU_POWER_HANDLE_ENABLE_BUS_IB_QUOTA 1600000000#define DPU_POWER_HANDLE_DISABLE_BUS_IB_QUOTA 0
Quoted 5 lines
drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h line 27
Quoted 5 lines
drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h +1
-1-#include <linux/dpu_io_util.h> +#include "dpu_io_util.h" /* event will be triggered before power handler disable */ #define DPU_POWER_EVENT_PRE_DISABLE 0x1
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PATCH 11/11 drm/msm/dpu: move dpu_io_util to dpu folder
In reply to a message not in the archivedpu_io_util is used only by dpu driver so
move it to dpu folder.
--- drivers/gpu/drm/msm/Makefile | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.c | 186 ++++++++++++++++++++++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.h | 61 +++++++++ drivers/gpu/drm/msm/dpu_io_util.c | 186 ---------------------------- drivers/gpu/drm/msm/dpu_io_util.h | 61 --------- 5 files changed, 248 insertions(+), 248 deletions(-) create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.c create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.h delete mode 100644 drivers/gpu/drm/msm/dpu_io_util.c delete mode 100644 drivers/gpu/drm/msm/dpu_io_util.h
drivers/gpu/drm/msm/Makefile +1 -1
@@ -68,6 +68,7 @@ msm-y := \ disp/dpu1/dpu_hw_top.o \ disp/dpu1/dpu_hw_util.o \ disp/dpu1/dpu_hw_vbif.o \ + disp/dpu1/dpu_io_util.o \ disp/dpu1/dpu_irq.o \ disp/dpu1/dpu_kms.o \ disp/dpu1/dpu_kms_utils.o \
@@ -77,7 +78,6 @@ msm-y := \ disp/dpu1/dpu_mdss.o \ disp/dpu1/dpu_power_handle.o \ dpu_dbg.o \ - dpu_io_util.o \ dpu_dbg_evtlog.o \ msm_atomic.o \ msm_debugfs.o \
drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.c new file +186 -0
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drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.h new file +61 -0
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drivers/gpu/drm/msm/dpu_io_util.c deleted +0 -186
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drivers/gpu/drm/msm/dpu_io_util.h deleted +0 -61
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Signature · 7 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ Freedreno mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/freedreno
PATCH 5/11 drm/msm/dpu: remove writeback support
In reply to Rajesh YadavRemove writeback support from dpu driver
as it is not enabled.
Writeback support will be added back later
based on DRM writeback connector.
--- drivers/gpu/drm/msm/Makefile | 5 - drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 3 +- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 94 +- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 2 - drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 63 - .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 1349 -------------------- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 41 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 77 -- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c | 3 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 19 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 6 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 12 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h | 4 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c | 321 ----- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h | 186 --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 5 - drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 42 +- drivers/gpu/drm/msm/disp/dpu1/dpu_wb.c | 767 ----------- drivers/gpu/drm/msm/disp/dpu1/dpu_wb.h | 232 ---- 21 files changed, 23 insertions(+), 3211 deletions(-) delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_wb.c delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_wb.h
drivers/gpu/drm/msm/Makefile +0 -5
@@ -68,7 +68,6 @@ msm-y := \ disp/dpu1/dpu_hw_top.o \ disp/dpu1/dpu_hw_util.o \ disp/dpu1/dpu_hw_vbif.o \ - disp/dpu1/dpu_hw_wb.o \ disp/dpu1/dpu_irq.o \ disp/dpu1/dpu_kms.o \ disp/dpu1/dpu_kms_utils.o \
@@ -99,9 +98,6 @@ msm-y := \ msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o -msm_wb-$(CONFIG_DRM_MSM_WRITEBACK) += disp/dpu1/dpu_wb.o \ - disp/dpu1/dpu_encoder_phys_wb.o - msm-$(CONFIG_DRM_MSM_ROTATOR) += disp/dpu1/dpu_hw_rot.o msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
@@ -134,4 +130,3 @@ msm-$(CONFIG_DRM_MSM_DSI_10NM_PHY) += dsi/pll/dsi_pll_10nm.o endif obj-$(CONFIG_DRM_MSM) += msm.o -obj-$(CONFIG_DRM_MSM_WRITEBACK) += msm_wb.o
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h +1 -2
@@ -440,8 +440,7 @@ static inline enum dpu_crtc_client_type dpu_crtc_get_client_type(if (!cstate)return NRT_CLIENT ; -return dpu_crtc_get_intf_mode (crtc) ==INTF_MODE_WB_LINE ?NRT_CLIENT : -RT_CLIENT ; +return RT_CLIENT ; }/**
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +11 -83
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drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h +0 -2
@@ -32,7 +32,6 @@/** * Encoder functions and data types * @intfs: Interfaces this encoder is using, INTF_MODE_NONE if unused -* @wbs: Writebacks this encoder is using, INTF_MODE_NONE if unused * @needs_cdm: Encoder requests a CDM based on pixel format conversion needs * @display_num_of_h_tiles: Number of horizontal tiles in case of split * interface
@@ -40,7 +39,6 @@*/ struct dpu_encoder_hw_resources {enum dpu_intf_mode intfs[INTF_MAX ]; -enum dpu_intf_mode wbs[WB_MAX ];bool needs_cdm;u32 display_num_of_h_tiles; };
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h +0 -63
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drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c deleted +0 -1349
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drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +3 -38
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drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h +0 -77
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drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c +0 -3
@@ -235,9 +235,6 @@ int dpu_hw_cdm_enable(struct dpu_hw_cdm *ctx, opmode =BIT (0 ); opmode |= (fmt->chroma_sample <<1 ); cdm_cfg.intf_en = true; - }else { - opmode =0 ; - cdm_cfg.wb_en = true; } csc |=BIT (2 );
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c +0 -19
@@ -224,21 +224,6 @@ static inline int dpu_hw_ctl_get_bitmask_intf(struct dpu_hw_ctl *ctx,return 0 ; } -static inline int dpu_hw_ctl_get_bitmask_wb (struct dpu_hw_ctl *ctx, -u32 *flushbits,enum dpu_wb wb) -{ -switch (wb) { -case WB_0 : -case WB_1 : -case WB_2 : - *flushbits |=BIT (16 ); -break ; -default : -return -EINVAL ; - } -return 0 ; -} -static inline int dpu_hw_ctl_get_bitmask_cdm (struct dpu_hw_ctl *ctx,u32 *flushbits,enum dpu_cdm cdm) {
@@ -460,9 +445,6 @@ static void dpu_hw_ctl_intf_cfg(struct dpu_hw_ctl *ctx, intf_cfg |= (cfg->intf &0xF ) <<4 ; -if (cfg->wb) - intf_cfg |= (cfg->wb &0x3 ) +2 ; -if (cfg->mode_3d) { intf_cfg |=BIT (19 ); intf_cfg |= (cfg->mode_3d -0x1 ) <<20 ;
@@ -504,7 +486,6 @@ static void _setup_ctl_ops(struct dpu_hw_ctl_ops *ops, ops->get_bitmask_mixer = dpu_hw_ctl_get_bitmask_mixer; ops->get_bitmask_intf = dpu_hw_ctl_get_bitmask_intf; ops->get_bitmask_cdm = dpu_hw_ctl_get_bitmask_cdm; - ops->get_bitmask_wb = dpu_hw_ctl_get_bitmask_wb; };static struct dpu_hw_blk_ops dpu_hw_ops = {
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h +0 -6
@@ -44,14 +44,12 @@ struct dpu_hw_stage_cfg {/** * struct dpu_hw_intf_cfg :Describes how the DPU writes data to output interface * @intf : Interface id -* @wb: Writeback id * @mode_3d: 3d mux configuration * @intf_mode_sel: Interface mode, cmd / vid * @stream_sel: Stream selection for multi-stream interfaces */ struct dpu_hw_intf_cfg {enum dpu_intf intf; -enum dpu_wb wb;enum dpu_3d_blend_mode mode_3d;enum dpu_ctl_mode_sel intf_mode_sel;int stream_sel;
@@ -148,10 +146,6 @@ struct dpu_hw_ctl_ops {u32 *flushbits, enum dpu_cdm blk); -int (*get_bitmask_wb)(struct dpu_hw_ctl *ctx, -u32 *flushbits, -enum dpu_wb blk); -/** * Set all blend stages to disabled * @ctx : ctl path ctx pointer
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c +1 -11
@@ -109,9 +109,7 @@ static void dpu_hw_setup_cdm_output(struct dpu_hw_mdp *mdp, c = &mdp->hw; -if (cfg->wb_en) - out_ctl |=BIT (24 ); -else if (cfg->intf_en) +if (cfg->intf_en) out_ctl |=BIT (19 );DPU_REG_WRITE (c,MDP_OUT_CTL_0 , out_ctl);
@@ -178,10 +176,6 @@ static void dpu_hw_get_danger_status(struct dpu_hw_mdp *mdp, status->sspp[SSPP_DMA3 ] = (value >>30 ) &0x3 ; status->sspp[SSPP_CURSOR0 ] = (value >>24 ) &0x3 ; status->sspp[SSPP_CURSOR1 ] = (value >>26 ) &0x3 ; - status->wb[WB_0 ] =0 ; - status->wb[WB_1 ] =0 ; - status->wb[WB_2 ] = (value >>2 ) &0x3 ; - status->wb[WB_3 ] =0 ; } static void dpu_hw_setup_vsync_source(struct dpu_hw_mdp *mdp,
@@ -279,10 +273,6 @@ static void dpu_hw_get_safe_status(struct dpu_hw_mdp *mdp, status->sspp[SSPP_DMA3 ] = (value >>30 ) &0x1 ; status->sspp[SSPP_CURSOR0 ] = (value >>24 ) &0x1 ; status->sspp[SSPP_CURSOR1 ] = (value >>26 ) &0x1 ; - status->wb[WB_0 ] =0 ; - status->wb[WB_1 ] =0 ; - status->wb[WB_2 ] = (value >>2 ) &0x1 ; - status->wb[WB_3 ] =0 ; }void dpu_hw_reset_ubwc (struct dpu_hw_mdp *mdp,struct dpu_mdss_cfg *m)
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h +0 -4
@@ -53,11 +53,9 @@ struct split_pipe_cfg {/** * struct cdm_output_cfg: output configuration for cdm -* @wb_en : enable/disable writeback output * @intf_en : enable/disable interface output */ struct cdm_output_cfg { -bool wb_en;bool intf_en; };
@@ -65,12 +63,10 @@ struct cdm_output_cfg {* struct dpu_danger_safe_status: danger and safe status signals * @mdp: top level status * @sspp: source pipe status -* @wb: writebck output status */ struct dpu_danger_safe_status {u8 mdp;u8 sspp[SSPP_MAX ]; -u8 wb[WB_MAX ]; };/**
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c deleted +0 -321
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drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h deleted +0 -186
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drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +0 -5
@@ -120,11 +120,6 @@ static int _dpu_danger_signal_status(struct seq_file *s, status.sspp[i]);seq_puts (s,"\n" ); -for (i =WB_0 ; i <WB_MAX ; i++) -seq_printf (s,"WB%d : 0x%x \t" , i -WB_0 , - status.wb[i]); -seq_puts (s,"\n" ); -return 0 ; }
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h +0 -1
@@ -31,7 +31,6 @@#include "dpu_hw_ctl.h" #include "dpu_hw_lm.h" #include "dpu_hw_interrupts.h" -#include "dpu_hw_wb.h" #include "dpu_hw_top.h" #include "dpu_rm.h" #include "dpu_power_handle.h"
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +1 -1
@@ -1374,7 +1374,7 @@ static int dpu_plane_sspp_atomic_update(struct drm_plane *plane, cdp_cfg->tile_amortize_enable =DPU_FORMAT_IS_UBWC (fmt) ||DPU_FORMAT_IS_TILE (fmt); - cdp_cfg->preload_ahead =DPU_WB_CDP_PRELOAD_AHEAD_64 ; + cdp_cfg->preload_ahead =DPU_SSPP_CDP_PRELOAD_AHEAD_64 ; pdpu->pipe_hw->ops.setup_cdp (pdpu->pipe_hw, cdp_cfg); }
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +6 -36
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drivers/gpu/drm/msm/disp/dpu1/dpu_wb.c deleted +0 -767
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drivers/gpu/drm/msm/disp/dpu1/dpu_wb.h deleted +0 -232
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The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ dri-devel mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/dri-devel
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PATCH 6/11 drm/msm/dpu: remove hdcp support
In reply to Rajesh YadavRemove hdcp 1.x support from dpu driver.
The hdcp 1.x support will be posted back with
display port driver.
--- drivers/gpu/drm/msm/dpu_hdcp.h | 74 -- drivers/gpu/drm/msm/dpu_hdcp_1x.c | 1579 ------------------------------------- 2 files changed, 1653 deletions(-) delete mode 100644 drivers/gpu/drm/msm/dpu_hdcp.h delete mode 100644 drivers/gpu/drm/msm/dpu_hdcp_1x.c
drivers/gpu/drm/msm/dpu_hdcp.h deleted +0 -74
@@ -1,74 +0,0 @@ -/* Copyright (c) 2012, 2014-2018, The Linux Foundation. All rights reserved. -* -* This program is free software; you can redistribute it and/or modify -* it under the terms of the GNU General Public License version 2 and -* only version 2 as published by the Free Software Foundation. -* -* This program is distributed in the hope that it will be useful, -* but WITHOUT ANY WARRANTY; without even the implied warranty of -* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -* GNU General Public License for more details. -*/ - -#ifndef __DPU_HDCP_H__ -#define __DPU_HDCP_H__ - -#include <soc/qcom/scm.h> -#include <linux/types.h> -#include <linux/bitops.h> -#include <linux/debugfs.h> -#include <linux/of_device.h> -#include <linux/i2c.h> -#include <drm/drmP.h> -#include <drm/drm_crtc.h> -#include <drm/drm_edid.h> -#include "dpu_kms.h" - -enum dpu_hdcp_client_id { -HDCP_CLIENT_HDMI , -HDCP_CLIENT_DP , -}; - -enum dpu_hdcp_states { -HDCP_STATE_INACTIVE , -HDCP_STATE_AUTHENTICATING , -HDCP_STATE_AUTHENTICATED , -HDCP_STATE_AUTH_FAIL , -HDCP_STATE_AUTH_ENC_NONE , -HDCP_STATE_AUTH_ENC_1X , -HDCP_STATE_AUTH_ENC_2P2 -}; - -struct dpu_hdcp_init_data { -struct dss_io_data *core_io; -struct dss_io_data *qfprom_io; -struct dss_io_data *hdcp_io; -struct drm_dp_aux *drm_aux; -struct mutex *mutex; -struct workqueue_struct *workq; -void *cb_data; -void (*notify_status)(void *cb_data,enum dpu_hdcp_states status); -u8 sink_rx_status; -unsigned char *revision; -u32 phy_addr; -bool sec_access; -enum dpu_hdcp_client_id client_id; -}; - -struct dpu_hdcp_ops { -int (*isr)(void *ptr); -int (*cp_irq)(void *ptr); -int (*reauthenticate)(void *input); -int (*authenticate)(void *hdcp_ctrl); -bool (*feature_supported)(void *input); -void (*off)(void *hdcp_ctrl); -}; - -void *dpu_hdcp_1x_init (struct dpu_hdcp_init_data *init_data); -void dpu_hdcp_1x_deinit (void *input); -struct dpu_hdcp_ops *dpu_hdcp_1x_start (void *input); -void *dpu_dp_hdcp2p2_init (struct dpu_hdcp_init_data *init_data); -void dpu_dp_hdcp2p2_deinit (void *input); -const char *dpu_hdcp_state_name (enum dpu_hdcp_states hdcp_state); -struct dpu_hdcp_ops *dpu_dp_hdcp2p2_start (void *input); -#endif /* __DPU_HDCP_H__ */
drivers/gpu/drm/msm/dpu_hdcp_1x.c deleted +0 -1579
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Signature · 7 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ dri-devel mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/dri-devel
PATCH 8/11 dt-bindings: msm/disp: cleanup bindings for Snapdragon 845 DPU
In reply to Rajesh YadavSDM845 SoC has a MDSS top level wrapper which includes sub-blocks as dpu, dsi, dp, hdmi etc. But current DPU bindings are defined as if there is flat device hierarchy. The MDSS and DPU HW blocks were represented by single device and DSI, HDMI, DP etc. blocks are represented as separate independent devices.
This change updates the binding as tree like hierarchy where MDSS is parent device and DPU, DSI, DP and HDMI are child devices to correctly model the HW associations.
--- .../devicetree/bindings/display/msm/dpu.txt | 318 ++++++++------------- 1 file changed, 118 insertions(+), 200 deletions(-)
Documentation/devicetree/bindings/display/msm/dpu.txt +118 -200
@@ -1,206 +1,124 @@ Qualcomm Technologies, Inc. DPU KMS -Snapdragon Display Engine implements Linux DRM/KMS APIs to drive user -interface to different panel interfaces. DPU driver is the core of -display subsystem which manage all data paths to different panel interfaces. - -Required properties -- compatible: Must be "qcom,dpu-kms" -- compatible: "msm-hdmi-audio-codec-rx"; -- reg: Offset and length of the register set for the device. -- reg-names : Names to refer to register sets related to this device -- clocks: List of Phandles for clock device nodes - needed by the device. -- clock-names: List of clock names needed by the device. -- mmagic-supply: Phandle for mmagic mdss supply regulator device node. -- vdd-supply: Phandle for vdd regulator device node. -- interrupt-parent: Must be core interrupt controller. -- interrupts: Interrupt associated with MDSS. -- interrupt-controller: Mark the device node as an interrupt controller. -- #interrupt-cells: Should be one. The first cell is interrupt number. -- iommus: Specifies the SID's used by this context bank. +Description: + +Device tree bindings for MSM Mobile Display Subsytem(MDSS) that encapsulates +sub-blocks like DPU display controller, DSI and DP interfaces etc. +The DPU display controller is found in SDM845 SoC. + +MDSS: +Required properties: +- compatible: "qcom,dpu-mdss" +- reg: physical base address and length of contoller's registers. +- reg-names: register region names. The following region is required: + * "mdss_phys" +- power-domains: a power domain consumer specifier according to + Documentation/devicetree/bindings/power/power_domain.txt +- clocks: list of phandles for clock device nodes needed by the device. +- clock-names: device clock names, must be in same order as clocks property. + The following clocks are required: + * "iface" + * "bus" + * "core" +- interrupts: interrupt signal from MDSS. +- interrupt-controller: identifies the node as an interrupt controller. +- #interrupt-cells: specifies the number of cells needed to encode an interrupt + source, should be 1. +- iommus: phandle of iommu device node. +- #address-cells: number of address cells for the MDSS children. Should be 1. +- #size-cells: Should be 1. +- ranges: parent bus address space is the same as the child bus address space. Optional properties: -- clock-rate: List of clock rates in Hz. -- clock-max-rate: List of maximum clock rate in Hz that this device supports. -- qcom,platform-supply-entries: A node that lists the elements of the supply. There - can be more than one instance of this binding, - in which case the entry would be appended with - the supply entry index. - e.g. qcom,platform-supply-entry@0 - -- reg: offset and length of the register set for the device. - -- qcom,supply-name: name of the supply (vdd/vdda/vddio) - -- qcom,supply-min-voltage: minimum voltage level (uV) - -- qcom,supply-max-voltage: maximum voltage level (uV) - -- qcom,supply-enable-load: load drawn (uA) from enabled supply - -- qcom,supply-disable-load: load drawn (uA) from disabled supply - -- qcom,supply-pre-on-sleep: time to sleep (ms) before turning on - -- qcom,supply-post-on-sleep: time to sleep (ms) after turning on - -- qcom,supply-pre-off-sleep: time to sleep (ms) before turning off - -- qcom,supply-post-off-sleep: time to sleep (ms) after turning off -- qcom,dpu-dram-channels: This represents the number of channels in the - Bus memory controller. -- qcom,dpu-num-nrt-paths: Integer property represents the number of non-realtime - paths in each Bus Scaling Usecase. This value depends on - number of AXI ports that are dedicated to non-realtime VBIF - for particular chipset. - These paths must be defined after rt-paths in - "qcom,msm-bus,vectors-KBps" vector request. - -Bus Scaling Subnodes: -- qcom,dpu-reg-bus: Property to provide Bus scaling for register access for - mdss blocks. -- qcom,dpu-data-bus: Property to provide Bus scaling for data bus access for - mdss blocks. -- qcom,dpu-llcc-bus: Property to provide Bus scaling for data bus access for - mnoc to llcc. -- qcom,dpu-ebi-bus: Property to provide Bus scaling for data bus access for - llcc to ebi. - -- qcom,dpu-inline-rotator: A 2 cell property, with format of (rotator phandle, - instance id), of inline rotator device. - -Bus Scaling Data: -- qcom,msm-bus,name: String property describing client name. -- qcom,msm-bus,num-cases: This is the number of Bus Scaling use cases - defined in the vectors property. -- qcom,msm-bus,num-paths: This represents the number of paths in each - Bus Scaling Usecase. -- qcom,msm-bus,vectors-KBps: * A series of 4 cell properties, with a format - of (src, dst, ab, ib) which is defined at - Documentation/devicetree/bindings/arm/msm/msm_bus.txt - * Current values of src & dst are defined at - include/linux/msm-bus-board.h - -SMMU Subnodes: -- smmu_dpu_****: Child nodes representing dpu smmu virtual - devices - -Subnode properties: -- compatible: Compatible names used for smmu devices. - names should be: - "qcom,smmu_dpu_unsec": smmu context bank device - for unsecure dpu real time domain. - "qcom,smmu_dpu_sec": smmu context bank device - for secure dpu real time domain. - "qcom,smmu_dpu_nrt_unsec": smmu context bank device - for unsecure dpu non-real time domain. - "qcom,smmu_dpu_nrt_sec": smmu context bank device - for secure dpu non-real time domain. - - -Please refer to ../../interrupt-controller/interrupts.txt for a general -description of interrupt bindings. +- clock-frequency: list of clock frequencies sorted in the same order as the + clocks property. + +MDP: +Required properties: +- compatible: "qcom,dpu" +- reg: physical base address and length of controller's registers. +- reg-names : register region names. The following region is required: + * "mdp_phys" +- clocks: list of phandles for clock device nodes needed by the device. +- clock-names: device clock names, must be in same order as clocks property. + The following clocks are required. + * "bus" + * "iface" + * "core" + * "vsync" +- interrupt-parent: phandle to MDSS block. +- interrupts: interrupt line from DPU to MDSS. +- ports: contains the list of output ports from DPU device. These ports connect + to interfaces that are external to the DPU hardware, such as DSI, DP etc. + + Each output port contains an endpoint that describes how it is connected to an + external interface. These are described by the standard properties documented + here: + Documentation/devicetree/bindings/graph.txt + Documentation/devicetree/bindings/media/video-interfaces.txt + + Port 0 -> DPU_INTF1 (DSI1) + Port 1 -> DPU_INTF2 (DSI2) + +Optional properties: +- clock-frequency: list of clock frequencies sorted in the same order as the + clocks property. Example: - mdss_mdp: qcom,mdss_mdp@900000 { - compatible = "qcom,dpu-kms"; - reg = <0x00900000 0x90000>, - <0x009b0000 0x1040>, - <0x009b8000 0x1040>, - <0x0aeac000 0x00f0>; - reg-names = "mdp_phys", - "vbif_phys", - "vbif_nrt_phys", - "regdma_phys"; - clocks = <&clock_mmss clk_mdss_ahb_clk>, - <&clock_mmss clk_mdss_axi_clk>, - <&clock_mmss clk_mdp_clk_src>, - <&clock_mmss clk_mdss_mdp_vote_clk>, - <&clock_mmss clk_smmu_mdp_axi_clk>, - <&clock_mmss clk_mmagic_mdss_axi_clk>, - <&clock_mmss clk_mdss_vsync_clk>; - clock-names = "iface_clk", - "bus_clk", - "core_clk_src", - "core_clk", - "iommu_clk", - "mmagic_clk", - "vsync_clk"; - clock-rate = <0>, <0>, <0>; - clock-max-rate= <0 320000000 0>; - mmagic-supply = <&gdsc_mmagic_mdss>; - vdd-supply = <&gdsc_mdss>; - interrupt-parent = <&intc>; - interrupts = <0 83 0>; - interrupt-controller; - #interrupt-cells = <1>; - iommus = <&mdp_smmu 0>; - - qcom,dpu-dram-channels = <2>; - qcom,dpu-num-nrt-paths = <1>; - - qcom,msm-hdmi-audio-rx { - compatible = "qcom,msm-hdmi-audio-codec-rx"; - }; - - qcom,platform-supply-entries { - #address-cells = <1>; - #size-cells = <0>; - qcom,platform-supply-entry@0 { - reg = <0>; - qcom,supply-name = "vdd"; - qcom,supply-min-voltage = <0>; - qcom,supply-max-voltage = <0>; - qcom,supply-enable-load = <0>; - qcom,supply-disable-load = <0>; - qcom,supply-pre-on-sleep = <0>; - qcom,supply-post-on-sleep = <0>; - qcom,supply-pre-off-sleep = <0>; - qcom,supply-post-off-sleep = <0>; - }; - }; - - qcom,dpu-data-bus { - qcom,msm-bus,name = "mdss_dpu"; - qcom,msm-bus,num-cases = <3>; - qcom,msm-bus,num-paths = <3>; - qcom,msm-bus,vectors-KBps = - <22 512 0 0>, <23 512 0 0>, <25 512 0 0>, - <22 512 0 6400000>, <23 512 0 6400000>, - <25 512 0 6400000>, - <22 512 0 6400000>, <23 512 0 6400000>, - <25 512 0 6400000>; - }; - qcom,dpu-llcc-bus { - qcom,msm-bus,name = "mdss_dpu_llcc"; - qcom,msm-bus,num-cases = <3>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = - <132 770 0 0>, - <132 770 0 6400000>, - <132 770 0 6400000>; - }; - qcom,dpu-ebi-bus { - qcom,msm-bus,name = "mdss_dpu_ebi"; - qcom,msm-bus,num-cases = <3>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = - <129 512 0 0>, - <129 512 0 6400000>, - <129 512 0 6400000>; - }; - - qcom,dpu-reg-bus { - /* Reg Bus Scale Settings */ - qcom,msm-bus,name = "mdss_reg"; - qcom,msm-bus,num-cases = <4>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,active-only; - qcom,msm-bus,vectors-KBps = - <1 590 0 0>, - <1 590 0 76800>, - <1 590 0 160000>, - <1 590 0 320000>; - }; - - smmu_kms_unsec: qcom,smmu_kms_unsec_cb { - compatible = "qcom,smmu_dpu_unsec"; - iommus = <&mmss_smmu 0>; - }; - - smmu_kms_sec: qcom,smmu_kms_sec_cb { - compatible = "qcom,smmu_dpu_sec"; - iommus = <&mmss_smmu 1>; - }; - }; + + mdss: mdss@ae00000 { + compatible = "qcom,dpu-mdss"; + reg = <0xae00000 0x1000>; + reg-names = "mdss_phys"; + + power-domains = <&clock_dispcc 0>; + + clocks = <&gcc GCC_DISP_AHB_CLK>, + <&gcc GCC_DISP_AXI_CLK>, + <&clock_dispcc DISP_CC_MDSS_MDP_CLK>; + clock-names = "gcc_iface", "gcc_bus", "core_clk"; + + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + + iommus = <&apps_smmu 0>; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + + mdss_mdp: mdp@ae01000 { + compatible = "qcom,dpu"; + reg = <0x0ae01000 0x8f000>; + reg-names = "mdp_phys"; + + clocks = <&clock_dispcc DISP_CC_MDSS_AHB_CLK>, + <&clock_dispcc DISP_CC_MDSS_AXI_CLK>, + <&clock_dispcc DISP_CC_MDSS_MDP_CLK>, + <&clock_dispcc DISP_CC_MDSS_VSYNC_CLK>; + clock-names = "iface_clk", "bus_clk", "core_clk", "vsync_clk"; + + interrupt-parent = <&mdss>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dpu_intf1_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + + port@1 { + reg = <1>; + dpu_intf2_out: endpoint { + remote-endpoint = <&dsi1_in>; + }; + }; + }; + }; + };
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