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ARM: digicolor: add pinctrl support

PATCH New Baruch Siach 2 participants 6 messages Oct 13, 2015 – Oct 15, 2015

Subsystems (4)
Device tree bindings Arm (32-bit) Arm sub-architectures Arm/conexant digicolor machine support
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Baruch Siach

author maintainer
#0 lore raw

cover ARM: digicolor: add pinctrl support

Hi ARM SoC maintainers,

This series enables the Conexant Digicolor CX92755 pinctrl driver. The driver itself was merged during the v4.3 cycle in commit 38b0e5071eca (pinctrl: driver for Conexant Digicolor CX92755 pin mapping)

Please consider for v4.4.

Thanks,
baruch

Baruch Siach (3):
ARM: digicolor: select pinctrl/gpio driver
ARM: digicolor: add pinctrl module device node
ARM: digicolor: dts: add uart pin configuration

 arch/arm/boot/dts/cx92755.dtsi        | 7 +++++++
 arch/arm/boot/dts/cx92755_equinox.dts | 9 +++++++++
 arch/arm/mach-digicolor/Kconfig       | 3 +++
 3 files changed, 19 insertions(+)
Signature · 1 line
2.6.1
author maintainer
#1 lore raw

PATCH 1/3 ARM: digicolor: select pinctrl/gpio driver

Signed-off-by Baruch Siach <[email protected]>
---
 arch/arm/mach-digicolor/Kconfig | 3 +++
 1 file changed, 3 insertions(+)
arch/arm/mach-digicolor/Kconfig +3 -0
index 4f36d8d2bc57..fc65b0f1db48 100644
@@ -1,7 +1,10 @@
 config ARCH_DIGICOLOR
 	bool "Conexant Digicolor SoC Support"
 	depends on ARCH_MULTI_V7
+	select ARCH_REQUIRE_GPIOLIB
 	select CLKSRC_MMIO
 	select DIGICOLOR_TIMER
 	select GENERIC_IRQ_CHIP
 	select MFD_SYSCON
+	select PINCTRL
+	select PINCTRL_DIGICOLOR
Signature · 1 line
2.6.1
Applied
#2 lore raw

PATCH 1/3 ARM: digicolor: select pinctrl/gpio driver

Quoted 11 lines · On Tuesday 13 October 2015 14:28:02 Baruch Siach wrote:
Signed-off-by Baruch Siach <[email protected]>
---
 arch/arm/mach-digicolor/Kconfig | 3 +++
 1 file changed, 3 insertions(+)
arch/arm/mach-digicolor/Kconfig +0 -0
index 4f36d8d2bc57..fc65b0f1db48 100644

arch/arm/mach-digicolor/Kconfig line 10

Quoted 10 lines
arch/arm/mach-digicolor/Kconfig +3 -0
@@ -1,7 +1,10 @@
 config ARCH_DIGICOLOR
 	bool "Conexant Digicolor SoC Support"
 	depends on ARCH_MULTI_V7
+	select ARCH_REQUIRE_GPIOLIB
 	select CLKSRC_MMIO
 	select DIGICOLOR_TIMER
 	select GENERIC_IRQ_CHIP
 	select MFD_SYSCON
+	select PINCTRL
+	select PINCTRL_DIGICOLOR

Applied to next/soc, but please add a patch description even for trivial patches like this in the future. A good changelog text here would explain why this wasn't done in the past but is necessary now.

Thanks,

Arnd

author maintainer
#3 lore raw

PATCH 2/3 ARM: digicolor: add pinctrl module device node

In reply to Baruch Siach
Signed-off-by Baruch Siach <[email protected]>
---
 arch/arm/boot/dts/cx92755.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
arch/arm/boot/dts/cx92755.dtsi +7 -0
index df4c6f1f93f9..a5a23c376418 100644
@@ -95,6 +95,13 @@
 		timeout-sec = <15>;
 	};
 
+	pinctrl: pinctrl at f0000e20 {
+		compatible = "cnxt,cx92755-pinctrl";
+		reg = <0xf0000e20 0x100>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
 	uc_regs: syscon at f00003a0 {
 		compatible = "cnxt,cx92755-uc", "syscon";
 		reg = <0xf00003a0 0x10>;
Signature · 1 line
2.6.1
author maintainer
#4 lore raw

PATCH 3/3 ARM: digicolor: dts: add uart pin configuration

In reply to Baruch Siach
Signed-off-by Baruch Siach <[email protected]>
---
 arch/arm/boot/dts/cx92755_equinox.dts | 9 +++++++++
 1 file changed, 9 insertions(+)
arch/arm/boot/dts/cx92755_equinox.dts +9 -0
index 5da00806c41e..026f556c8c50 100644
@@ -70,8 +70,17 @@
 
 &uart0 {
 	status = "okay";
+	pinctrl-0 = <&uart0_default>;
+	pinctrl-names = "default";
 };
 
 &i2c {
 	status = "okay";
 };
+
+&pinctrl {
+	uart0_default: uart0_active {
+		pins = "GP_O0", "GP_O1";
+		function = "client_b";
+	};
+};
Signature · 1 line
2.6.1
#5 lore raw

PATCH 3/3 ARM: digicolor: dts: add uart pin configuration

Quoted 6 lines · On Tuesday 13 October 2015 14:28:04 Baruch Siach wrote:
Signed-off-by Baruch Siach <[email protected]>
---
 arch/arm/boot/dts/cx92755_equinox.dts | 9 +++++++++
 1 file changed, 9 insertions(+)

Patches 2 and 3 applied to next/dt, thanks!

Arnd