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arm64: dts: hisilicon: Correct indentation

PATCH Applied Krzysztof Kozlowski 2 participants 2 messages Jul 6 – Jul 7

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Device tree bindings Arm/HiSilicon SoC support
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Krzysztof Kozlowski

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#0 lore raw

PATCH 1/1 arm64: dts: hisilicon: Correct indentation

Correct spaces or mix of tabs+spaces into proper tab-indented lines. No functional impact (same DTB).

Signed-off-by Krzysztof Kozlowski <[email protected]>
---
 arch/arm64/boot/dts/hisilicon/hip05.dtsi | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)
arch/arm64/boot/dts/hisilicon/hip05.dtsi +7 -7
index d0912ca5f237..2d376b3d30dd 100644
@@ -236,13 +236,13 @@ cluster3_l2: l2-cache3 {
 
 	gic: interrupt-controller@8d000000 {
 		compatible = "arm,gic-v3";
-                #interrupt-cells = <3>;
-                #address-cells = <2>;
-                #size-cells = <2>;
-                ranges;
-                interrupt-controller;
-                #redistributor-regions = <1>;
-                redistributor-stride = <0x0 0x30000>;
+		#interrupt-cells = <3>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		interrupt-controller;
+		#redistributor-regions = <1>;
+		redistributor-stride = <0x0 0x30000>;
 		reg = <0x0 0x8d000000 0 0x10000>,	/* GICD */
 		      <0x0 0x8d100000 0 0x300000>,	/* GICR */
 		      <0x0 0xfe000000 0 0x10000>,	/* GICC */
Signature · 1 line
2.53.0
maintainer Applied
#1 lore raw

Hi Krzysztof,

Quoted 24 lines · Krzysztof Kozlowski

Correct spaces or mix of tabs+spaces into proper tab-indented lines. No functional impact (same DTB).

Signed-off-by Krzysztof Kozlowski <[email protected]>
---
 arch/arm64/boot/dts/hisilicon/hip05.dtsi | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)
arch/arm64/boot/dts/hisilicon/hip05.dtsi +0 -7
index d0912ca5f237..2d376b3d30dd 100644
@@ -236,13 +236,13 @@ cluster3_l2: l2-cache3 {
 
 	gic: interrupt-controller@8d000000 {
 		compatible = "arm,gic-v3";
-                #interrupt-cells = <3>;
-                #address-cells = <2>;
-                #size-cells = <2>;
-                ranges;
-                interrupt-controller;
-                #redistributor-regions = <1>;
-                redistributor-stride = <0x0 0x30000>;

arch/arm64/boot/dts/hisilicon/hip05.dtsi cluster3_l2: l2-cache3 { · line 248

Quoted 10 lines
arch/arm64/boot/dts/hisilicon/hip05.dtsi +7 -0
+		#interrupt-cells = <3>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		interrupt-controller;
+		#redistributor-regions = <1>;
+		redistributor-stride = <0x0 0x30000>;
 		reg = <0x0 0x8d000000 0 0x10000>,	/* GICD */
 		      <0x0 0x8d100000 0 0x300000>,	/* GICR */
 		      <0x0 0xfe000000 0 0x10000>,	/* GICC */

Applied to the HiSilicon arm64 dt tree.
Thanks!

Best Regards,
Wei