ARM: dts: r8a7794: Correct clock of DU1
Subsystems (2)
cover ARM: dts: r8a7794: Correct clock of DU1
Hi Simon, Magnus,
In the DTS files for the R-Car E2 SoC and for development boards based on this SoC, the second channel of the display unit incorrectly points to the module clock for the first channel.
This patch series adds the missing module clock for the second channel, and refers to it from the DU device node in the various DTS files.
Untested due to lack of hardware.
Geert Uytterhoeven (4):
ARM: dts: r8a7794: Add DU1 clock to device tree
ARM: dts: r8a7794: Correct clock of DU1
ARM: dts: alt: Correct clock of DU1
ARM: dts: silk: Correct clock of DU1
arch/arm/boot/dts/r8a7794-alt.dts | 2 +- arch/arm/boot/dts/r8a7794-silk.dts | 2 +- arch/arm/boot/dts/r8a7794.dtsi | 10 ++++++---- include/dt-bindings/clock/r8a7794-clock.h | 1 + 4 files changed, 9 insertions(+), 6 deletions(-)
Signature · 12 lines
2.7.4
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus TorvaldsPATCH 1/4 ARM: dts: r8a7794: Add DU1 clock to device tree
Add the missing module clock for the second channel of the display unit.
--- arch/arm/boot/dts/r8a7794.dtsi | 8 +++++--- include/dt-bindings/clock/r8a7794-clock.h | 1 + 2 files changed, 6 insertions(+), 3 deletions(-)
arch/arm/boot/dts/r8a7794.dtsi +5 -3
@@ -1270,19 +1270,21 @@ clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, - <&zx_clk>; + <&zx_clk>, <&zx_clk>; #clock-cells = <1>; clock-indices = < R8A7794_CLK_EHCI R8A7794_CLK_HSUSB R8A7794_CLK_HSCIF2 R8A7794_CLK_SCIF5 R8A7794_CLK_SCIF4 R8A7794_CLK_HSCIF1 R8A7794_CLK_HSCIF0 R8A7794_CLK_SCIF3 R8A7794_CLK_SCIF2 R8A7794_CLK_SCIF1 - R8A7794_CLK_SCIF0 R8A7794_CLK_DU0 + R8A7794_CLK_SCIF0 + R8A7794_CLK_DU1 R8A7794_CLK_DU0 >; clock-output-names = "ehci", "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0", - "scif3", "scif2", "scif1", "scif0", "du0"; + "scif3", "scif2", "scif1", "scif0", + "du1", "du0"; }; mstp8_clks: mstp8_clks at e6150990 { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
include/dt-bindings/clock/r8a7794-clock.h +1 -0
@@ -82,6 +82,7 @@#define R8A7794_CLK_SCIF2 19#define R8A7794_CLK_SCIF1 20#define R8A7794_CLK_SCIF0 21 +#define R8A7794_CLK_DU1 23#define R8A7794_CLK_DU0 24/* MSTP8 */
Signature · 1 line
2.7.4
PATCH 2/4 ARM: dts: r8a7794: Correct clock of DU1
In reply to Geert UytterhoevenThe second channel of the display unit uses a different module clock than the first channel.
--- arch/arm/boot/dts/r8a7794.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/r8a7794.dtsi +1 -1
@@ -925,7 +925,7 @@ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp7_clks R8A7794_CLK_DU0>, - <&mstp7_clks R8A7794_CLK_DU0>; + <&mstp7_clks R8A7794_CLK_DU1>; clock-names = "du.0", "du.1"; status = "disabled";
Signature · 1 line
2.7.4
PATCH 3/4 ARM: dts: alt: Correct clock of DU1
In reply to Geert UytterhoevenThe second channel of the display unit uses a different module clock than the first channel.
--- arch/arm/boot/dts/r8a7794-alt.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/r8a7794-alt.dts +1 -1
@@ -168,7 +168,7 @@ status = "okay"; clocks = <&mstp7_clks R8A7794_CLK_DU0>, - <&mstp7_clks R8A7794_CLK_DU0>, + <&mstp7_clks R8A7794_CLK_DU1>, <&x13_clk>, <&x2_clk>; clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
Signature · 1 line
2.7.4
PATCH 4/4 ARM: dts: silk: Correct clock of DU1
In reply to Geert UytterhoevenThe second channel of the display unit uses a different module clock than the first channel.
--- arch/arm/boot/dts/r8a7794-silk.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/r8a7794-silk.dts +1 -1
@@ -424,7 +424,7 @@ status = "okay"; clocks = <&mstp7_clks R8A7794_CLK_DU0>, - <&mstp7_clks R8A7794_CLK_DU0>, + <&mstp7_clks R8A7794_CLK_DU1>, <&x2_clk>, <&x3_clk>; clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
Signature · 1 line
2.7.4
cover ARM: dts: r8a7794: Correct clock of DU1
In reply to Geert UytterhoevenHi Geert,
Thank you for the patches.
Quoted 10 lines · On Tuesday 28 Mar 2017 12:45:29 Geert Uytterhoeven wrote:
Hi Simon, Magnus,
In the DTS files for the R-Car E2 SoC and for development boards based on this SoC, the second channel of the display unit incorrectly points to the module clock for the first channel.
This patch series adds the missing module clock for the second channel, and refers to it from the DU device node in the various DTS files.
Untested due to lack of hardware.
The patches look good to me.
Quoted 11 lines
Geert Uytterhoeven (4):
ARM: dts: r8a7794: Add DU1 clock to device tree
ARM: dts: r8a7794: Correct clock of DU1
ARM: dts: alt: Correct clock of DU1
ARM: dts: silk: Correct clock of DU1arch/arm/boot/dts/r8a7794-alt.dts | 2 +- arch/arm/boot/dts/r8a7794-silk.dts | 2 +- arch/arm/boot/dts/r8a7794.dtsi | 10 ++++++---- include/dt-bindings/clock/r8a7794-clock.h | 1 + 4 files changed, 9 insertions(+), 6 deletions(-)
Signature · 3 lines
Regards, Laurent Pinchart
cover ARM: dts: r8a7794: Correct clock of DU1
Quoted 11 lines · Laurent Pinchart
Hi Geert,
Thank you for the patches.
Quoted 6 lines · On Tuesday 28 Mar 2017 12:45:29 Geert Uytterhoeven wrote:
Hi Simon, Magnus,
In the DTS files for the R-Car E2 SoC and for development boards based on this SoC, the second channel of the display unit incorrectly points to the module clock for the first channel.
Quoted 8 lines
Quoted 4 lines
This patch series adds the missing module clock for the second channel, and refers to it from the DU device node in the various DTS files.
Untested due to lack of hardware.
The patches look good to me.
Acked-by Laurent Pinchart <[email protected]>
Thanks, I have queued these up.