ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges
PATCH v2 1/2 ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges
Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs.
---
Changes in v2:
- set status to disabled, so there are no accidental users of the bridges
arch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)
arch/arm/boot/dts/socfpga.dtsi +14 -0
@@ -543,6 +543,20 @@ clocks = <&l4_main_clk>; }; + fpga_bridge2: fpga-bridge at ff600000 { + compatible = "altr,socfpga-fpga2hps-bridge"; + reg = <0xff600000 0x100000>; + resets = <&rst FPGA2HPS_RESET>; + clocks = <&l4_main_clk>; + status = "disabled"; + }; + + fpga_bridge3: fpga-bridge at ffc25080 { + compatible = "altr,socfpga-fpga2sdram-bridge"; + reg = <0xffc25080 0x4>; + status = "disabled"; + }; + fpgamgr0: fpgamgr at ff706000 { compatible = "altr,socfpga-fpga-mgr"; reg = <0xff706000 0x1000
Signature · 1 line
2.11.0
PATCH v2 1/2 ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges
Hi!
Quoted 37 lines · Steffen Trumtrar
Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs.
Signed-off-by Steffen Trumtrar <[email protected]>---
Changes in v2:
- set status to disabled, so there are no accidental users of the bridgesarch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)arch/arm/boot/dts/socfpga.dtsi +14
-0@@ -543,6 +543,20 @@ clocks = <&l4_main_clk>; }; + fpga_bridge2: fpga-bridge at ff600000 { + compatible = "altr,socfpga-fpga2hps-bridge"; + reg = <0xff600000 0x100000>; + resets = <&rst FPGA2HPS_RESET>; + clocks = <&l4_main_clk>; + status = "disabled"; + }; + + fpga_bridge3: fpga-bridge at ffc25080 { + compatible = "altr,socfpga-fpga2sdram-bridge"; + reg = <0xffc25080 0x4>; + status = "disabled"; + }; + fpgamgr0: fpgamgr at ff706000 {
arch/arm/boot/dts/socfpga.dtsi line 562
Quoted 2 lines
arch/arm/boot/dts/socfpga.dtsi +0
-0compatible = "altr,socfpga-fpga-mgr"; reg = <0xff706000 0x1000
Any opinion on this? There shouldn't be any accidental use of the bridges now with status=disabled.
Best regards,
Steffen
Signature · 8 lines
Pengutronix e.K. | Steffen Trumtrar | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany| Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555|
PATCH v2 1/2 ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges
Quoted 40 lines · Steffen Trumtrar
Hi!
Quoted 34 lines · Steffen Trumtrar
Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs.
Signed-off-by Steffen Trumtrar <[email protected]>---
Changes in v2:
- set status to disabled, so there are no accidental users of the bridgesarch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)arch/arm/boot/dts/socfpga.dtsi +12
-0@@ -543,6 +543,20 @@ clocks = <&l4_main_clk>; }; + fpga_bridge2: fpga-bridge at ff600000 { + compatible = "altr,socfpga-fpga2hps-bridge"; + reg = <0xff600000 0x100000>; + resets = <&rst FPGA2HPS_RESET>; + clocks = <&l4_main_clk>; + status = "disabled"; + }; + + fpga_bridge3: fpga-bridge at ffc25080 { + compatible = "altr,socfpga-fpga2sdram-bridge"; + reg = <0xffc25080 0x4>; + status = "disabled";
Quoted 8 lines
Quoted 5 lines
arch/arm/boot/dts/socfpga.dtsi +2
-0+ }; + fpgamgr0: fpgamgr at ff706000 {compatible = "altr,socfpga-fpga-mgr"; reg = <0xff706000 0x1000Any opinion on this? There shouldn't be any accidental use of the bridges now with status=disabled.
Hi Steffen,
Do you have a use case you need this for?
I don't mind leaving it that way it is and letting people who are actually enabling the bridges in their designs add the whole node.
Alan
Quoted 14 lines
Best regards,
Steffen--
Pengutronix e.K. | Steffen Trumtrar
|
Industrial Linux Solutions |
http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany| Phone:
+49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax:
+49-5121-206917-5555|
PATCH v2 1/2 ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges
Hi!
Quoted 53 lines · Alan Tull
Quoted 42 lines · Steffen Trumtrar
Hi!
Quoted 36 lines · Steffen Trumtrar
Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs.
Signed-off-by Steffen Trumtrar <[email protected]>---
Changes in v2:
- set status to disabled, so there are no accidental users of
the bridgesarch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)arch/arm/boot/dts/socfpga.dtsi +13
-0@@ -543,6 +543,20 @@ clocks = <&l4_main_clk>; }; + fpga_bridge2: fpga-bridge at ff600000 { + compatible = "altr,socfpga-fpga2hps-bridge"; + reg = <0xff600000 0x100000>; + resets = <&rst FPGA2HPS_RESET>; + clocks = <&l4_main_clk>; + status = "disabled"; + }; + + fpga_bridge3: fpga-bridge at ffc25080 { + compatible = "altr,socfpga-fpga2sdram-bridge"; + reg = <0xffc25080 0x4>; + status = "disabled"; + };Quoted 8 lines
Quoted 4 lines
arch/arm/boot/dts/socfpga.dtsi +1
-0+ fpgamgr0: fpgamgr at ff706000 {compatible = "altr,socfpga-fpga-mgr"; reg = <0xff706000 0x1000Any opinion on this? There shouldn't be any accidental use of the
bridges now with status=disabled.
Quoted 4 lines
Hi Steffen,
Do you have a use case you need this for?
Yes, of course. I think all our SoCFPGA customers use these bridges.
Quoted 5 lines
I don't mind leaving it that way it is and letting people who are
actually enabling the bridges in their designs add the whole node.
Why do you think, that these bridges are different from the other ones?
Or other IP blocks on the SoCFPGA even?
This is the socfpga.dtsi file, it describes the hardware common to all
Cyclone5 SoCs. All SoCs have these bridges, so why not add it?
Best regards,
Steffen
Signature · 8 lines
Pengutronix e.K. | Steffen Trumtrar | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany| Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555|
PATCH v2 1/2 ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges
Hi!
Quoted 71 lines · Steffen Trumtrar
Hi!
Quoted 53 lines · Alan Tull
Quoted 42 lines · Steffen Trumtrar
Hi!
Quoted 36 lines · Steffen Trumtrar
Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs.
Signed-off-by Steffen Trumtrar <[email protected]>---
Changes in v2:
- set status to disabled, so there are no accidental usersQuoted 1 line
of
the bridges
arch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)arch/arm/boot/dts/socfpga.dtsi +13
-0@@ -543,6 +543,20 @@ clocks = <&l4_main_clk>; }; + fpga_bridge2: fpga-bridge at ff600000 { + compatible = "altr,socfpga-fpga2hps-bridge"; + reg = <0xff600000 0x100000>; + resets = <&rst FPGA2HPS_RESET>; + clocks = <&l4_main_clk>; + status = "disabled"; + }; + + fpga_bridge3: fpga-bridge at ffc25080 { + compatible = "altr,socfpga-fpga2sdram-bridge"; + reg = <0xffc25080 0x4>; + status = "disabled"; + };Quoted 8 lines
Quoted 4 lines
arch/arm/boot/dts/socfpga.dtsi +1
-0+ fpgamgr0: fpgamgr at ff706000 {compatible = "altr,socfpga-fpga-mgr"; reg = <0xff706000 0x1000Any opinion on this? There shouldn't be any accidental use of the
bridges now with status=disabled.Quoted 4 lines
Hi Steffen,
Do you have a use case you need this for?
Yes, of course. I think all our SoCFPGA customers use these bridges.
Quoted 5 lines
I don't mind leaving it that way it is and letting people who are
actually enabling the bridges in their designs add the whole node.
Quoted 7 lines
Why do you think, that these bridges are different from the other ones?
Or other IP blocks on the SoCFPGA even?
This is thesocfpga.dtsifile, it describes the hardware common to all
Cyclone5 SoCs. All SoCs have these bridges, so why not add it?
Any opinion on this? I still don't see why these bridges are different from the other IP cores.
Best regards,
Steffen
Signature · 8 lines
Pengutronix e.K. | Steffen Trumtrar | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany| Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555|
PATCH v2 2/2 ARM: dts: socfgpa: set bridges status to disabled
In reply to Steffen TrumtrarThe hps-to-fpga bridges can't be used, when the FPGA is not programmed. Set the default state to disabled and leave enabling them to the board-specific dts files.
Although this changes behavior, there are no in-tree users of the bridges, so this won't break anything.
--- arch/arm/boot/dts/socfpga.dtsi | 2 ++ 1 file changed, 2 insertions(+)
arch/arm/boot/dts/socfpga.dtsi +2 -0
@@ -534,6 +534,7 @@ reg = <0xff400000 0x100000>; resets = <&rst LWHPS2FPGA_RESET>; clocks = <&l4_main_clk>; + status = "disabled"; }; fpga_bridge1: fpga_bridge at ff500000 {
@@ -541,6 +542,7 @@ reg = <0xff500000 0x10000>; resets = <&rst HPS2FPGA_RESET>; clocks = <&l4_main_clk>; + status = "disabled"; }; fpga_bridge2: fpga-bridge at ff600000 {
Signature · 1 line
2.11.0