Summit support for 2.5 - now with subarch! [2/5]
PATCH 1/1 Summit support for 2.5 - now with subarch! [2/5]
This puts the DFR (desination format register) value into a #define, and calculates the LDR (logical desitination register) correctly dependant on platform. Similarly for TARGET_CPUS.
arch/i386/kernel/apic.c +2 -4
@@ -329,15 +329,13 @@ void __init setup_local_APIC (void)* Put the APIC into flat delivery mode. * Must be "all ones" explicitly for 82489DX. */ -apic_write_around (APIC_DFR ,0xffffffff ); +apic_write_around (APIC_DFR ,APIC_DFR_VALUE );/* * Set up the logical destination ID. */ value =apic_read (APIC_LDR ); - value &= ~APIC_LDR_MASK ; - value |= (1 <<(smp_processor_id ()+24 )); -apic_write_around (APIC_LDR , value); +apic_write_around (APIC_LDR ,calculate_ldr (value)); }/*
arch/i386/mach-generic/mach_apic.h +16 -0
@@ -1,4 +1,20 @@#ifndef __ASM_MACH_APIC_H#define __ASM_MACH_APIC_H +static inline unsigned long calculate_ldr (unsigned long old) +{ +unsigned long id; + + id =1UL <<smp_processor_id (); +return ((old & ~APIC_LDR_MASK ) |SET_APIC_LOGICAL_ID (id)); +} + +#define APIC_DFR_VALUE (APIC_DFR_FLAT) + +#ifdef CONFIG_SMP +#define TARGET_CPUS (clustered_apic_mode ? 0xf : cpu_online_map) +#else +#define TARGET_CPUS 0x01 +#endif +#endif /* __ASM_MACH_APIC_H */
arch/i386/mach-summit/mach_apic.h +22 -0
@@ -1,4 +1,26 @@#ifndef __ASM_MACH_APIC_H#define __ASM_MACH_APIC_H +extern int x86_summit; + +#define XAPIC_DEST_CPUS_MASK 0x0Fu +#define XAPIC_DEST_CLUSTER_MASK 0xF0u + +#define xapic_phys_to_log_apicid (phys_apic) ( (1ul << ((phys_apic) & 0x3)) |\ + ((phys_apic) & XAPIC_DEST_CLUSTER_MASK) ) + +static inline unsigned long calculate_ldr (unsigned long old) +{ +unsigned long id; + +if (x86_summit) + id =xapic_phys_to_log_apicid (hard_smp_processor_id ()); +else + id =1UL <<smp_processor_id (); +return ((old & ~APIC_LDR_MASK ) |SET_APIC_LOGICAL_ID (id)); +} + +#define APIC_DFR_VALUE (x86_summit ? APIC_DFR_CLUSTER : APIC_DFR_FLAT) +#define TARGET_CPUS (x86_summit ? XAPIC_DEST_CPUS_MASK : cpu_online_map) +#endif /* __ASM_MACH_APIC_H */
include/asm-i386/apicdef.h +2 -0
@@ -32,6 +32,8 @@#define SET_APIC_LOGICAL_ID (x) (((x)<<24))#define APIC_ALL_CPUS 0xFF#define APIC_DFR 0xE0 +#define APIC_DFR_CLUSTER 0x0FFFFFFFul +#define APIC_DFR_FLAT 0xFFFFFFFFul#define APIC_SPIV 0xF0#define APIC_SPIV_FOCUS_DISABLED (1<<9)#define APIC_SPIV_APIC_ENABLED (1<<8)
include/asm-i386/smp.h +3 -10
@@ -21,17 +21,10 @@#endif #endif -#ifdef CONFIG_SMP -# ifdef CONFIG_CLUSTERED_APIC -# define TARGET_CPUS 0xf/* all CPUs in *THIS* quad */ -# define INT_DELIVERY_MODE 0/* physical delivery on LOCAL quad */ -# else -# define TARGET_CPUS cpu_online_map -# define INT_DELIVERY_MODE 1/* logical delivery broadcast to all procs */ -# endif +#ifdef CONFIG_CLUSTERED_APIC +#define INT_DELIVERY_MODE 0/* physical delivery on LOCAL quad */ #else -# define INT_DELIVERY_MODE 1/* logical delivery */ -# define TARGET_CPUS 0x01 +#define INT_DELIVERY_MODE 1/* logical delivery broadcast to all procs */ #endif #ifndef clustered_apic_mode