arm64: dts: ti: am62: Add USB support for k3-am62p
Subsystems (3)
v4 cover arm64: dts: ti: am62: Add USB support for k3-am62p
Hi,
This series first adds device nodes for USB0_PHY_CTRL and USB1_PHY_CTRL in the wkup_conf node and fixus up the USB nodes to use the newly added nodes.
Then it adds USB support for AM62P SoC and AM62P5-SK board.
In v4, we drop the 2 new patches that were added in v3 to add the missing PHY2 register space to the USB controller wrapper node.
Changelog in each patch.
cheers,
-roger
Roger Quadros (3):
dt-bindings: mfd: syscon: Add ti,am62-usb-phy-ctrl compatible
arm64: dts: ti: k3-am62/a: use sub-node for USB_PHY_CTRL registers
arm64: dts: ti: k3-am62p: add the USB sub-system
.../devicetree/bindings/mfd/syscon.yaml | 1 + arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 4 +- arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 10 +++ arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 4 +- arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 10 +++ arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 46 +++++++++++++ arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi | 10 +++ arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 67 +++++++++++++++++++ 8 files changed, 148 insertions(+), 4 deletions(-)
base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d
Signature · 1 line
2.34.1
PATCH v4 1/3 dt-bindings: mfd: syscon: Add ti,am62-usb-phy-ctrl compatible
Add the compatible for TI AM62 USB PHY Control register. This register is found in the TI AM62 WKUP_CTRL_MMR0 space [1]. It is used to indicate the USB PHY PLL reference clock rate and core voltage level to the USB controller.
[1] - https://www.ti.com/lit/pdf/spruiv7
---
Notes:
Changelog:
v4 - no change. Added Rob's Acked-by
v3 - add compatibles in alphabetical order
https://lore.kernel.org/all/[email protected]/
v2 - New patch
Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/mfd/syscon.yaml +1 -0
@@ -72,6 +72,7 @@ properties: - rockchip,rk3588-qos - rockchip,rv1126-qos - starfive,jh7100-sysmain + - ti,am62-usb-phy-ctrl - ti,am654-dss-oldi-io-ctrl - const: syscon
Signature · 1 line
2.34.1
Vignesh Raghavendra
maintainerRe: [PATCH v4 1/3] dt-bindings: mfd: syscon: Add ti,am62-usb-phy-ctrl compatible
Hi Roger,
Documentation/devicetree/bindings/mfd/syscon.yaml
Quoted 25 lines · Roger Quadros
Add the compatible for TI AM62 USB PHY Control register. This register is found in the TI AM62
WKUP_CTRL_MMR0space [1]. It is used to indicate the USB PHY PLL reference clock rate and core voltage level to the USB controller.[1] - https://www.ti.com/lit/pdf/spruiv7
Signed-off-by Roger Quadros <[email protected]>Acked-by Rob Herring <[email protected]>---
Notes:
Changelog:v4 - no change. Added Rob's Acked-by
v3 - add compatibles in alphabetical order
https://lore.kernel.org/all/[email protected]/v2 - New patch
Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + 1 file changed, 1 insertion(+)Documentation/devicetree/bindings/mfd/syscon.yaml +0
-0
You don't have right maintainer in CC for this file.
Quoted 11 lines
index
084b5c2a2a3c..9437705af92f100644Documentation/devicetree/bindings/mfd/syscon.yaml +1
-0@@ -72,6 +72,7 @@ properties: - rockchip,rk3588-qos - rockchip,rv1126-qos - starfive,jh7100-sysmain + - ti,am62-usb-phy-ctrl - ti,am654-dss-oldi-io-ctrl - const: syscon
Signature · 2 lines
Regards Vignesh
Re: [PATCH v4 1/3] dt-bindings: mfd: syscon: Add ti,am62-usb-phy-ctrl compatible
Hi Vignesh,
Quoted 22 lines · Vignesh Raghavendra
Hi Roger,
Quoted 19 lines · Roger Quadros
Add the compatible for TI AM62 USB PHY Control register. This register is found in the TI AM62
WKUP_CTRL_MMR0space [1]. It is used to indicate the USB PHY PLL reference clock rate and core voltage level to the USB controller.[1] - https://www.ti.com/lit/pdf/spruiv7
Signed-off-by Roger Quadros <[email protected]>Acked-by Rob Herring <[email protected]>---
Notes:
Changelog:v4 - no change. Added Rob's Acked-by
v3 - add compatibles in alphabetical order
https://lore.kernel.org/all/[email protected]/
Quoted 8 lines
Documentation/devicetree/bindings/mfd/syscon.yaml
Quoted 6 lines
v2 - New patch
Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + 1 file changed, 1 insertion(+)Documentation/devicetree/bindings/mfd/syscon.yaml +0
-0You don't have right maintainer in CC for this file.
I'll resend this series with Acks and updated CC list.
Quoted 13 lines
Quoted 12 lines
index
084b5c2a2a3c..9437705af92f100644Documentation/devicetree/bindings/mfd/syscon.yaml +1
-0@@ -72,6 +72,7 @@ properties: - rockchip,rk3588-qos - rockchip,rv1126-qos - starfive,jh7100-sysmain + - ti,am62-usb-phy-ctrl - ti,am654-dss-oldi-io-ctrl - const: syscon
Signature · 2 lines
cheers, -roger
PATCH v4 2/3 arm64: dts: ti: k3-am62/a: use sub-node for USB_PHY_CTRL registers
In reply to Roger QuadrosExposing the entire CTRL_MMR space to syscon is not a good idea. Add sub-nodes for USB0_PHY_CTRL and USB1_PHY_CTRL and use them in the USB0/USB1 nodes.
---
Notes:
Changelog:
v4 - no change. Added Andrew's Reviewed-by
v3 - no change
https://lore.kernel.org/all/[email protected]/
v2:
- moved am62p changes to next patch
- use new compatible for USB PHY CTRL node
arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 4 ++-- arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 10 ++++++++++ arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 4 ++-- arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 10 ++++++++++ 4 files changed, 24 insertions(+), 4 deletions(-)
arch/arm64/boot/dts/ti/k3-am62-main.dtsi +2 -2
@@ -625,7 +625,7 @@ usbss0: dwc3-usb@f900000 { reg = <0x00 0x0f900000 0x00 0x800>; clocks = <&k3_clks 161 3>; clock-names = "ref"; - ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>; + ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>; #address-cells = <2>; #size-cells = <2>; power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
@@ -648,7 +648,7 @@ usbss1: dwc3-usb@f910000 { reg = <0x00 0x0f910000 0x00 0x800>; clocks = <&k3_clks 162 3>; clock-names = "ref"; - ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>; + ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>; #address-cells = <2>; #size-cells = <2>; power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi +10 -0
@@ -19,6 +19,16 @@ chipid: chipid@14 { compatible = "ti,am654-chipid"; reg = <0x14 0x4>; }; + + usb0_phy_ctrl: syscon@4008 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4008 0x4>; + }; + + usb1_phy_ctrl: syscon@4018 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4018 0x4>; + }; }; wkup_uart0: serial@2b300000 {
arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +2 -2
@@ -566,7 +566,7 @@ usbss0: dwc3-usb@f900000 { reg = <0x00 0x0f900000 0x00 0x800>; clocks = <&k3_clks 161 3>; clock-names = "ref"; - ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>; + ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>; #address-cells = <2>; #size-cells = <2>; power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
@@ -589,7 +589,7 @@ usbss1: dwc3-usb@f910000 { reg = <0x00 0x0f910000 0x00 0x800>; clocks = <&k3_clks 162 3>; clock-names = "ref"; - ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>; + ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>; #address-cells = <2>; #size-cells = <2>; power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi +10 -0
@@ -17,6 +17,16 @@ chipid: chipid@14 { compatible = "ti,am654-chipid"; reg = <0x14 0x4>; }; + + usb0_phy_ctrl: syscon@4008 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4008 0x4>; + }; + + usb1_phy_ctrl: syscon@4018 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4018 0x4>; + }; }; wkup_uart0: serial@2b300000 {
Signature · 1 line
2.34.1
PATCH v4 3/3 arm64: dts: ti: k3-am62p: add the USB sub-system
In reply to Roger QuadrosThere are two USB instances available on the am62p5 starter kit. Include and enable them for use on the board.
---
Notes:
Changelog:
v4 - no change
v3 - no change
https://lore.kernel.org/all/[email protected]/
v2:
- added USB PHY CTRL node changes here
- changed USB wrapper node names to usb@
- changed Type-C chip node name to usb-power-control@
arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 46 ++++++++++++++ arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi | 10 +++ arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 67 +++++++++++++++++++++ 3 files changed, 123 insertions(+)
arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +46 -0
@@ -560,6 +560,52 @@ sdhci2: mmc@fa20000 { status = "disabled"; }; + usbss0: usb@f900000 { + compatible = "ti,am62-usb"; + reg = <0x00 0x0f900000 0x00 0x800>; + clocks = <&k3_clks 161 3>; + clock-names = "ref"; + ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>; + #address-cells = <2>; + #size-cells = <2>; + power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>; + ranges; + status = "disabled"; + + usb0: usb@31000000 { + compatible = "snps,dwc3"; + reg = <0x00 0x31000000 0x00 0x50000>; + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */ + <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */ + interrupt-names = "host", "peripheral"; + maximum-speed = "high-speed"; + dr_mode = "otg"; + }; + }; + + usbss1: usb@f910000 { + compatible = "ti,am62-usb"; + reg = <0x00 0x0f910000 0x00 0x800>; + clocks = <&k3_clks 162 3>; + clock-names = "ref"; + ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>; + #address-cells = <2>; + #size-cells = <2>; + power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>; + ranges; + status = "disabled"; + + usb1: usb@31100000 { + compatible = "snps,dwc3"; + reg = <0x00 0x31100000 0x00 0x50000>; + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */ + <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */ + interrupt-names = "host", "peripheral"; + maximum-speed = "high-speed"; + dr_mode = "otg"; + }; + }; + fss: bus@fc00000 { compatible = "simple-bus"; reg = <0x00 0x0fc00000 0x00 0x70000>;
arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi +10 -0
@@ -18,6 +18,16 @@ chipid: chipid@14 { reg = <0x14 0x4>; bootph-all; }; + + usb0_phy_ctrl: syscon@4008 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4008 0x4>; + }; + + usb1_phy_ctrl: syscon@4018 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4018 0x4>; + }; }; wkup_uart0: serial@2b300000 {
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +67 -0
91 lines not on this page · raw message
Signature · 1 line
2.34.1
Re: [PATCH v4 3/3] arm64: dts: ti: k3-am62p: add the USB sub-system
Quoted 187 lines · Roger Quadros
There are two USB instances available on the am62p5 starter kit. Include and enable them for use on the board.
Signed-off-by Vignesh Raghavendra <[email protected]>Signed-off-by Roger Quadros <[email protected]>---
Notes:
Changelog:v4 - no change
v3 - no change
https://lore.kernel.org/all/[email protected]/v2:
- added USB PHY CTRL node changes here
- changed USB wrapper node names to usb@
- changed Type-C chip node name to usb-power-control@arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 46 ++++++++++++++ arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi | 10 +++ arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 67 +++++++++++++++++++++ 3 files changed, 123 insertions(+)arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +46
-0@@ -560,6 +560,52 @@ sdhci2: mmc@fa20000 { status = "disabled"; }; + usbss0: usb@f900000 { + compatible = "ti,am62-usb"; + reg = <0x00 0x0f900000 0x00 0x800>; + clocks = <&k3_clks 161 3>; + clock-names = "ref"; + ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>; + #address-cells = <2>; + #size-cells = <2>; + power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>; + ranges; + status = "disabled"; + + usb0: usb@31000000 { + compatible = "snps,dwc3"; + reg = <0x00 0x31000000 0x00 0x50000>; + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */ + <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */ + interrupt-names = "host", "peripheral"; + maximum-speed = "high-speed"; + dr_mode = "otg"; + }; + }; + + usbss1: usb@f910000 { + compatible = "ti,am62-usb"; + reg = <0x00 0x0f910000 0x00 0x800>; + clocks = <&k3_clks 162 3>; + clock-names = "ref"; + ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>; + #address-cells = <2>; + #size-cells = <2>; + power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>; + ranges; + status = "disabled"; + + usb1: usb@31100000 { + compatible = "snps,dwc3"; + reg = <0x00 0x31100000 0x00 0x50000>; + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */ + <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */ + interrupt-names = "host", "peripheral"; + maximum-speed = "high-speed"; + dr_mode = "otg"; + }; + }; + fss: bus@fc00000 { compatible = "simple-bus"; reg = <0x00 0x0fc00000 0x00 0x70000>;arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi +10
-0@@ -18,6 +18,16 @@ chipid: chipid@14 { reg = <0x14 0x4>; bootph-all; }; + + usb0_phy_ctrl: syscon@4008 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4008 0x4>; + }; + + usb1_phy_ctrl: syscon@4018 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4018 0x4>; + }; }; wkup_uart0: serial@2b300000 {arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +55
-0@@ -27,6 +27,8 @@ aliases { spi0 = &ospi0; ethernet0 = &cpsw_port1; ethernet1 = &cpsw_port2; + usb0 = &usb0; + usb1 = &usb1; }; chosen {@@ -297,6 +299,12 @@ AM62PX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR.UART1_TXD */ bootph-all; }; + main_usb1_pins_default: main-usb1-default-pins { + pinctrl-single,pins = < + AM62PX_IOPAD(0x0258, PIN_INPUT, 0) /* (G21) USB1_DRVVBUS */ + >; + }; + main_wlirq_pins_default: main-wlirq-default-pins { pinctrl-single,pins = < AM62PX_IOPAD(0x0128, PIN_INPUT, 7) /* (K25) MMC2_SDWP.GPIO0_72 */@@ -340,6 +348,36 @@ AM62PX_IOPAD(0x0124, PIN_INPUT, 7) /* (J25) MMC2_SDCD.GPIO0_71 */ }; }; +&main_i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c0_pins_default>; + clock-frequency = <400000>; + + typec_pd0: usb-power-controller@3f { + compatible = "ti,tps6598x"; + reg = <0x3f>; + + connector { + compatible = "usb-c-connector"; + label = "USB-C"; + self-powered; + data-role = "dual"; + power-role = "sink"; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + usb_con_hs: endpoint { + remote-endpoint = <&usb0_hs_ep>; + }; + }; + }; + }; + }; +}; + &main_i2c1 { status = "okay"; pinctrl-names = "default";@@ -460,6 +498,35 @@ cpsw3g_phy1: ethernet-phy@1 { }; }; +&usbss0 { + status = "okay"; + ti,vbus-divider; +}; + +&usbss1 { + status = "okay"; + ti,vbus-divider; +}; + +&usb0 { + usb-role-switch; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>;
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts cpsw3g_phy1: ethernet-phy@1 { · line 527
Quoted 10 lines
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +10
-0+ usb0_hs_ep: endpoint { + remote-endpoint = <&usb_con_hs>; + }; + }; +}; + +&usb1 { + dr_mode = "host"; + pinctrl-names = "default"; + pinctrl-0 = <&main_usb1_pins_default>;
I'm not super familiar with USB, but I see this pinmux for the "DRVVBUS" pin is usually added the the parent USB subsystem node (usbss). Does this pin belong to the subsystem or the specific USB instance?
Andrew
Quoted 5 lines
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +2
-0+}; + &mcasp1 { status = "okay"; #sound-dai-cells = <0>;
Re: [PATCH v4 3/3] arm64: dts: ti: k3-am62p: add the USB sub-system
Quoted 185 lines · Andrew Davis
Quoted 184 lines · Roger Quadros
There are two USB instances available on the am62p5 starter kit. Include and enable them for use on the board.
Signed-off-by Vignesh Raghavendra <[email protected]>Signed-off-by Roger Quadros <[email protected]>---
Notes:
Changelog:
v4 - no change
v3 - no change
https://lore.kernel.org/all/[email protected]/
v2:
- added USB PHY CTRL node changes here
- changed USB wrapper node names to usb@
- changed Type-C chip node name to usb-power-control@arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 46 ++++++++++++++
arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi| 10 +++ arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 67 +++++++++++++++++++++3 files changed, 123 insertions(+)arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +45
-0@@ -560,6 +560,52 @@ sdhci2: mmc@fa20000 { status = "disabled"; }; + usbss0: usb@f900000 { + compatible = "ti,am62-usb"; + reg = <0x00 0x0f900000 0x00 0x800>; + clocks = <&k3_clks 161 3>; + clock-names = "ref"; + ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>; + #address-cells = <2>; + #size-cells = <2>; + power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>; + ranges; + status = "disabled"; + + usb0: usb@31000000 { + compatible = "snps,dwc3"; + reg = <0x00 0x31000000 0x00 0x50000>; + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */ + <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */ + interrupt-names = "host", "peripheral"; + maximum-speed = "high-speed"; + dr_mode = "otg"; + }; + }; + + usbss1: usb@f910000 { + compatible = "ti,am62-usb"; + reg = <0x00 0x0f910000 0x00 0x800>; + clocks = <&k3_clks 162 3>; + clock-names = "ref"; + ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>; + #address-cells = <2>; + #size-cells = <2>; + power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>; + ranges; + status = "disabled"; + + usb1: usb@31100000 { + compatible = "snps,dwc3"; + reg = <0x00 0x31100000 0x00 0x50000>; + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */ + <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */ + interrupt-names = "host", "peripheral"; + maximum-speed = "high-speed"; + dr_mode = "otg"; + }; + }; + fss: bus@fc00000 { compatible = "simple-bus"; reg = <0x00 0x0fc00000 0x00 0x70000>;arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi +10
-0@@ -18,6 +18,16 @@ chipid: chipid@14 { reg = <0x14 0x4>; bootph-all; }; + + usb0_phy_ctrl: syscon@4008 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4008 0x4>; + }; + + usb1_phy_ctrl: syscon@4018 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4018 0x4>; + }; }; wkup_uart0: serial@2b300000 {arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +7
-0@@ -27,6 +27,8 @@ aliases { spi0 = &ospi0; ethernet0 = &cpsw_port1; ethernet1 = &cpsw_port2; + usb0 = &usb0; + usb1 = &usb1; }; chosen {@@ -297,6 +299,12 @@ AM62PX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR.UART1_TXD */ bootph-all; }; + main_usb1_pins_default: main-usb1-default-pins { + pinctrl-single,pins = < + AM62PX_IOPAD(0x0258, PIN_INPUT, 0) /* (G21) USB1_DRVVBUS */ + >; + }; + main_wlirq_pins_default: main-wlirq-default-pins {pinctrl-single,pins = <
AM62PX_IOPAD(0x0128, PIN_INPUT, 7)/* (K25) MMC2_SDWP.GPIO0_72 */arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +51
-0@@ -340,6 +348,36 @@ AM62PX_IOPAD(0x0124, PIN_INPUT, 7) /* (J25) MMC2_SDCD.GPIO0_71 */ }; }; +&main_i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c0_pins_default>; + clock-frequency = <400000>; + + typec_pd0: usb-power-controller@3f { + compatible = "ti,tps6598x"; + reg = <0x3f>; + + connector { + compatible = "usb-c-connector"; + label = "USB-C"; + self-powered; + data-role = "dual"; + power-role = "sink"; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + usb_con_hs: endpoint { + remote-endpoint = <&usb0_hs_ep>; + }; + }; + }; + }; + }; +}; + &main_i2c1 { status = "okay"; pinctrl-names = "default";@@ -460,6 +498,35 @@ cpsw3g_phy1: ethernet-phy@1 { }; }; +&usbss0 { + status = "okay"; + ti,vbus-divider; +}; + +&usbss1 { + status = "okay"; + ti,vbus-divider; +}; + +&usb0 { + usb-role-switch; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usb0_hs_ep: endpoint { + remote-endpoint = <&usb_con_hs>; + }; + }; +}; +
Quoted 9 lines
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts cpsw3g_phy1: ethernet-phy@1 { · line 527
Quoted 4 lines
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +4
-0+&usb1 { + dr_mode = "host"; + pinctrl-names = "default"; + pinctrl-0 = <&main_usb1_pins_default>;I'm not super familiar with USB, but I see this pinmux for the "DRVVBUS" pin is usually added the the parent USB subsystem node (usbss). Does this pin belong to the subsystem or the specific USB instance?
There is only 1 USB instance per USB sub-system.
The "DRVVBUS" pin is a control signal to enable the VBUS regulator while in host mode.
Just probing the usbss1 driver has no use of "DRVVBUS". I think usb1 is the right place as it is used there.
Quoted 7 lines
Andrew
Quoted 5 lines
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +2
-0+}; + &mcasp1 { status = "okay"; #sound-dai-cells = <0>;
Signature · 2 lines
cheers, -roger
Andrew Davis
Reviewed-byRe: [PATCH v4 3/3] arm64: dts: ti: k3-am62p: add the USB sub-system
Quoted 197 lines · Roger Quadros
Quoted 185 lines · Andrew Davis
Quoted 184 lines · Roger Quadros
There are two USB instances available on the am62p5 starter kit. Include and enable them for use on the board.
Signed-off-by Vignesh Raghavendra <[email protected]>Signed-off-by Roger Quadros <[email protected]>---
Notes:
Changelog:
v4 - no change
v3 - no change
https://lore.kernel.org/all/[email protected]/
v2:
- added USB PHY CTRL node changes here
- changed USB wrapper node names to usb@
- changed Type-C chip node name to usb-power-control@arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 46 ++++++++++++++ arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi | 10 +++ arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 67 +++++++++++++++++++++ 3 files changed, 123 insertions(+)arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +45
-0@@ -560,6 +560,52 @@ sdhci2: mmc@fa20000 { status = "disabled"; }; + usbss0: usb@f900000 { + compatible = "ti,am62-usb"; + reg = <0x00 0x0f900000 0x00 0x800>; + clocks = <&k3_clks 161 3>; + clock-names = "ref"; + ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>; + #address-cells = <2>; + #size-cells = <2>; + power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>; + ranges; + status = "disabled"; + + usb0: usb@31000000 { + compatible = "snps,dwc3"; + reg = <0x00 0x31000000 0x00 0x50000>; + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */ + <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */ + interrupt-names = "host", "peripheral"; + maximum-speed = "high-speed"; + dr_mode = "otg"; + }; + }; + + usbss1: usb@f910000 { + compatible = "ti,am62-usb"; + reg = <0x00 0x0f910000 0x00 0x800>; + clocks = <&k3_clks 162 3>; + clock-names = "ref"; + ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>; + #address-cells = <2>; + #size-cells = <2>; + power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>; + ranges; + status = "disabled"; + + usb1: usb@31100000 { + compatible = "snps,dwc3"; + reg = <0x00 0x31100000 0x00 0x50000>; + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */ + <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */ + interrupt-names = "host", "peripheral"; + maximum-speed = "high-speed"; + dr_mode = "otg"; + }; + }; + fss: bus@fc00000 { compatible = "simple-bus"; reg = <0x00 0x0fc00000 0x00 0x70000>;arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi +10
-0@@ -18,6 +18,16 @@ chipid: chipid@14 { reg = <0x14 0x4>; bootph-all; }; + + usb0_phy_ctrl: syscon@4008 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4008 0x4>; + }; + + usb1_phy_ctrl: syscon@4018 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4018 0x4>; + }; }; wkup_uart0: serial@2b300000 {arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +58
-0@@ -27,6 +27,8 @@ aliases { spi0 = &ospi0; ethernet0 = &cpsw_port1; ethernet1 = &cpsw_port2; + usb0 = &usb0; + usb1 = &usb1; }; chosen {@@ -297,6 +299,12 @@ AM62PX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR.UART1_TXD */ bootph-all; }; + main_usb1_pins_default: main-usb1-default-pins { + pinctrl-single,pins = < + AM62PX_IOPAD(0x0258, PIN_INPUT, 0) /* (G21) USB1_DRVVBUS */ + >; + }; + main_wlirq_pins_default: main-wlirq-default-pins { pinctrl-single,pins = < AM62PX_IOPAD(0x0128, PIN_INPUT, 7) /* (K25) MMC2_SDWP.GPIO0_72 */@@ -340,6 +348,36 @@ AM62PX_IOPAD(0x0124, PIN_INPUT, 7) /* (J25) MMC2_SDCD.GPIO0_71 */ }; }; +&main_i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c0_pins_default>; + clock-frequency = <400000>; + + typec_pd0: usb-power-controller@3f { + compatible = "ti,tps6598x"; + reg = <0x3f>; + + connector { + compatible = "usb-c-connector"; + label = "USB-C"; + self-powered; + data-role = "dual"; + power-role = "sink"; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + usb_con_hs: endpoint { + remote-endpoint = <&usb0_hs_ep>; + }; + }; + }; + }; + }; +}; + &main_i2c1 { status = "okay"; pinctrl-names = "default";@@ -460,6 +498,35 @@ cpsw3g_phy1: ethernet-phy@1 { }; }; +&usbss0 { + status = "okay"; + ti,vbus-divider; +}; + +&usbss1 { + status = "okay"; + ti,vbus-divider; +}; + +&usb0 { + usb-role-switch; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usb0_hs_ep: endpoint { + remote-endpoint = <&usb_con_hs>; + }; + }; +}; +Quoted 9 lines
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts cpsw3g_phy1: ethernet-phy@1 { · line 527
Quoted 4 lines
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +4
-0+&usb1 { + dr_mode = "host"; + pinctrl-names = "default"; + pinctrl-0 = <&main_usb1_pins_default>;I'm not super familiar with USB, but I see this pinmux for the "DRVVBUS" pin is usually added the the parent USB subsystem node (usbss). Does this pin belong to the subsystem or the specific USB instance?
Quoted 7 lines
There is only 1 USB instance per USB sub-system.
The "DRVVBUS" pin is a control signal to enable the VBUS regulator while in host mode.Just probing the usbss1 driver has no use of "DRVVBUS". I think usb1 is the right place as it is used there.
Seems reasonable, so if there ever was more than 1 instance per sub-system, each instance would need its own pin?
We should move these pinctrl to the instance node in the other dts files at some point then.
Quoted 8 lines
Quoted 7 lines
Andrew
Quoted 5 lines
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +2
-0+}; + &mcasp1 { status = "okay"; #sound-dai-cells = <0>;
Re: [PATCH v4 3/3] arm64: dts: ti: k3-am62p: add the USB sub-system
Quoted 202 lines · Andrew Davis
Quoted 201 lines · Roger Quadros
Quoted 185 lines · Andrew Davis
Quoted 184 lines · Roger Quadros
There are two USB instances available on the am62p5 starter kit. Include and enable them for use on the board.
Signed-off-by Vignesh Raghavendra <[email protected]>Signed-off-by Roger Quadros <[email protected]>---
Notes:
Changelog:
v4 - no change
v3 - no change
https://lore.kernel.org/all/[email protected]/
v2:
- added USB PHY CTRL node changes here
- changed USB wrapper node names to usb@
- changed Type-C chip node name to usb-power-control@arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 46 ++++++++++++++
arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi| 10 +++ arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 67 +++++++++++++++++++++3 files changed, 123 insertions(+)arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +45
-0@@ -560,6 +560,52 @@ sdhci2: mmc@fa20000 { status = "disabled"; }; + usbss0: usb@f900000 { + compatible = "ti,am62-usb"; + reg = <0x00 0x0f900000 0x00 0x800>; + clocks = <&k3_clks 161 3>; + clock-names = "ref"; + ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>; + #address-cells = <2>; + #size-cells = <2>; + power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>; + ranges; + status = "disabled"; + + usb0: usb@31000000 { + compatible = "snps,dwc3"; + reg = <0x00 0x31000000 0x00 0x50000>; + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */ + <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */ + interrupt-names = "host", "peripheral"; + maximum-speed = "high-speed"; + dr_mode = "otg"; + }; + }; + + usbss1: usb@f910000 { + compatible = "ti,am62-usb"; + reg = <0x00 0x0f910000 0x00 0x800>; + clocks = <&k3_clks 162 3>; + clock-names = "ref"; + ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>; + #address-cells = <2>; + #size-cells = <2>; + power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>; + ranges; + status = "disabled"; + + usb1: usb@31100000 { + compatible = "snps,dwc3"; + reg = <0x00 0x31100000 0x00 0x50000>; + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */ + <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */ + interrupt-names = "host", "peripheral"; + maximum-speed = "high-speed"; + dr_mode = "otg"; + }; + }; + fss: bus@fc00000 { compatible = "simple-bus"; reg = <0x00 0x0fc00000 0x00 0x70000>;arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi +10
-0@@ -18,6 +18,16 @@ chipid: chipid@14 { reg = <0x14 0x4>; bootph-all; }; + + usb0_phy_ctrl: syscon@4008 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4008 0x4>; + }; + + usb1_phy_ctrl: syscon@4018 { + compatible = "ti,am62-usb-phy-ctrl", "syscon"; + reg = <0x4018 0x4>; + }; }; wkup_uart0: serial@2b300000 {arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +7
-0@@ -27,6 +27,8 @@ aliases { spi0 = &ospi0; ethernet0 = &cpsw_port1; ethernet1 = &cpsw_port2; + usb0 = &usb0; + usb1 = &usb1; }; chosen {@@ -297,6 +299,12 @@ AM62PX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR.UART1_TXD */ bootph-all; }; + main_usb1_pins_default: main-usb1-default-pins { + pinctrl-single,pins = < + AM62PX_IOPAD(0x0258, PIN_INPUT, 0) /* (G21) USB1_DRVVBUS */ + >; + }; + main_wlirq_pins_default: main-wlirq-default-pins {pinctrl-single,pins = <
AM62PX_IOPAD(0x0128, PIN_INPUT, 7)/* (K25) MMC2_SDWP.GPIO0_72 */arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +51
-0@@ -340,6 +348,36 @@ AM62PX_IOPAD(0x0124, PIN_INPUT, 7) /* (J25) MMC2_SDCD.GPIO0_71 */ }; }; +&main_i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c0_pins_default>; + clock-frequency = <400000>; + + typec_pd0: usb-power-controller@3f { + compatible = "ti,tps6598x"; + reg = <0x3f>; + + connector { + compatible = "usb-c-connector"; + label = "USB-C"; + self-powered; + data-role = "dual"; + power-role = "sink"; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + usb_con_hs: endpoint { + remote-endpoint = <&usb0_hs_ep>; + }; + }; + }; + }; + }; +}; + &main_i2c1 { status = "okay"; pinctrl-names = "default";@@ -460,6 +498,35 @@ cpsw3g_phy1: ethernet-phy@1 { }; }; +&usbss0 { + status = "okay"; + ti,vbus-divider; +}; + +&usbss1 { + status = "okay"; + ti,vbus-divider; +}; + +&usb0 { + usb-role-switch; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usb0_hs_ep: endpoint { + remote-endpoint = <&usb_con_hs>; + }; + }; +}; +Quoted 9 lines
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts cpsw3g_phy1: ethernet-phy@1 { · line 527
Quoted 4 lines
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +4
-0+&usb1 { + dr_mode = "host"; + pinctrl-names = "default"; + pinctrl-0 = <&main_usb1_pins_default>;I'm not super familiar with USB, but I see this pinmux for the "DRVVBUS" pin is usually added the the parent USB subsystem node (usbss). Does this pin belong to the subsystem or the specific USB instance?
There is only 1 USB instance per USB sub-system.
The "DRVVBUS" pin is a control signal to enable the VBUS regulator while in host mode.
Quoted 6 lines
Quoted 3 lines
Just probing the usbss1 driver has no use of "DRVVBUS". I think usb1 is the right place as it is used there.
Seems reasonable, so if there ever was more than 1 instance per sub-system, each instance would need its own pin?
Yes.
Quoted 5 lines
We should move these pinctrl to the instance node in the other dts files at some point then.
Reviewed-by Andrew Davis <[email protected]>
Thanks!
Quoted 9 lines
Quoted 9 lines
Quoted 8 lines
Andrew
Quoted 5 lines
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +2
-0+}; + &mcasp1 { status = "okay"; #sound-dai-cells = <0>;
Signature · 2 lines
cheers, -roger