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Initial support for CTCISZ Ninenine Pi

PATCH Superseded Yao Zi 3 participants 15 messages May 1, 2025 – May 8, 2025

Subsystems (2)
Device tree bindings LoongArch

v1 of 3 Superseded Latest is v3 →

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Yao Zi

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#0 lore raw

cover Initial support for CTCISZ Ninenine Pi

This series adds support for CTCISZ Ninenine Pi, which ships an Loongson 2K0300 SoC and various peripherals. The vendor prefix and the board are documented and basic SoC/board devicetrees are added.

I've successfully booted into console with vendor U-Boot, a bootlog could be obtained here[1]. DTB and initramfs must be built into the kernel as the vendor bootloader cannot pass them and upstream U-Boot support for LoongArch is still WIP.

Thanks for your time and review.

[1]: https://gist.github.com/ziyao233/7fd2c8b3b51ef9b30fe5c17faae1bc4e

Yao Zi (4):
dt-bindings: vendor-prefixes: Add CTCISZ Technology Co., LTD.
dt-bindings: LoongArch: Add CTCISZ Ninenine Pi
LoongArch: dts: Add initial SoC devicetree for Loongson 2K0300
LoongArch: dts: Add initial devicetree for CTCISZ Ninenine Pi

 .../bindings/loongarch/loongson.yaml          |   5 +
 .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
 arch/loongarch/boot/dts/Makefile              |   1 +
 arch/loongarch/boot/dts/loongson-2k0300.dtsi  | 197 ++++++++++++++++++
 .../boot/dts/ls2k0300-ctcisz-nineninepi.dts   |  41 ++++
 5 files changed, 246 insertions(+)
 create mode 100644 arch/loongarch/boot/dts/loongson-2k0300.dtsi
 create mode 100644 arch/loongarch/boot/dts/ls2k0300-ctcisz-nineninepi.dts
Signature · 1 line
2.49.0
author
#1 lore raw

PATCH 1/4 dt-bindings: vendor-prefixes: Add CTCISZ Technology Co., LTD.

CTCISZ Technology Co., LTD. is a company specializing in designing of embedded systems. Document the vendor prefix.

Link http://www.ctcisz.com/
Signed-off-by Yao Zi <[email protected]>
---
 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/vendor-prefixes.yaml +2 -0
index 86f6a19b28ae..02f35e583948 100644
@@ -344,6 +344,8 @@ patternProperties:
     description: Guangzhou China Star Optoelectronics Technology Co., Ltd
   "^csq,.*":
     description: Shenzen Chuangsiqi Technology Co.,Ltd.
+  "^ctcisz,.*":
+    description: CTCISZ Technology Co.,Ltd.
   "^ctera,.*":
     description: CTERA Networks Intl.
   "^ctu,.*":
Signature · 1 line
2.49.0
author
#3 lore raw

PATCH 2/4 dt-bindings: LoongArch: Add CTCISZ Ninenine Pi

In reply to Yao Zi

Ninenine Pi is an Loongson 2K0300-based development board produced by CTCISZ. Features include,

- 512MiB DDR4 RAM
- On-board eMMC storage
- Optional SD Card support
- 2 USB 2.0 Ports (OTG and HOST)
- 1 GbE Ethernet port
- Optional WiFi/BT support
- Audio output through 3.5mm phone connector
- Optional display output through RAW RGB interface

Add compatible string for the board.

Signed-off-by Yao Zi <[email protected]>
---
 Documentation/devicetree/bindings/loongarch/loongson.yaml | 5 +++++
 1 file changed, 5 insertions(+)
Documentation/devicetree/bindings/loongarch/loongson.yaml +5 -0
index e1a4a97b7576..aac4af9ee97a 100644
@@ -14,6 +14,11 @@ properties:
     const: '/'
   compatible:
     oneOf:
+      - description: CTCISZ Ninenine Pi
+        items:
+          - const: ctcisz,ninenine-pi
+          - const: loongson,ls2k0300
+
       - description: Loongson-2K0500 processor based boards
         items:
           - const: loongson,ls2k0500-ref
Signature · 1 line
2.49.0
#5 lore raw

Re: [PATCH 2/4] dt-bindings: LoongArch: Add CTCISZ Ninenine Pi

In reply to Yao Zi
Quoted 1 line · Yao Zi

Ninenine Pi is an Loongson 2K0300-based development board produced by

I think "Ninenine Pi" doesn't make sense. I browsed <https://bbs.ctcisz.com/forum.php?mod=forumdisplay&fid=2> and found that the Chinese name of this development board is "久久派". Interestingly, its selling price is 99 yuan. In Chinese, the Roman numeral "9" has the same pronunciation as the Chinese character "久". It seems that you intended to name the development board after its selling price. But shouldn't it be "Ninety-nine Pi" in English? Or "99 Pi"? Perhaps "Jiujiu Pi" is a better option?

Thanks,
Yanteng

Quoted 34 lines

CTCISZ. Features include,

- 512MiB DDR4 RAM
- On-board eMMC storage
- Optional SD Card support
- 2 USB 2.0 Ports (OTG and HOST)
- 1 GbE Ethernet port
- Optional WiFi/BT support
- Audio output through 3.5mm phone connector
- Optional display output through RAW RGB interface

Add compatible string for the board.

Signed-off-by Yao Zi <[email protected]>
---
  Documentation/devicetree/bindings/loongarch/loongson.yaml | 5 +++++
  1 file changed, 5 insertions(+)
Documentation/devicetree/bindings/loongarch/loongson.yaml +5 -0
index e1a4a97b7576..aac4af9ee97a 100644
@@ -14,6 +14,11 @@ properties:
      const: '/'
    compatible:
      oneOf:
+      - description: CTCISZ Ninenine Pi
+        items:
+          - const: ctcisz,ninenine-pi
+          - const: loongson,ls2k0300
+
        - description: Loongson-2K0500 processor based boards
          items:
            - const: loongson,ls2k0500-ref
author
#6 lore raw

Re: [PATCH 2/4] dt-bindings: LoongArch: Add CTCISZ Ninenine Pi

Quoted 10 lines · Yanteng Si
Quoted 1 line · Yao Zi

Ninenine Pi is an Loongson 2K0300-based development board produced by

I think "Ninenine Pi" doesn't make sense. I browsed
<https://bbs.ctcisz.com/forum.php?mod=forumdisplay&fid=2> and found that the Chinese name of this development board is "久久派". Interestingly, its selling price is 99 yuan. In Chinese, the Roman numeral "9" has the same pronunciation as the Chinese character "久".

It seems that you intended to name the development board after its selling price.

I've confirmed with the vendor that they call the board "99pi" in English which is rewritten as "Ninenine Pi" to avoid possibly unexpected problems with a name starting with digits. This has nothing to do with the price.

Quoted 3 lines

But shouldn't it be
"Ninety-nine Pi" in English? Or "99 Pi"? Perhaps "Jiujiu Pi" is a better option?

"Ninety-nine Pi" sounds too complicated for a board name and I don't think "99" in "99pi" is meant to represent a number. Thus I'd like to stick with "ninenine pi".

Quoted 4 lines

Thanks,
Yanteng

Best regards,
Yao Zi

Quoted 37 lines
Quoted 35 lines

CTCISZ. Features include,

- 512MiB DDR4 RAM
- On-board eMMC storage
- Optional SD Card support
- 2 USB 2.0 Ports (OTG and HOST)
- 1 GbE Ethernet port
- Optional WiFi/BT support
- Audio output through 3.5mm phone connector
- Optional display output through RAW RGB interface

Add compatible string for the board.

Signed-off-by Yao Zi <[email protected]>
---
  Documentation/devicetree/bindings/loongarch/loongson.yaml | 5 +++++
  1 file changed, 5 insertions(+)
Documentation/devicetree/bindings/loongarch/loongson.yaml +5 -0
index e1a4a97b7576..aac4af9ee97a 100644
@@ -14,6 +14,11 @@ properties:
      const: '/'
    compatible:
      oneOf:
+      - description: CTCISZ Ninenine Pi
+        items:
+          - const: ctcisz,ninenine-pi
+          - const: loongson,ls2k0300
+
        - description: Loongson-2K0500 processor based boards
          items:
            - const: loongson,ls2k0500-ref
#7 lore raw

Re: [PATCH 2/4] dt-bindings: LoongArch: Add CTCISZ Ninenine Pi

Quoted 9 lines · Yao Zi
Quoted 7 lines · Yanteng Si
Quoted 1 line · Yao Zi

Ninenine Pi is an Loongson 2K0300-based development board produced by

I think "Ninenine Pi" doesn't make sense. I browsed
<https://bbs.ctcisz.com/forum.php?mod=forumdisplay&fid=2> and found that the Chinese name of this development board is "久久派". Interestingly, its selling price is 99 yuan. In Chinese, the Roman numeral "9" has the same pronunciation as the Chinese character "久".

Quoted 7 lines
Quoted 2 lines

It seems that you intended to name the development board after its selling price.

I've confirmed with the vendor that they call the board "99pi" in English which is rewritten as "Ninenine Pi" to avoid possibly unexpected problems with a name starting with digits. This has nothing to do with the price.

I searched on the Internet for a long time last night, but still couldn't find the source of Ninenine Pi. Can you provide the origin of the manufacturer's naming? Or transfer our offline discussion to an online platform.

What are the possible unexpected problems that may be triggered? For example?

Quoted 8 lines
Quoted 4 lines

But shouldn't it be
"Ninety-nine Pi" in English? Or "99 Pi"? Perhaps "Jiujiu Pi" is a better option?

"Ninety-nine Pi" sounds too complicated for a board name and I don't think "99" in "99pi" is meant to represent a number. Thus I'd like to stick with "ninenine pi".

Since 99 has nothing to do with the price, and you think that the 9 is not used to represent a number, then I'm curious. In the name of this development board, what does the 9 represent? Based on my research, I have already clarified that "99" has the same Chinese pronunciation as "久久 (long time)", so I think the naming should carry the implication of "lasting or a long time".

I have research on other similar development boards, such as Raspberry Pi, Orange Pi, Mango Pi... The English names of these development boards all have corresponding meanings. Why can't we come up with a good name?

Based on the above discussion, I don't accept the name "ninenine Pi" which has no implied meaning.

Thanks,
Yanteng

Quoted 10 lines
Quoted 5 lines

Thanks,
Yanteng

Best regards,
Yao Zi

Quoted 1 line
author
#8 lore raw

PATCH 3/4 LoongArch: dts: Add initial SoC devicetree for Loongson 2K0300

In reply to Yao Zi

Add SoC devicetree for 2K0300 SoC, which features one LA264 dual-issue core and targets embedded market. Only CPU core, legacy interrupt controllers and UARTs are defined for now.

Signed-off-by Yao Zi <[email protected]>
---
 arch/loongarch/boot/dts/loongson-2k0300.dtsi | 197 +++++++++++++++++++
 1 file changed, 197 insertions(+)
 create mode 100644 arch/loongarch/boot/dts/loongson-2k0300.dtsi
arch/loongarch/boot/dts/loongson-2k0300.dtsi new file +197 -0
new file mode 100644
index 000000000000..6991a368ff94
@@ -0,0 +1,197 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2025 Loongson Technology Corporation Limited
+ * Copyright (C) 2025 Yao Zi <[email protected]>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+	compatible = "loongson,ls2k0300";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
+		serial5 = &uart5;
+		serial6 = &uart6;
+		serial7 = &uart7;
+		serial8 = &uart8;
+		serial9 = &uart9;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			compatible = "loongson,la264";
+			reg = <0>;
+			device_type = "cpu";
+			clocks = <&cpu_clk>;
+		};
+
+	};
+
+	cpuintc: interrupt-controller {
+		compatible = "loongson,cpu-interrupt-controller";
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	cpu_clk: clock-1000m {
+		compatible = "fixed-clock";
+		clock-frequency = <1000000000>;
+		#clock-cells = <0>;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges = <0x00 0x10000000 0x00 0x10000000 0x0 0x10000000>,
+			 <0x00 0x02000000 0x00 0x02000000 0x0 0x04000000>,
+			 <0x00 0x40000000 0x00 0x40000000 0x0 0x40000000>;
+
+		liointc0: interrupt-controller@16001400{
+			compatible = "loongson,liointc-2.0";
+			reg = <0x0 0x16001400 0x0 0x40>,
+			      <0x0 0x16001040 0x0 0x8>;
+			reg-names = "main", "isr0";
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupt-parent = <&cpuintc>;
+			interrupts = <2>;
+			interrupt-names = "int0";
+
+			loongson,parent_int_map = <0xffffffff>, /* int0 */
+						  <0x00000000>, /* int1 */
+						  <0x00000000>, /* int2 */
+						  <0x00000000>; /* int3 */
+		};
+
+		liointc1: interrupt-controller@16001440 {
+			compatible = "loongson,liointc-2.0";
+			reg = <0x0 0x16001440 0x0 0x40>,
+			      <0x0 0x16001048 0x0 0x8>;
+			reg-names = "main", "isr0";
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupt-parent = <&cpuintc>;
+			interrupts = <4>;
+			interrupt-names = "int2";
+
+			loongson,parent_int_map = <0x00000000>, /* int0 */
+						  <0x00000000>, /* int1 */
+						  <0xffffffff>, /* int2 */
+						  <0x00000000>; /* int3 */
+		};
+
+		uart0: serial@16100000 {
+			compatible = "ns16550a";
+			reg = <0 0x16100000 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		uart1: serial@16100400 {
+			compatible = "ns16550a";
+			reg = <0 0x16100400 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		uart2: serial@16100800 {
+			compatible = "ns16550a";
+			reg = <0 0x16100800 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		uart3: serial@16100c00 {
+			compatible = "ns16550a";
+			reg = <0 0x16100c00 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		uart4: serial@16101000 {
+			compatible = "ns16550a";
+			reg = <0 0x16101000 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		uart5: serial@16101400 {
+			compatible = "ns16550a";
+			reg = <0 0x16101400 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		uart6: serial@16101800 {
+			compatible = "ns16550a";
+			reg = <0 0x16101800 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		uart7: serial@16101c00 {
+			compatible = "ns16550a";
+			reg = <0 0x16101c00 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		uart8: serial@16102000 {
+			compatible = "ns16550a";
+			reg = <0 0x16102000 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		uart9: serial@16102400 {
+			compatible = "ns16550a";
+			reg = <0 0x16102400 0 0x10>;
+			interrupt-parent = <&liointc0>;
+			interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			status = "disabled";
+		};
+
+		isa@16400000 {
+			compatible = "isa";
+			#address-cells = <2>;
+			#size-cells = <1>;
+			ranges = <1 0x0 0x0 0x16400000 0x4000>;
+		};
+	};
+};
Signature · 1 line
2.49.0
#9 lore raw

Re: [PATCH 3/4] LoongArch: dts: Add initial SoC devicetree for Loongson 2K0300

Quoted 32 lines · Yao Zi

Add SoC devicetree for 2K0300 SoC, which features one LA264 dual-issue core and targets embedded market. Only CPU core, legacy interrupt controllers and UARTs are defined for now.

Signed-off-by Yao Zi <[email protected]>
---
 arch/loongarch/boot/dts/loongson-2k0300.dtsi | 197 +++++++++++++++++++
 1 file changed, 197 insertions(+)
 create mode 100644 arch/loongarch/boot/dts/loongson-2k0300.dtsi
arch/loongarch/boot/dts/loongson-2k0300.dtsi new file +16 -0
new file mode 100644
index 000000000000..6991a368ff94
@@ -0,0 +1,197 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2025 Loongson Technology Corporation Limited
+ * Copyright (C) 2025 Yao Zi <[email protected]>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+	compatible = "loongson,ls2k0300";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {

arch/loongarch/boot/dts/loongson-2k0300.dtsi line 26

Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k0300.dtsi new file +10 -0
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
+		serial5 = &uart5;
+		serial6 = &uart6;
+		serial7 = &uart7;
+		serial8 = &uart8;
+		serial9 = &uart9;

UARTs depend on connectors, so these are board-level aliases.

Quoted 26 lines
arch/loongarch/boot/dts/loongson-2k0300.dtsi new file +26 -0
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			compatible = "loongson,la264";
+			reg = <0>;
+			device_type = "cpu";
+			clocks = <&cpu_clk>;
+		};
+
+	};
+
+	cpuintc: interrupt-controller {
+		compatible = "loongson,cpu-interrupt-controller";
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	cpu_clk: clock-1000m {
+		compatible = "fixed-clock";
+		clock-frequency = <1000000000>;
+		#clock-cells = <0>;
+	};

arch/loongarch/boot/dts/loongson-2k0300.dtsi line 62

Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k0300.dtsi new file +10 -0
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges = <0x00 0x10000000 0x00 0x10000000 0x0 0x10000000>,
+			 <0x00 0x02000000 0x00 0x02000000 0x0 0x04000000>,
+			 <0x00 0x40000000 0x00 0x40000000 0x0 0x40000000>;
+
+		liointc0: interrupt-controller@16001400{

Missing space, {

Quoted 8 lines
arch/loongarch/boot/dts/loongson-2k0300.dtsi new file +8 -0
+			compatible = "loongson,liointc-2.0";
+			reg = <0x0 0x16001400 0x0 0x40>,
+			      <0x0 0x16001040 0x0 0x8>;
+			reg-names = "main", "isr0";
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+

arch/loongarch/boot/dts/loongson-2k0300.dtsi line 80

Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k0300.dtsi new file +10 -0
+			interrupt-parent = <&cpuintc>;
+			interrupts = <2>;
+			interrupt-names = "int0";
+
+			loongson,parent_int_map = <0xffffffff>, /* int0 */
+						  <0x00000000>, /* int1 */
+						  <0x00000000>, /* int2 */
+						  <0x00000000>; /* int3 */
+		};
+

Best regards,
Krzysztof

author
#10 lore raw

Re: [PATCH 3/4] LoongArch: dts: Add initial SoC devicetree for Loongson 2K0300

Quoted 102 lines · Krzysztof Kozlowski
Quoted 32 lines · Yao Zi

Add SoC devicetree for 2K0300 SoC, which features one LA264 dual-issue core and targets embedded market. Only CPU core, legacy interrupt controllers and UARTs are defined for now.

Signed-off-by Yao Zi <[email protected]>
---
 arch/loongarch/boot/dts/loongson-2k0300.dtsi | 197 +++++++++++++++++++
 1 file changed, 197 insertions(+)
 create mode 100644 arch/loongarch/boot/dts/loongson-2k0300.dtsi
arch/loongarch/boot/dts/loongson-2k0300.dtsi new file +16 -0
new file mode 100644
index 000000000000..6991a368ff94
@@ -0,0 +1,197 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2025 Loongson Technology Corporation Limited
+ * Copyright (C) 2025 Yao Zi <[email protected]>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+	compatible = "loongson,ls2k0300";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {

arch/loongarch/boot/dts/loongson-2k0300.dtsi line 26

Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k0300.dtsi new file +10 -0
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
+		serial5 = &uart5;
+		serial6 = &uart6;
+		serial7 = &uart7;
+		serial8 = &uart8;
+		serial9 = &uart9;

UARTs depend on connectors, so these are board-level aliases.

Quoted 26 lines
arch/loongarch/boot/dts/loongson-2k0300.dtsi new file +26 -0
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			compatible = "loongson,la264";
+			reg = <0>;
+			device_type = "cpu";
+			clocks = <&cpu_clk>;
+		};
+
+	};
+
+	cpuintc: interrupt-controller {
+		compatible = "loongson,cpu-interrupt-controller";
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	cpu_clk: clock-1000m {
+		compatible = "fixed-clock";
+		clock-frequency = <1000000000>;
+		#clock-cells = <0>;
+	};

arch/loongarch/boot/dts/loongson-2k0300.dtsi line 62

Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k0300.dtsi new file +10 -0
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges = <0x00 0x10000000 0x00 0x10000000 0x0 0x10000000>,
+			 <0x00 0x02000000 0x00 0x02000000 0x0 0x04000000>,
+			 <0x00 0x40000000 0x00 0x40000000 0x0 0x40000000>;
+
+		liointc0: interrupt-controller@16001400{

Missing space, {

Quoted 15 lines
arch/loongarch/boot/dts/loongson-2k0300.dtsi new file +15 -0
+			compatible = "loongson,liointc-2.0";
+			reg = <0x0 0x16001400 0x0 0x40>,
+			      <0x0 0x16001040 0x0 0x8>;
+			reg-names = "main", "isr0";
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupt-parent = <&cpuintc>;
+			interrupts = <2>;
+			interrupt-names = "int0";
+
+			loongson,parent_int_map = <0xffffffff>, /* int0 */
+						  <0x00000000>, /* int1 */
+						  <0x00000000>, /* int2 */
Quoted 9 lines

arch/loongarch/boot/dts/loongson-2k0300.dtsi line 80

Quoted 3 lines
arch/loongarch/boot/dts/loongson-2k0300.dtsi new file +3 -0
+						  <0x00000000>; /* int3 */
+		};
+

Best regards,
Krzysztof

Thanks for finding the issues, will fix all of them in v2.

Thanks,
Yao Zi

author
#11 lore raw

PATCH 4/4 LoongArch: dts: Add initial devicetree for CTCISZ Ninenine Pi

In reply to Yao Zi

Enable UART0 as it's the boot UART used by firmware.

Signed-off-by Yao Zi <[email protected]>
---
 arch/loongarch/boot/dts/Makefile              |  1 +
 .../boot/dts/ls2k0300-ctcisz-nineninepi.dts   | 41 +++++++++++++++++++
 2 files changed, 42 insertions(+)
 create mode 100644 arch/loongarch/boot/dts/ls2k0300-ctcisz-nineninepi.dts
arch/loongarch/boot/dts/Makefile +1 -0
index 15d5e14fe418..e55df9f385af 100644
@@ -1,3 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
 dtb-y = loongson-2k0500-ref.dtb loongson-2k1000-ref.dtb loongson-2k2000-ref.dtb
+dtb-y += ls2k0300-ctcisz-nineninepi.dtb
arch/loongarch/boot/dts/ls2k0300-ctcisz-nineninepi.dts new file +41 -0

41 lines not on this page · raw message

Signature · 1 line
2.49.0
Reviewed-by on the v1 series
#12 lore raw
In reply to Yao Zi
Quoted 19 lines · Yao Zi

This series adds support for CTCISZ Ninenine Pi, which ships an Loongson 2K0300 SoC and various peripherals. The vendor prefix and the board are documented and basic SoC/board devicetrees are added.

I've successfully booted into console with vendor U-Boot, a bootlog could be obtained here[1]. DTB and initramfs must be built into the kernel as the vendor bootloader cannot pass them and upstream U-Boot support for LoongArch is still WIP.

Thanks for your time and review.

[1]: https://gist.github.com/ziyao233/7fd2c8b3b51ef9b30fe5c17faae1bc4e

Yao Zi (4):
dt-bindings: vendor-prefixes: Add CTCISZ Technology Co., LTD.
dt-bindings: LoongArch: Add CTCISZ Ninenine Pi
LoongArch: dts: Add initial SoC devicetree for Loongson 2K0300
LoongArch: dts: Add initial devicetree for CTCISZ Ninenine Pi

Quoted 8 lines
  .../bindings/loongarch/loongson.yaml          |   5 +
  .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
  arch/loongarch/boot/dts/Makefile              |   1 +
  arch/loongarch/boot/dts/loongson-2k0300.dtsi  | 197 ++++++++++++++++++
  .../boot/dts/ls2k0300-ctcisz-nineninepi.dts   |  41 ++++
  5 files changed, 246 insertions(+)

create mode 100644 arch/loongarch/boot/dts/loongson-2k0300.dtsi create mode 100644 arch/loongarch/boot/dts/ls2k0300-ctcisz-nineninepi.dts

For all the patch sets:

Reviewed-by Yanteng Si <[email protected]>

Thanks,
Yanteng

Quoted 1 line
#13 lore raw
Quoted 29 lines · Yanteng Si
Quoted 19 lines · Yao Zi

This series adds support for CTCISZ Ninenine Pi, which ships an Loongson 2K0300 SoC and various peripherals. The vendor prefix and the board are documented and basic SoC/board devicetrees are added.

I've successfully booted into console with vendor U-Boot, a bootlog could be obtained here[1]. DTB and initramfs must be built into the kernel as the vendor bootloader cannot pass them and upstream U-Boot support for LoongArch is still WIP.

Thanks for your time and review.

[1]: https://gist.github.com/ziyao233/7fd2c8b3b51ef9b30fe5c17faae1bc4e

Yao Zi (4):
   dt-bindings: vendor-prefixes: Add CTCISZ Technology Co., LTD.
   dt-bindings: LoongArch: Add CTCISZ Ninenine Pi
   LoongArch: dts: Add initial SoC devicetree for Loongson 2K0300
   LoongArch: dts: Add initial devicetree for CTCISZ Ninenine Pi

Quoted 8 lines

  .../bindings/loongarch/loongson.yaml          |   5 + .../devicetree/bindings/vendor-prefixes.yaml  |   2 + arch/loongarch/boot/dts/Makefile              |   1 + arch/loongarch/boot/dts/loongson-2k0300.dtsi  | 197 ++++++++++++++++++ .../boot/dts/ls2k0300-ctcisz-nineninepi.dts   |  41 ++++

  5 files changed, 246 insertions(+)

  create mode 100644 arch/loongarch/boot/dts/loongson-2k0300.dtsi create mode 100644 arch/loongarch/boot/dts/ls2k0300-ctcisz- nineninepi.dts

Quoted 3 lines

For all the patch sets:

Reviewed-by Yanteng Si <[email protected]>

I'm sorry. As there is no consensus yet on the name of the development board, could you please refrain from picking my R_B until this discussion is completed? Thank you so much for your understanding and cooperation!

Thanks,
Yanteng

Quoted 6 lines

Thanks,
Yanteng

Quoted 1 line
author
#14 lore raw
Quoted 33 lines · Yanteng Si
Quoted 30 lines · Yanteng Si
Quoted 28 lines · Yao Zi

This series adds support for CTCISZ Ninenine Pi, which ships an Loongson 2K0300 SoC and various peripherals. The vendor prefix and the board are documented and basic SoC/board devicetrees are added.

I've successfully booted into console with vendor U-Boot, a bootlog could be obtained here[1]. DTB and initramfs must be built into the kernel as the vendor bootloader cannot pass them and upstream U-Boot support for LoongArch is still WIP.

Thanks for your time and review.

[1]: https://gist.github.com/ziyao233/7fd2c8b3b51ef9b30fe5c17faae1bc4e

Yao Zi (4):
   dt-bindings: vendor-prefixes: Add CTCISZ Technology Co., LTD.
   dt-bindings: LoongArch: Add CTCISZ Ninenine Pi
   LoongArch: dts: Add initial SoC devicetree for Loongson 2K0300
   LoongArch: dts: Add initial devicetree for CTCISZ Ninenine Pi

  .../bindings/loongarch/loongson.yaml          |   5 + .../devicetree/bindings/vendor-prefixes.yaml  |   2 + arch/loongarch/boot/dts/Makefile              |   1 + arch/loongarch/boot/dts/loongson-2k0300.dtsi  | 197 ++++++++++++++++++ .../boot/dts/ls2k0300-ctcisz-nineninepi.dts   |  41 ++++

  5 files changed, 246 insertions(+)

  create mode 100644 arch/loongarch/boot/dts/loongson-2k0300.dtsi create mode 100644 arch/loongarch/boot/dts/ls2k0300-ctcisz- nineninepi.dts

Quoted 7 lines
Quoted 3 lines

For all the patch sets:

Reviewed-by Yanteng Si <[email protected]>

I'm sorry. As there is no consensus yet on the name of the development board, could you please refrain from picking my R_B until this discussion is completed? Thank you so much for your understanding and cooperation!

Sure. Anyway, thanks for your time and review!

Quoted 2 lines

Thanks,
Yanteng

Best regards,
Yao Zi

Quoted 7 lines
Quoted 5 lines

Thanks,
Yanteng

Quoted 1 line