ARM: dts: meson: GPIO interrupt fixes for v4.15

This provides two small fixes for the GPIO interrupt support on the 32-bit Meson SoCs.

The first change is purely cosmetic - I still decided to include to it because it keeps the sort order consistent. Also it's easier to find the node if you can rely on the sorting to be consistent.

The second patch however is required to make the GPIO interrupt controller functional on Meson8b. Without this the driver simply fails during the of_iomap call - and as a result of that GPIO interrupts are unavailable.

Martin Blumenstingl (2):
ARM: dts: meson: correct the sort order for the the gpio_intc node
ARM: dts: meson: fix the memory region of the GPIO interrupt
controller

 arch/arm/boot/dts/meson.dtsi | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

2.14.3

Nodes are sorted by their register start address. Move gpio_intc to the correct position.
No functional changes intended.

---
 arch/arm/boot/dts/meson.dtsi | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

index 4926133077b3..b750c837ec39 100644
@@ -85,15 +85,6 @@
 				reg = <0x7c00 0x200>;
 			};
 
-			gpio_intc: interrupt-controller at 9880 {
-				compatible = "amlogic,meson-gpio-intc";
-				reg = <0xc1109880 0x10>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
-				status = "disabled";
-			};
-
 			hwrng: rng at 8100 {
 				compatible = "amlogic,meson-rng";
 				reg = <0x8100 0x8>;

@@ -191,6 +182,15 @@
 				status = "disabled";
 			};
 
+			gpio_intc: interrupt-controller at 9880 {
+				compatible = "amlogic,meson-gpio-intc";
+				reg = <0xc1109880 0x10>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
+				status = "disabled";
+			};
+
 			wdt: watchdog at 9900 {
 				compatible = "amlogic,meson6-wdt";
 				reg = <0x9900 0x8>;

2.14.3

commit 200a575b68d2 ("ARM: dts: meson: organize devices in their corresponding busses") organized all peripherals in busses so that the base register offset of the bus doesn't have to be included in all child-nodes anymore.
The GPIO interrupt controller however specifies the register offset without subtracting the "cbus" base address. This leads to a problem where of_iomap inside the irq-meson-gpio driver fails because it
actually tries to map 0x182209880 (cbus base = 0xc1100000 + 0xc1109880 for the GPIO interrupt controller). Fix this by using 0x9880 as register offset.

---
 arch/arm/boot/dts/meson.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

index b750c837ec39..0d9faf1a51ea 100644
@@ -184,7 +184,7 @@
 
 			gpio_intc: interrupt-controller at 9880 {
 				compatible = "amlogic,meson-gpio-intc";
-				reg = <0xc1109880 0x10>;
+				reg = <0x9880 0x10>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;

2.14.3

And thanks for catching this early !

Thanks, adding to v4.15/fixes for v4.15-rc,

Kevin