Skip to contentSkip to conversation

ARM64: dts: meson-axg: fix register ranges for SD/eMMC

PATCH New Kevin Hilman 3 participants 4 messages Jun 4, 2018 – Jun 5, 2018

Subsystems (2)
Device tree bindings Arm/Amlogic Meson SoC support
lore
Share & tools
lore

Kevin Hilman

author maintainer
#0 lore raw

PATCH 1/1 ARM64: dts: meson-axg: fix register ranges for SD/eMMC

Based on updated information from Amlogic, correct the register range for the SD/eMMC blocks to the right size.

Reported-by Yixun Lan <[email protected]>
Signed-off-by Kevin Hilman <[email protected]>

---
Yixun, please test and confirm this still works on AXG boards.

 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/amlogic/meson-axg.dtsi +2 -2
index fee87737a201..67d7115e4eff 100644
@@ -132,7 +132,7 @@
 
 			sd_emmc_b: sd at 5000 {
 				compatible = "amlogic,meson-axg-mmc";
-				reg = <0x0 0x5000 0x0 0x2000>;
+				reg = <0x0 0x5000 0x0 0x800>;
 				interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
 				status = "disabled";
 				clocks = <&clkc CLKID_SD_EMMC_B>,

@@ -144,7 +144,7 @@
 
 			sd_emmc_c: mmc at 7000 {
 				compatible = "amlogic,meson-axg-mmc";
-				reg = <0x0 0x7000 0x0 0x2000>;
+				reg = <0x0 0x7000 0x0 0x800>;
 				interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
 				status = "disabled";
 				clocks = <&clkc CLKID_SD_EMMC_C>,
Signature · 1 line
2.11.0
#1 lore raw

PATCH 1/1 ARM64: dts: meson-axg: fix register ranges for SD/eMMC

Hi Kevin

Quoted 26 lines · Kevin Hilman

Based on updated information from Amlogic, correct the register range for the SD/eMMC blocks to the right size.

Reported-by Yixun Lan <[email protected]>
Signed-off-by Kevin Hilman <[email protected]>

---
Yixun, please test and confirm this still works on AXG boards.

 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/amlogic/meson-axg.dtsi +1 -1
index fee87737a201..67d7115e4eff 100644
@@ -132,7 +132,7 @@
 
 			sd_emmc_b: sd at 5000 {
 				compatible = "amlogic,meson-axg-mmc";
-				reg = <0x0 0x5000 0x0 0x2000>;
+				reg = <0x0 0x5000 0x0 0x800>;
 				interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
 				status = "disabled";
 				clocks = <&clkc CLKID_SD_EMMC_B>,

arch/arm64/boot/dts/amlogic/meson-axg.dtsi line 150

Quoted 8 lines
arch/arm64/boot/dts/amlogic/meson-axg.dtsi +1 -1
@@ -144,7 +144,7 @@
 
 			sd_emmc_c: mmc at 7000 {
 				compatible = "amlogic,meson-axg-mmc";
-				reg = <0x0 0x7000 0x0 0x2000>;
+				reg = <0x0 0x7000 0x0 0x800>;
 				interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
 				status = "disabled";
 				clocks = <&clkc CLKID_SD_EMMC_C>,

Starting from GXBB series, the SD/eMMC register range is changed to 0x800, so arch/arm64/boot/dts/amlogic/meson-gx.dtsi also need to be adjusted

Also, test passed on boards: GXBB(p200), GXL(p212, p230), AXG(s400)

Thanks for bringing up this, and fix them.

Yixun

reviewer
#2 lore raw

PATCH 1/1 ARM64: dts: meson-axg: fix register ranges for SD/eMMC

In reply to Kevin Hilman
Quoted 5 lines · Kevin Hilman

Based on updated information from Amlogic, correct the register range for the SD/eMMC blocks to the right size.

Reported-by Yixun Lan <[email protected]>
Signed-off-by Kevin Hilman <[email protected]>

Shouldn't we make the same the change on the gx family ?

Quoted 28 lines

---
Yixun, please test and confirm this still works on AXG boards.

 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/amlogic/meson-axg.dtsi +2 -2
index fee87737a201..67d7115e4eff 100644
@@ -132,7 +132,7 @@
 
 			sd_emmc_b: sd at 5000 {
 				compatible = "amlogic,meson-axg-mmc";
-				reg = <0x0 0x5000 0x0 0x2000>;
+				reg = <0x0 0x5000 0x0 0x800>;
 				interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
 				status = "disabled";
 				clocks = <&clkc CLKID_SD_EMMC_B>,

@@ -144,7 +144,7 @@
 
 			sd_emmc_c: mmc at 7000 {
 				compatible = "amlogic,meson-axg-mmc";
-				reg = <0x0 0x7000 0x0 0x2000>;
+				reg = <0x0 0x7000 0x0 0x800>;
 				interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
 				status = "disabled";
 				clocks = <&clkc CLKID_SD_EMMC_C>,
author maintainer
#3 lore raw

PATCH 1/1 ARM64: dts: meson-axg: fix register ranges for SD/eMMC

Quoted 9 lines · Jerome Brunet
Quoted 5 lines · Kevin Hilman

Based on updated information from Amlogic, correct the register range for the SD/eMMC blocks to the right size.

Reported-by Yixun Lan <[email protected]>
Signed-off-by Kevin Hilman <[email protected]>

Shouldn't we make the same the change on the gx family ?

Yes, I was waiting for confirmation from Yixun. Will spin a v2 with GX included.

Kevin

Quoted 28 lines
Quoted 28 lines

---
Yixun, please test and confirm this still works on AXG boards.

 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/amlogic/meson-axg.dtsi +2 -2
index fee87737a201..67d7115e4eff 100644
@@ -132,7 +132,7 @@
 
 			sd_emmc_b: sd at 5000 {
 				compatible = "amlogic,meson-axg-mmc";
-				reg = <0x0 0x5000 0x0 0x2000>;
+				reg = <0x0 0x5000 0x0 0x800>;
 				interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
 				status = "disabled";
 				clocks = <&clkc CLKID_SD_EMMC_B>,

@@ -144,7 +144,7 @@
 
 			sd_emmc_c: mmc at 7000 {
 				compatible = "amlogic,meson-axg-mmc";
-				reg = <0x0 0x7000 0x0 0x2000>;
+				reg = <0x0 0x7000 0x0 0x800>;
 				interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
 				status = "disabled";
 				clocks = <&clkc CLKID_SD_EMMC_C>,