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drivers: pwm: sun4i: Improve support for A64 SoCs

PATCH New Andre Przywara 6 participants 10 messages Mar 18, 2018 – Mar 27, 2018

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#0 lore raw

v2 cover drivers: pwm: sun4i: Improve support for A64 SoCs

A rework addressing the comments. I dropped the H6 and the reset support for now, to simplify merging this series.

This series adds PWM support for new Allwinner SoCs. Actually the A64 PWM is fully compatible with the A13 and H3 PWM IP, so the driver does not need any additional code. But I use this opportunity to provide some cleanup.
Patch 1 removes a no longer used parameter from our per-SoC data structure, to simplify patch 2, which groups SoCs with a compatible PWM controller. Patch 3 adds the new compatible strings to the binding documentation (and just there, we expect to use "allwinner,sun5i-a13-pwm" as a fallback compatible string).
The final patch 4 adds the respective PWM nodes to the A64 .dtsi. This eventually does not enable the PWM on any new board at the moment, as the PWM pins are either not usable (muxed with Ethernet) or exposed on a header pin not dedicated to PWM. But the Pinebook (and Teres I) should be able to use the PWM for the LCD backlights, plus users can enable the R_PWM on their Pine64 boards, if they like.

Tested by manually enabling r_pwm on a Pine64-LTS.

Cheers,
Andre.

Andre Przywara (4):
pwm: sun4i: drop unused .has_rdy member
pwm: sun4i: simplify controller mapping
dt-bindings: pwm: sunxi: add new compatible strings
dts: sunxi: A64: Add PWM controllers

 .../devicetree/bindings/pwm/pwm-sun4i.txt          |  2 ++
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi      | 28 +++++++++++++++++++
 drivers/pwm/pwm-sun4i.c                            | 32 ++++++----------------
 3 files changed, 38 insertions(+), 24 deletions(-)
Signature · 1 line
2.14.1
#1 lore raw

PATCH v2 1/4 pwm: sun4i: drop unused .has_rdy member

Commit a054c4d68408 ("pwm: sun4i: Drop legacy callbacks") dropped the only user of the .has_rdy member in our sun4i_pwm_data struct. Consequently we don't need to store this anymore for the various SoCs, which paves the way for further simplifications.

---
 drivers/pwm/pwm-sun4i.c | 6 ------
 1 file changed, 6 deletions(-)
drivers/pwm/pwm-sun4i.c +0 -6
index 334199c58f1d..b3e4a4b3774d 100644
@@ -73,7 +73,6 @@ static const u32 prescaler_table[] = {
 
 struct sun4i_pwm_data {
 	bool has_prescaler_bypass;
-	bool has_rdy;
 	unsigned int npwm;
 };
 
@@ -313,31 +312,26 @@ static const struct pwm_ops sun4i_pwm_ops = {
 
 static const struct sun4i_pwm_data sun4i_pwm_data_a10 = {
 	.has_prescaler_bypass = false,
-	.has_rdy = false,
 	.npwm = 2,
 };
 
 static const struct sun4i_pwm_data sun4i_pwm_data_a10s = {
 	.has_prescaler_bypass = true,
-	.has_rdy = true,
 	.npwm = 2,
 };
 
 static const struct sun4i_pwm_data sun4i_pwm_data_a13 = {
 	.has_prescaler_bypass = true,
-	.has_rdy = true,
 	.npwm = 1,
 };
 
 static const struct sun4i_pwm_data sun4i_pwm_data_a20 = {
 	.has_prescaler_bypass = true,
-	.has_rdy = true,
 	.npwm = 2,
 };
 
 static const struct sun4i_pwm_data sun4i_pwm_data_h3 = {
 	.has_prescaler_bypass = true,
-	.has_rdy = true,
 	.npwm = 1,
 };
 
Signature · 1 line
2.14.1
#2 lore raw

PATCH v2 2/4 pwm: sun4i: simplify controller mapping

In reply to Andre Przywara

At the moment we assign our supported compatible strings to a respective instance of our sun4i_pwm_data structure, even though some of them are the same.
To avoid further clutter, split out the three different combinations of features we have at the moment and name them accordingly. This should make it more obvious which compatible string to use for new SoCs.

---
 drivers/pwm/pwm-sun4i.c | 26 ++++++++------------------
 1 file changed, 8 insertions(+), 18 deletions(-)
drivers/pwm/pwm-sun4i.c +8 -18
index b3e4a4b3774d..078172dee462 100644
@@ -310,27 +310,17 @@ static const struct pwm_ops sun4i_pwm_ops = {
 	.owner = THIS_MODULE,
 };
 
-static const struct sun4i_pwm_data sun4i_pwm_data_a10 = {
+static const struct sun4i_pwm_data sun4i_pwm_dual_nobypass = {
 	.has_prescaler_bypass = false,
 	.npwm = 2,
 };
 
-static const struct sun4i_pwm_data sun4i_pwm_data_a10s = {
+static const struct sun4i_pwm_data sun4i_pwm_dual_bypass = {
 	.has_prescaler_bypass = true,
 	.npwm = 2,
 };
 
-static const struct sun4i_pwm_data sun4i_pwm_data_a13 = {
-	.has_prescaler_bypass = true,
-	.npwm = 1,
-};
-
-static const struct sun4i_pwm_data sun4i_pwm_data_a20 = {
-	.has_prescaler_bypass = true,
-	.npwm = 2,
-};
-
-static const struct sun4i_pwm_data sun4i_pwm_data_h3 = {
+static const struct sun4i_pwm_data sun4i_pwm_single_bypass = {
 	.has_prescaler_bypass = true,
 	.npwm = 1,
 };
@@ -338,19 +328,19 @@ static const struct sun4i_pwm_data sun4i_pwm_data_h3 = {
 static const struct of_device_id sun4i_pwm_dt_ids[] = {
 	{
 		.compatible = "allwinner,sun4i-a10-pwm",
-		.data = &sun4i_pwm_data_a10,
+		.data = &sun4i_pwm_dual_nobypass,
 	}, {
 		.compatible = "allwinner,sun5i-a10s-pwm",
-		.data = &sun4i_pwm_data_a10s,
+		.data = &sun4i_pwm_dual_bypass,
 	}, {
 		.compatible = "allwinner,sun5i-a13-pwm",
-		.data = &sun4i_pwm_data_a13,
+		.data = &sun4i_pwm_single_bypass,
 	}, {
 		.compatible = "allwinner,sun7i-a20-pwm",
-		.data = &sun4i_pwm_data_a20,
+		.data = &sun4i_pwm_dual_bypass,
 	}, {
 		.compatible = "allwinner,sun8i-h3-pwm",
-		.data = &sun4i_pwm_data_h3,
+		.data = &sun4i_pwm_single_bypass,
 	}, {
 		/* sentinel */
 	},
Signature · 1 line
2.14.1
#3 lore raw

PATCH v2 3/4 dt-bindings: pwm: sunxi: add new compatible strings

In reply to Andre Przywara

The PWM controllers found in the Allwinner A64 and H5 SoCs are fully compatible to the PWM controllers found in the A13 and H3. Add new compatible strings for those SoCs to the binding document, so that they can be safely used, together with a fallback string (preferably "allwinner,sun5i-a13-pwm").

---
 Documentation/devicetree/bindings/pwm/pwm-sun4i.txt | 2 ++
 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/pwm/pwm-sun4i.txt +2 -0
index 51ff54c8b8ef..2a1affbff45e 100644
@@ -7,6 +7,8 @@ Required properties:
     - "allwinner,sun5i-a13-pwm"
     - "allwinner,sun7i-a20-pwm"
     - "allwinner,sun8i-h3-pwm"
+    - "allwinner,sun50i-a64-pwm", "allwinner,sun5i-a13-pwm"
+    - "allwinner,sun50i-h5-pwm", "allwinner,sun5i-a13-pwm"
   - reg: physical base address and length of the controller's registers
   - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
     the cells format.
Signature · 1 line
2.14.1
#4 lore raw

PATCH v2 3/4 dt-bindings: pwm: sunxi: add new compatible strings

Quoted 7 lines · Andre Przywara

The PWM controllers found in the Allwinner A64 and H5 SoCs are fully compatible to the PWM controllers found in the A13 and H3. Add new compatible strings for those SoCs to the binding document, so that they can be safely used, together with a fallback string (preferably "allwinner,sun5i-a13-pwm").

Maxime

Signature · 3 lines
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
maintainer
#5 lore raw

PATCH v2 3/4 dt-bindings: pwm: sunxi: add new compatible strings

In reply to Andre Przywara
Quoted 10 lines · Andre Przywara

The PWM controllers found in the Allwinner A64 and H5 SoCs are fully compatible to the PWM controllers found in the A13 and H3. Add new compatible strings for those SoCs to the binding document, so that they can be safely used, together with a fallback string (preferably "allwinner,sun5i-a13-pwm").

---
 Documentation/devicetree/bindings/pwm/pwm-sun4i.txt | 2 ++
 1 file changed, 2 insertions(+)
#6 lore raw

PATCH v2 4/4 dts: sunxi: A64: Add PWM controllers

In reply to Andre Przywara

The Allwinner A64 SoC features two PWM controllers, which are fully compatible to the one used in the A13 and H3 chips.
Add the respective device nodes (one for the "normal" PWM, the other for the one in the CPUS domain) and the pin their output is connected to. On the A64 the "normal" PWM is muxed together with one of the MDIO pins used to communicate with the Ethernet PHY, so it won't be usable on many boards. But the Pinebook laptop uses this pin for controlling the LCD backlight.
The CPUS PWM pin however is routed to the "RPi2" header, at the same location as the PWM pin on the RaspberryPi.

---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 28 +++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +28 -0
index d783d164b9c3..fda1783b1c86 100644
@@ -321,6 +321,11 @@
 				bias-pull-up;
 			};
 
+			pwm_pin: pwm_pin {
+				pins = "PD22";
+				function = "pwm";
+			};
+
 			rmii_pins: rmii_pins {
 				pins = "PD10", "PD11", "PD13", "PD14", "PD17",
 				       "PD18", "PD19", "PD20", "PD22", "PD23";
@@ -537,6 +542,15 @@
 			#interrupt-cells = <3>;
 		};
 
+		pwm: pwm at 1c21400 {
+			compatible = "allwinner,sun50i-a64-pwm",
+				     "allwinner,sun5i-a13-pwm";
+			reg = <0x01c21400 0x400>;
+			clocks = <&osc24M>;
+			#pwm-cells = <3>;
+			status = "disabled";
+		};
+
 		rtc: rtc at 1f00000 {
 			compatible = "allwinner,sun6i-a31-rtc";
 			reg = <0x01f00000 0x54>;
@@ -563,6 +577,15 @@
 			#reset-cells = <1>;
 		};
 
+		r_pwm: pwm at 1f03800 {
+			compatible = "allwinner,sun50i-a64-pwm",
+				     "allwinner,sun5i-a13-pwm";
+			reg = <0x01f03800 0x400>;
+			clocks = <&osc24M>;
+			#pwm-cells = <3>;
+			status = "disabled";
+		};
+
 		r_pio: pinctrl at 1f02c00 {
 			compatible = "allwinner,sun50i-a64-r-pinctrl";
 			reg = <0x01f02c00 0x400>;
@@ -578,6 +601,11 @@
 				pins = "PL0", "PL1";
 				function = "s_rsb";
 			};
+
+			r_pwm_pin: pwm {
+				pins = "PL10";
+				function = "s_pwm";
+			};
 		};
 
 		r_rsb: rsb at 1f03400 {
Signature · 1 line
2.14.1
#7 lore raw

PATCH v2 4/4 dts: sunxi: A64: Add PWM controllers

Quoted 4 lines · On Montag, 19. M?rz 2018 00:28:47 CET Andre Przywara wrote:

The Allwinner A64 SoC features two PWM controllers, which are fully compatible to the one used in the A13 and H3 chips.
Add the respective device nodes (one for the "normal" PWM, the other for the one in the CPUS domain) and the pin their output is connected to.

"Add the nodes for the devices (...) and the pins their outputs are connected to."

Quoted 6 lines

On the A64 the "normal" PWM is muxed together with one of the MDIO pins used to communicate with the Ethernet PHY, so it won't be usable on many boards. But the Pinebook laptop uses this pin for controlling the LCD backlight.
The CPUS PWM pin however is routed to the "RPi2" header, at the same location as the PWM pin on the RaspberryPi.

The last sentence is misssing a reference to the Pine64.

arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi

Quoted 11 lines
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 28

+++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)

(quoted diff) +0 -0

b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index d783d164b9c3..fda1783b1c86 100644

arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +0 -0
@@ -321,6 +321,11 @@

<...>

Kind regards,

Stefan

Signature · 9 lines
Stefan Br?ns  /  Bergstra?e 21  /  52062 Aachen
home: +49 241 53809034     mobile: +49 151 50412019
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#8 lore raw

PATCH v2 4/4 dts: sunxi: A64: Add PWM controllers

In reply to Andre Przywara
Quoted 8 lines · Andre Przywara

The Allwinner A64 SoC features two PWM controllers, which are fully compatible to the one used in the A13 and H3 chips.
Add the respective device nodes (one for the "normal" PWM, the other for the one in the CPUS domain) and the pin their output is connected to. On the A64 the "normal" PWM is muxed together with one of the MDIO pins used to communicate with the Ethernet PHY, so it won't be usable on many boards. But the Pinebook laptop uses this pin for controlling the LCD backlight.

for the entire series:

Thanks for your work,
Harald

Quoted 68 lines

The CPUS PWM pin however is routed to the "RPi2" header, at the same location as the PWM pin on the RaspberryPi.

---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 28 +++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +28 -0
index d783d164b9c3..fda1783b1c86 100644
@@ -321,6 +321,11 @@
 				bias-pull-up;
 			};
 
+			pwm_pin: pwm_pin {
+				pins = "PD22";
+				function = "pwm";
+			};
+
 			rmii_pins: rmii_pins {
 				pins = "PD10", "PD11", "PD13", "PD14", "PD17",
 				       "PD18", "PD19", "PD20", "PD22", "PD23";
@@ -537,6 +542,15 @@
 			#interrupt-cells = <3>;
 		};
 
+		pwm: pwm at 1c21400 {
+			compatible = "allwinner,sun50i-a64-pwm",
+				     "allwinner,sun5i-a13-pwm";
+			reg = <0x01c21400 0x400>;
+			clocks = <&osc24M>;
+			#pwm-cells = <3>;
+			status = "disabled";
+		};
+
 		rtc: rtc at 1f00000 {
 			compatible = "allwinner,sun6i-a31-rtc";
 			reg = <0x01f00000 0x54>;
@@ -563,6 +577,15 @@
 			#reset-cells = <1>;
 		};
 
+		r_pwm: pwm at 1f03800 {
+			compatible = "allwinner,sun50i-a64-pwm",
+				     "allwinner,sun5i-a13-pwm";
+			reg = <0x01f03800 0x400>;
+			clocks = <&osc24M>;
+			#pwm-cells = <3>;
+			status = "disabled";
+		};
+
 		r_pio: pinctrl at 1f02c00 {
 			compatible = "allwinner,sun50i-a64-r-pinctrl";
 			reg = <0x01f02c00 0x400>;
@@ -578,6 +601,11 @@
 				pins = "PL0", "PL1";
 				function = "s_rsb";
 			};
+
+			r_pwm_pin: pwm {
+				pins = "PL10";
+				function = "s_pwm";
+			};
 		};
 
 		r_rsb: rsb at 1f03400 {
Signature · 4 lines
If you want to support my work:
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#9 lore raw

v2 cover drivers: pwm: sun4i: Improve support for A64 SoCs

In reply to Andre Przywara
Quoted 30 lines · Andre Przywara

A rework addressing the comments. I dropped the H6 and the reset support for now, to simplify merging this series.

This series adds PWM support for new Allwinner SoCs. Actually the A64 PWM is fully compatible with the A13 and H3 PWM IP, so the driver does not need any additional code. But I use this opportunity to provide some cleanup.
Patch 1 removes a no longer used parameter from our per-SoC data structure, to simplify patch 2, which groups SoCs with a compatible PWM controller. Patch 3 adds the new compatible strings to the binding documentation (and just there, we expect to use "allwinner,sun5i-a13-pwm" as a fallback compatible string).
The final patch 4 adds the respective PWM nodes to the A64 .dtsi. This eventually does not enable the PWM on any new board at the moment, as the PWM pins are either not usable (muxed with Ethernet) or exposed on a header pin not dedicated to PWM. But the Pinebook (and Teres I) should be able to use the PWM for the LCD backlights, plus users can enable the R_PWM on their Pine64 boards, if they like.

Tested by manually enabling r_pwm on a Pine64-LTS.

Cheers,
Andre.

Andre Przywara (4):
pwm: sun4i: drop unused .has_rdy member
pwm: sun4i: simplify controller mapping
dt-bindings: pwm: sunxi: add new compatible strings
dts: sunxi: A64: Add PWM controllers

Quoted 4 lines
 .../devicetree/bindings/pwm/pwm-sun4i.txt          |  2 ++
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi      | 28 +++++++++++++++++++
 drivers/pwm/pwm-sun4i.c                            | 32 ++++++----------------
 3 files changed, 38 insertions(+), 24 deletions(-)

Applied patches 1-3, thanks.

Thierry
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