ARM: MMP multiplatform support

PATCH New Arnd Bergmann 4 participants 17 messages Feb 27, 2015 – Mar 13, 2015

Subsystems (6)

Arm (32-bit) Arm sub-architectures Memory technology devices (MTD) Common clk +2 more subsystems

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Arnd Bergmann

author

2015-02-27 13:29 UTC #0 lore raw

cover ARM: MMP multiplatform support

Hi everyone,

I'd like to finally move MMP into ARCH_MULTIPLATFORM, and this is the surprisingly small patch set that we need in order to do this.

Rob Herring has done some related work already, and we need his RTC driver changes to also get merged in order for this to work, see also
http://comments.gmane.org/gmane.linux.ports.arm.kernel/391410

Please review and test if you can.

Arnd

Arnd Bergmann (8):
mtd: nand: pxa3xx: disable DMA support on MMP
clk: mmp: stop using platform headers
ARM: make xscale iwmmxt code multiplatform aware
ARM: mohawk: allow building with MMU disabled
ARM: mmp: remove remaining legacy pxa-dma support
ARM: mmp: make all header files local
ARM: mmp: make plat-pxa build standalone
ARM: mmp: move into ARCH_MULTIPLATFORM

 arch/arm/Kconfig                                   | 15 --------
 arch/arm/include/asm/cputype.h                     | 27 ++++++++++++-
 arch/arm/kernel/Makefile                           |  1 +
 arch/arm/kernel/xscale-cp0.c                       |  6 +++
 arch/arm/mach-mmp/Kconfig                          | 36 +++++++++++++----
 arch/arm/mach-mmp/Makefile                         |  1 +
 arch/arm/mach-mmp/{include/mach => }/addr-map.h    |  2 -
 arch/arm/mach-mmp/aspenite.c                       |  8 ++--
 arch/arm/mach-mmp/avengers_lite.c                  |  8 ++--
 arch/arm/mach-mmp/brownstone.c                     |  8 ++--
 arch/arm/mach-mmp/clock-mmp2.c                     |  6 ++-
 arch/arm/mach-mmp/clock-pxa168.c                   |  6 ++-
 arch/arm/mach-mmp/clock-pxa910.c                   |  6 ++-
 arch/arm/mach-mmp/clock.c                          |  2 +-
 arch/arm/mach-mmp/clock.h                          |  2 -
 arch/arm/mach-mmp/common.c                         |  4 +-
 arch/arm/mach-mmp/common.h                         |  3 --
 arch/arm/mach-mmp/{include/mach => }/cputype.h     |  0
 arch/arm/mach-mmp/devices.c                        |  8 ++--
 arch/arm/mach-mmp/{include/mach => }/devices.h     |  0
 arch/arm/mach-mmp/flint.c                          |  8 ++--
 arch/arm/mach-mmp/gplugd.c                         |  6 +--
 arch/arm/mach-mmp/include/mach/dma.h               | 13 -------
 arch/arm/mach-mmp/include/mach/hardware.h          |  4 --
 arch/arm/mach-mmp/include/mach/regs-smc.h          | 37 ------------------
 arch/arm/mach-mmp/include/mach/uncompress.h        | 45 ----------------------
 arch/arm/mach-mmp/{include/mach => }/irqs.h        |  0
 arch/arm/mach-mmp/jasper.c                         |  8 ++--
 arch/arm/mach-mmp/{include/mach => }/mfp-mmp2.h    |  2 +-
 arch/arm/mach-mmp/{include/mach => }/mfp-pxa168.h  |  2 +-
 arch/arm/mach-mmp/{include/mach => }/mfp-pxa910.h  |  2 +-
 arch/arm/mach-mmp/{include/mach => }/mfp.h         |  0
 arch/arm/mach-mmp/mmp2.c                           | 23 +++++------
 arch/arm/mach-mmp/{include/mach => }/mmp2.h        |  3 +-
 arch/arm/mach-mmp/pm-mmp2.c                        | 12 +++---
 arch/arm/mach-mmp/{include/mach => }/pm-mmp2.h     |  2 +-
 arch/arm/mach-mmp/pm-pxa910.c                      | 12 +++---
 arch/arm/mach-mmp/{include/mach => }/pm-pxa910.h   |  0
 arch/arm/mach-mmp/pxa168.c                         | 29 +++++++-------
 arch/arm/mach-mmp/{include/mach => }/pxa168.h      |  5 ++-
 arch/arm/mach-mmp/pxa910.c                         | 24 ++++++------
 arch/arm/mach-mmp/{include/mach => }/pxa910.h      |  3 +-
 arch/arm/mach-mmp/{include/mach => }/regs-apbc.h   |  4 +-
 arch/arm/mach-mmp/{include/mach => }/regs-apmu.h   |  4 +-
 arch/arm/mach-mmp/{include/mach => }/regs-icu.h    |  4 +-
 arch/arm/mach-mmp/{include/mach => }/regs-timers.h |  4 +-
 arch/arm/mach-mmp/{include/mach => }/regs-usb.h    |  0
 arch/arm/mach-mmp/tavorevb.c                       |  8 ++--
 arch/arm/mach-mmp/teton_bga.c                      | 10 ++---
 arch/arm/mach-mmp/{include/mach => }/teton_bga.h   |  2 -
 arch/arm/mach-mmp/time.c                           | 11 +++---
 arch/arm/mach-mmp/ttc_dkb.c                        | 10 ++---
 arch/arm/mm/idmap.c                                |  3 +-
 arch/arm/mm/proc-mohawk.S                          |  2 +
 arch/arm/plat-pxa/Makefile                         |  3 +-
 arch/arm/plat-pxa/ssp.c                            |  1 -
 drivers/clk/mmp/clk-mmp2.c                         | 11 +++---
 drivers/clk/mmp/clk-pxa168.c                       | 11 +++---
 drivers/clk/mmp/clk-pxa910.c                       | 13 +++----
 drivers/mtd/nand/pxa3xx_nand.c                     |  2 +-
 include/linux/clk/mmp.h                            | 17 ++++++++
 61 files changed, 229 insertions(+), 280 deletions(-)
 rename arch/arm/mach-mmp/{include/mach => }/addr-map.h (96%)
 rename arch/arm/mach-mmp/{include/mach => }/cputype.h (100%)
 rename arch/arm/mach-mmp/{include/mach => }/devices.h (100%)
 delete mode 100644 arch/arm/mach-mmp/include/mach/dma.h
 delete mode 100644 arch/arm/mach-mmp/include/mach/hardware.h
 delete mode 100644 arch/arm/mach-mmp/include/mach/regs-smc.h
 delete mode 100644 arch/arm/mach-mmp/include/mach/uncompress.h
 rename arch/arm/mach-mmp/{include/mach => }/irqs.h (100%)
 rename arch/arm/mach-mmp/{include/mach => }/mfp-mmp2.h (99%)
 rename arch/arm/mach-mmp/{include/mach => }/mfp-pxa168.h (99%)
 rename arch/arm/mach-mmp/{include/mach => }/mfp-pxa910.h (99%)
 rename arch/arm/mach-mmp/{include/mach => }/mfp.h (100%)
 rename arch/arm/mach-mmp/{include/mach => }/mmp2.h (99%)
 rename arch/arm/mach-mmp/{include/mach => }/pm-mmp2.h (98%)
 rename arch/arm/mach-mmp/{include/mach => }/pm-pxa910.h (100%)
 rename arch/arm/mach-mmp/{include/mach => }/pxa168.h (98%)
 rename arch/arm/mach-mmp/{include/mach => }/pxa910.h (98%)
 rename arch/arm/mach-mmp/{include/mach => }/regs-apbc.h (88%)
 rename arch/arm/mach-mmp/{include/mach => }/regs-apmu.h (91%)
 rename arch/arm/mach-mmp/{include/mach => }/regs-icu.h (96%)
 rename arch/arm/mach-mmp/{include/mach => }/regs-timers.h (93%)
 rename arch/arm/mach-mmp/{include/mach => }/regs-usb.h (100%)
 rename arch/arm/mach-mmp/{include/mach => }/teton_bga.h (92%)
 create mode 100644 include/linux/clk/mmp.h

Signature · 1 line

2.1.0.rc2

Arnd Bergmann

author

2015-02-27 13:29 UTC #1 lore raw

PATCH 1/8 mtd: nand: pxa3xx: disable DMA support on MMP

The MMP platform traditionally uses ad-hoc DMA engine support by having the slave drivers write directly to the DMA register set, just as we do for PXA.

Nowadays, MMP has a proper dmaengine driver, but that conflicts with the old method, so we cannot enable both at the same time.

Independent of this, we want to have multiplatform support on MMP, which means the mach/dma.h header file becomes inaccessible to the nand driver.

This patch disables the ad-hoc DMA support in the pxa3xx nand driver for MMP, leaving it enabled only for PXA, to address both of the above issues.

A patch series from Daniel Mack exists that should address the performance impact this has over the traditional method:
http://www.spinics.net/lists/arm-kernel/msg265162.html
This patch series is still under review and needs more testing, but I hope we can merge it soon.

Signed-off-by Arnd Bergmann <[email protected]>

Cc Eric Miao <[email protected]>

Cc Haojian Zhuang <[email protected]>

Cc David Woodhouse <[email protected]>

Cc Brian Norris <[email protected]>

Cc Daniel Mack <[email protected]>

---
 drivers/mtd/nand/pxa3xx_nand.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/mtd/nand/pxa3xx_nand.c +1 -1

index 96b0b1d27df1..06d449591432 100644
@@ -28,7 +28,7 @@
 #include <linux/of_device.h>
 #include <linux/of_mtd.h>
 
-#if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)
+#if defined(CONFIG_ARCH_PXA)
 #define ARCH_HAS_DMA
 #endif

Signature · 1 line

2.1.0.rc2

Arnd Bergmann

author

2015-02-27 13:29 UTC #2 lore raw

PATCH 2/8 clk: mmp: stop using platform headers

In reply to Arnd Bergmann

The mmp clock drivers currently hardcode the physical addresses for the clock registers. This is generally a bad idea, and it also gets in the way of multiplatform builds, which make the platform header files inaccessible to device drivers.

To work around the header file problem, this patch changes the calling convention so the three mmp clock drivers get initialized with the base addresses as arguments from the platform code.

It would still be useful to have a larger rework of the clock drivers, with DT integration to let the clocks actually be probed automatically, and the base addresses passed as DT properties. I am unsure if anyone is still interested in the mmp platform, so it is possible that this won't happen.

Signed-off-by Arnd Bergmann <[email protected]>

Cc Mike Turquette <[email protected]>

Cc Chao Xie <[email protected]>

Cc Eric Miao <[email protected]>

Cc Haojian Zhuang <[email protected]>

---
 arch/arm/mach-mmp/clock-mmp2.c   |  4 +++-
 arch/arm/mach-mmp/clock-pxa168.c |  4 +++-
 arch/arm/mach-mmp/clock-pxa910.c |  4 +++-
 arch/arm/mach-mmp/common.h       |  3 ---
 arch/arm/mach-mmp/mmp2.c         |  5 ++++-
 arch/arm/mach-mmp/pxa168.c       |  5 ++++-
 arch/arm/mach-mmp/pxa910.c       |  6 +++++-
 drivers/clk/mmp/clk-mmp2.c       | 11 +++++------
 drivers/clk/mmp/clk-pxa168.c     | 11 +++++------
 drivers/clk/mmp/clk-pxa910.c     | 13 ++++++-------
 include/linux/clk/mmp.h          | 17 +++++++++++++++++
 11 files changed, 55 insertions(+), 28 deletions(-)
 create mode 100644 include/linux/clk/mmp.h

arch/arm/mach-mmp/clock-mmp2.c +3 -1

index 53d77cbd6000..6847c49bbb39 100644
@@ -4,6 +4,7 @@
 #include <linux/list.h>
 #include <linux/io.h>
 #include <linux/clk.h>
+#include <linux/clk/mmp.h>
 
 #include <mach/addr-map.h>

@@ -105,7 +106,8 @@ static struct clk_lookup mmp2_clkregs[] = {
 	INIT_CLKREG(&clk_sdh3, "sdhci-pxav3.3", "PXA-SDHCLK"),
 };
 
-void __init mmp2_clk_init(void)
+void __init mmp2_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
+			  phys_addr_t apbc_phys)
 {
 	clkdev_add_table(ARRAY_AND_SIZE(mmp2_clkregs));
 }

arch/arm/mach-mmp/clock-pxa168.c +3 -1

index c572f219ae26..bfa54bb16449 100644
@@ -4,6 +4,7 @@
 #include <linux/list.h>
 #include <linux/io.h>
 #include <linux/clk.h>
+#include <linux/clk/mmp.h>
 
 #include <mach/addr-map.h>

@@ -85,7 +86,8 @@ static struct clk_lookup pxa168_clkregs[] = {
 	INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
 };
 
-void __init pxa168_clk_init(void)
+void __init pxa168_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
+			    phys_addr_t apbc_phys)
 {
 	clkdev_add_table(ARRAY_AND_SIZE(pxa168_clkregs));
 }

arch/arm/mach-mmp/clock-pxa910.c +3 -1

index 379e1df61c70..ef7d3dbc8731 100644
@@ -4,6 +4,7 @@
 #include <linux/list.h>
 #include <linux/io.h>
 #include <linux/clk.h>
+#include <linux/clk/mmp.h>
 
 #include <mach/addr-map.h>

@@ -61,7 +62,8 @@ static struct clk_lookup pxa910_clkregs[] = {
 	INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
 };
 
-void __init pxa910_clk_init(void)
+void __init pxa910_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
+			    phys_addr_t apbc_phys, phys_addr_t apbcp_phys)
 {
 	clkdev_add_table(ARRAY_AND_SIZE(pxa910_clkregs));
 }

arch/arm/mach-mmp/common.h +0 -3

index cf445bae6d77..7453a90c34bd 100644
@@ -5,6 +5,3 @@ extern void timer_init(int irq);
 
 extern void __init mmp_map_io(void);
 extern void mmp_restart(enum reboot_mode, const char *);
-extern void __init pxa168_clk_init(void);
-extern void __init pxa910_clk_init(void);
-extern void __init mmp2_clk_init(void);

arch/arm/mach-mmp/mmp2.c +4 -1

index a70b5530bd42..c8914ef21f7f 100644
@@ -9,6 +9,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+#include <linux/clk/mmp.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>

@@ -111,7 +112,9 @@ static int __init mmp2_init(void)
 		mfp_init_base(MFPR_VIRT_BASE);
 		mfp_init_addr(mmp2_addr_map);
 		pxa_init_dma(IRQ_MMP2_DMA_RIQ, 16);
-		mmp2_clk_init();
+		mmp2_clk_init(APB_PHYS_BASE + 0x50000,
+			      AXI_PHYS_BASE + 0x82800,
+			      APB_PHYS_BASE + 0x15000);
 	}
 
 	return 0;

arch/arm/mach-mmp/pxa168.c +4 -1

index 144e997624c0..53f21554ae63 100644
@@ -13,6 +13,7 @@
 #include <linux/list.h>
 #include <linux/io.h>
 #include <linux/clk.h>
+#include <linux/clk/mmp.h>
 #include <linux/platform_device.h>
 #include <linux/platform_data/mv_usb.h>

@@ -56,7 +57,9 @@ static int __init pxa168_init(void)
 		mfp_init_base(MFPR_VIRT_BASE);
 		mfp_init_addr(pxa168_mfp_addr_map);
 		pxa_init_dma(IRQ_PXA168_DMA_INT0, 32);
-		pxa168_clk_init();
+		pxa168_clk_init(APB_PHYS_BASE + 0x50000,
+				AXI_PHYS_BASE + 0x82800,
+				APB_PHYS_BASE + 0x15000);
 	}
 
 	return 0;

arch/arm/mach-mmp/pxa910.c +5 -1

index eb57ee196842..545404261327 100644
@@ -7,6 +7,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+#include <linux/clk/mmp.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>

@@ -97,7 +98,10 @@ static int __init pxa910_init(void)
 		mfp_init_base(MFPR_VIRT_BASE);
 		mfp_init_addr(pxa910_mfp_addr_map);
 		pxa_init_dma(IRQ_PXA910_DMA_INT0, 32);
-		pxa910_clk_init();
+		pxa910_clk_init(APB_PHYS_BASE + 0x50000,
+				AXI_PHYS_BASE + 0x82800,
+				APB_PHYS_BASE + 0x15000,
+				APB_PHYS_BASE + 0x3b000);
 	}
 
 	return 0;

drivers/clk/mmp/clk-mmp2.c +5 -6

index 5c90a4230fa3..f7504085e4a7 100644
@@ -16,8 +16,6 @@
 #include <linux/delay.h>
 #include <linux/err.h>
 
-#include <mach/addr-map.h>
-
 #include "clk.h"
 
 #define APBC_RTC	0x0

@@ -75,7 +73,8 @@ static const char *sdh_parent[] = {"pll1_4", "pll2", "usb_pll", "pll1"};
 static const char *disp_parent[] = {"pll1", "pll1_16", "pll2", "vctcxo"};
 static const char *ccic_parent[] = {"pll1_2", "pll1_16", "vctcxo"};
 
-void __init mmp2_clk_init(void)
+void __init mmp2_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
+			  phys_addr_t apbc_phys)
 {
 	struct clk *clk;
 	struct clk *vctcxo;

@@ -83,19 +82,19 @@ void __init mmp2_clk_init(void)
 	void __iomem *apmu_base;
 	void __iomem *apbc_base;
 
-	mpmu_base = ioremap(APB_PHYS_BASE + 0x50000, SZ_4K);
+	mpmu_base = ioremap(mpmu_phys, SZ_4K);
 	if (mpmu_base == NULL) {
 		pr_err("error to ioremap MPMU base\n");
 		return;
 	}
 
-	apmu_base = ioremap(AXI_PHYS_BASE + 0x82800, SZ_4K);
+	apmu_base = ioremap(apmu_phys, SZ_4K);
 	if (apmu_base == NULL) {
 		pr_err("error to ioremap APMU base\n");
 		return;
 	}
 
-	apbc_base = ioremap(APB_PHYS_BASE + 0x15000, SZ_4K);
+	apbc_base = ioremap(apbc_phys, SZ_4K);
 	if (apbc_base == NULL) {
 		pr_err("error to ioremap APBC base\n");
 		return;

drivers/clk/mmp/clk-pxa168.c +5 -6

index 93e967c0f972..323804f39094 100644
@@ -16,8 +16,6 @@
 #include <linux/delay.h>
 #include <linux/err.h>
 
-#include <mach/addr-map.h>
-
 #include "clk.h"
 
 #define APBC_RTC	0x28

@@ -66,7 +64,8 @@ static const char *disp_parent[] = {"pll1_2", "pll1_12"};
 static const char *ccic_parent[] = {"pll1_2", "pll1_12"};
 static const char *ccic_phy_parent[] = {"pll1_6", "pll1_12"};
 
-void __init pxa168_clk_init(void)
+void __init pxa168_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
+			    phys_addr_t apbc_phys)
 {
 	struct clk *clk;
 	struct clk *uart_pll;

@@ -74,19 +73,19 @@ void __init pxa168_clk_init(void)
 	void __iomem *apmu_base;
 	void __iomem *apbc_base;
 
-	mpmu_base = ioremap(APB_PHYS_BASE + 0x50000, SZ_4K);
+	mpmu_base = ioremap(mpmu_phys, SZ_4K);
 	if (mpmu_base == NULL) {
 		pr_err("error to ioremap MPMU base\n");
 		return;
 	}
 
-	apmu_base = ioremap(AXI_PHYS_BASE + 0x82800, SZ_4K);
+	apmu_base = ioremap(apmu_phys, SZ_4K);
 	if (apmu_base == NULL) {
 		pr_err("error to ioremap APMU base\n");
 		return;
 	}
 
-	apbc_base = ioremap(APB_PHYS_BASE + 0x15000, SZ_4K);
+	apbc_base = ioremap(apbc_phys, SZ_4K);
 	if (apbc_base == NULL) {
 		pr_err("error to ioremap APBC base\n");
 		return;

drivers/clk/mmp/clk-pxa910.c +6 -7

index 993abcdb32cc..2e723d44e5c7 100644
@@ -16,8 +16,6 @@
 #include <linux/delay.h>
 #include <linux/err.h>
 
-#include <mach/addr-map.h>
-
 #include "clk.h"
 
 #define APBC_RTC	0x28

@@ -64,7 +62,8 @@ static const char *disp_parent[] = {"pll1_2", "pll1_12"};
 static const char *ccic_parent[] = {"pll1_2", "pll1_12"};
 static const char *ccic_phy_parent[] = {"pll1_6", "pll1_12"};
 
-void __init pxa910_clk_init(void)
+void __init pxa910_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
+			    phys_addr_t apbc_phys, phys_addr_t apbcp_phys)
 {
 	struct clk *clk;
 	struct clk *uart_pll;

@@ -73,25 +72,25 @@ void __init pxa910_clk_init(void)
 	void __iomem *apbcp_base;
 	void __iomem *apbc_base;
 
-	mpmu_base = ioremap(APB_PHYS_BASE + 0x50000, SZ_4K);
+	mpmu_base = ioremap(mpmu_phys, SZ_4K);
 	if (mpmu_base == NULL) {
 		pr_err("error to ioremap MPMU base\n");
 		return;
 	}
 
-	apmu_base = ioremap(AXI_PHYS_BASE + 0x82800, SZ_4K);
+	apmu_base = ioremap(apmu_phys, SZ_4K);
 	if (apmu_base == NULL) {
 		pr_err("error to ioremap APMU base\n");
 		return;
 	}
 
-	apbcp_base = ioremap(APB_PHYS_BASE + 0x3b000, SZ_4K);
+	apbcp_base = ioremap(apbcp_phys, SZ_4K);
 	if (apbcp_base == NULL) {
 		pr_err("error to ioremap APBC extension base\n");
 		return;
 	}
 
-	apbc_base = ioremap(APB_PHYS_BASE + 0x15000, SZ_4K);
+	apbc_base = ioremap(apbc_phys, SZ_4K);
 	if (apbc_base == NULL) {
 		pr_err("error to ioremap APBC base\n");
 		return;

include/linux/clk/mmp.h new file +17 -0

new file mode 100644
index 000000000000..607321fa2c2b
@@ -0,0 +1,17 @@
+#ifndef __CLK_MMP_H
+#define __CLK_MMP_H
+
+#include <linux/types.h>
+
+extern void pxa168_clk_init(phys_addr_t mpmu_phys,
+			    phys_addr_t apmu_phys,
+			    phys_addr_t apbc_phys);
+extern void pxa910_clk_init(phys_addr_t mpmu_phys,
+			    phys_addr_t apmu_phys,
+			    phys_addr_t apbc_phys,
+			    phys_addr_t apbcp_phys);
+extern void mmp2_clk_init(phys_addr_t mpmu_phys,
+			  phys_addr_t apmu_phys,
+			  phys_addr_t apbc_phys);
+
+#endif

Signature · 1 line

2.1.0.rc2

Arnd Bergmann

author

2015-02-27 13:29 UTC #3 lore raw

PATCH 3/8 ARM: make xscale iwmmxt code multiplatform aware

In reply to Arnd Bergmann

In a multiplatform configuration, we may end up building a kernel for both Marvell PJ1 and an ARMv4 CPU implementation. In that case, the xscale-cp0 code is built with gcc -march=armv4{,t}, which results in a build error from the coprocessor instructions.

Since we know this code will only have to run on an actual xscale processor, we can simply build the entire file for ARMv5TE.

Related to this, we need to handle the iWMMXT initialization sequence differently during boot, to ensure we don't try to touch xscale specific registers on other CPUs from the xscale_cp0_init initcall. cpu_is_xscale() used to be hardcoded to '1' in any configuration that enables any XScale-compatible core, but this breaks once we can have a combined kernel with MMP1 and something else.

In this patch, I introduce two new macros, cpu_is_xscale() and cpu_is_mohawk, so we can test for all three of them in the iwmmxt initialization. The two existing users of cpu_is_xscale() are modified accordingly, but slightly change behavior for kernels that enable CPU_MOHAWK in combination with CPU_XSCALE or CPU_XSC3. Previously, these would leave clear PMD_BIT4 in the page tables, now they leave it untouched, just like we always do for kernels that enable only CPU_MOHAWK. Since the previous behavior was inconsistent, I assume it was unintentional.

Signed-off-by Arnd Bergmann <[email protected]>

---
 arch/arm/include/asm/cputype.h | 27 +++++++++++++++++++++++++--
 arch/arm/kernel/Makefile       |  1 +
 arch/arm/kernel/xscale-cp0.c   |  6 ++++++
 arch/arm/mm/idmap.c            |  3 ++-
 4 files changed, 34 insertions(+), 3 deletions(-)

arch/arm/include/asm/cputype.h +25 -2

index 819777d0e91f..7bc66e22afd7 100644
@@ -228,10 +228,33 @@ static inline int cpu_is_xsc3(void)
 }
 #endif
 
-#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
+#if !defined(CONFIG_CPU_XSCALE)
 #define	cpu_is_xscale()	0
 #else
-#define	cpu_is_xscale()	1
+static inline int cpu_is_xscale(void)
+{
+	unsigned int id;
+	id = read_cpuid_id() & 0xffffe000;
+
+	if ((id == 0x69052000) || (id == 0x69054000))
+		return 1;
+
+	return 0;
+}
+#endif
+
+#if !defined(CONFIG_CPU_MOHAWK)
+#define	cpu_is_mohawk()	0
+#else
+static inline int cpu_is_mohawk(void)
+{
+	unsigned int id;
+	id = read_cpuid_id() & 0xffffe000;
+
+	if (id == 0x56158000)
+
+	return 0;
+}
 #endif
 
 /*

arch/arm/kernel/Makefile +1 -0

index 902397dd1000..7840acff6cd3 100644
@@ -67,6 +67,7 @@ obj-$(CONFIG_HAVE_HW_BREAKPOINT)	+= hw_breakpoint.o
 obj-$(CONFIG_CPU_XSCALE)	+= xscale-cp0.o
 obj-$(CONFIG_CPU_XSC3)		+= xscale-cp0.o
 obj-$(CONFIG_CPU_MOHAWK)	+= xscale-cp0.o
+CFLAGS_xscale-cp0.o		+= -Wa,-march=armv5te
 obj-$(CONFIG_CPU_PJ4)		+= pj4-cp0.o
 obj-$(CONFIG_CPU_PJ4B)		+= pj4-cp0.o
 obj-$(CONFIG_IWMMXT)		+= iwmmxt.o

arch/arm/kernel/xscale-cp0.c +6 -0

index bdbb8853a19b..a23420fab70e 100644
@@ -15,6 +15,7 @@
 #include <linux/init.h>
 #include <linux/io.h>
 #include <asm/thread_notify.h>
+#include <asm/cputype.h>
 
 static inline void dsp_save_state(u32 *state)
 {

@@ -152,6 +153,11 @@ static int __init xscale_cp0_init(void)
 {
 	u32 cp_access;
 
+	/* do not attempt to probe iwmmxt on non-xscale family CPUs */
+	if (IS_ENABLED(CONFIG_ARCH_MULTIPLATFORM) &&
+	    !(cpu_is_xscale() || cpu_is_xsc3() || cpu_is_mohawk()))
+		return 0;
+
 	cp_access = xscale_cp_access_read() & ~3;
 	xscale_cp_access_write(cp_access | 1);

arch/arm/mm/idmap.c +2 -1

index e7a81cebbb2e..40140984db0a 100644
@@ -86,7 +86,8 @@ static void identity_mapping_add(pgd_t *pgd, const char *text_start,
 
 	prot |= PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AF;
 
-	if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
+	if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ &&
+	    !cpu_is_xscale() && !cpu_is_xsc3())
 		prot |= PMD_BIT4;
 
 	pgd += pgd_index(addr);

Signature · 1 line

2.1.0.rc2

Rob Herring

2015-02-27 17:53 UTC #4 lore raw

PATCH 3/8 ARM: make xscale iwmmxt code multiplatform aware

Quoted 39 lines · Arnd Bergmann

In a multiplatform configuration, we may end up building a kernel for both Marvell PJ1 and an ARMv4 CPU implementation. In that case, the xscale-cp0 code is built with gcc -march=armv4{,t}, which results in a build error from the coprocessor instructions.
Since we know this code will only have to run on an actual xscale processor, we can simply build the entire file for ARMv5TE.
Related to this, we need to handle the iWMMXT initialization sequence differently during boot, to ensure we don't try to touch xscale specific registers on other CPUs from the xscale_cp0_init initcall. cpu_is_xscale() used to be hardcoded to '1' in any configuration that enables any XScale-compatible core, but this breaks once we can have a combined kernel with MMP1 and something else.
In this patch, I introduce two new macros, cpu_is_xscale() and cpu_is_mohawk, so we can test for all three of them in the iwmmxt initialization. The two existing users of cpu_is_xscale() are modified accordingly, but slightly change behavior for kernels that enable CPU_MOHAWK in combination with CPU_XSCALE or CPU_XSC3. Previously, these would leave clear PMD_BIT4 in the page tables, now they leave it untouched, just like we always do for kernels that enable only CPU_MOHAWK. Since the previous behavior was inconsistent, I assume it was unintentional.
Signed-off-by Arnd Bergmann <[email protected]>
---
 arch/arm/include/asm/cputype.h | 27 +++++++++++++++++++++++++--
 arch/arm/kernel/Makefile       |  1 +
 arch/arm/kernel/xscale-cp0.c   |  6 ++++++
 arch/arm/mm/idmap.c            |  3 ++-
 4 files changed, 34 insertions(+), 3 deletions(-)
arch/arm/include/asm/cputype.h +0 -0
index 819777d0e91f..7bc66e22afd7 100644

arch/arm/include/asm/cputype.h static inline int cpu_is_xsc3(void) · line 231

Quoted 5 lines

arch/arm/include/asm/cputype.h +1 -1

@@ -228,10 +228,33 @@ static inline int cpu_is_xsc3(void)
 }
 #endif
 
-#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
+#if !defined(CONFIG_CPU_XSCALE)

You could use IS_ENABLED here.

Quoted 6 lines

arch/arm/include/asm/cputype.h +3 -1

 #define        cpu_is_xscale() 0
 #else
-#define        cpu_is_xscale() 1
+static inline int cpu_is_xscale(void)
+{
+       unsigned int id;

arch/arm/include/asm/cputype.h static inline int cpu_is_xsc3(void) · line 246

Quoted 10 lines

arch/arm/include/asm/cputype.h +10 -0

+       id = read_cpuid_id() & 0xffffe000;
+
+       if ((id == 0x69052000) || (id == 0x69054000))
+               return 1;
+
+       return 0;
+}
+#endif
+
+#if !defined(CONFIG_CPU_MOHAWK)

And here.

Quoted 39 lines

arch/arm/include/asm/cputype.h +11 -0

+#define        cpu_is_mohawk() 0
+#else
+static inline int cpu_is_mohawk(void)
+{
+       unsigned int id;
+       id = read_cpuid_id() & 0xffffe000;
+
+       if (id == 0x56158000)
+
+       return 0;
+}
 #endif
 
 /*

arch/arm/kernel/Makefile +1 -0

index 902397dd1000..7840acff6cd3 100644
@@ -67,6 +67,7 @@ obj-$(CONFIG_HAVE_HW_BREAKPOINT)      += hw_breakpoint.o
 obj-$(CONFIG_CPU_XSCALE)       += xscale-cp0.o
 obj-$(CONFIG_CPU_XSC3)         += xscale-cp0.o
 obj-$(CONFIG_CPU_MOHAWK)       += xscale-cp0.o
+CFLAGS_xscale-cp0.o            += -Wa,-march=armv5te
 obj-$(CONFIG_CPU_PJ4)          += pj4-cp0.o
 obj-$(CONFIG_CPU_PJ4B)         += pj4-cp0.o
 obj-$(CONFIG_IWMMXT)           += iwmmxt.o

arch/arm/kernel/xscale-cp0.c +1 -0

index bdbb8853a19b..a23420fab70e 100644
@@ -15,6 +15,7 @@
 #include <linux/init.h>
 #include <linux/io.h>
 #include <asm/thread_notify.h>
+#include <asm/cputype.h>
 
 static inline void dsp_save_state(u32 *state)
 {

arch/arm/kernel/xscale-cp0.c static int __init xscale_cp0_init(void) · line 157

Quoted 5 lines

arch/arm/kernel/xscale-cp0.c +2 -0

@@ -152,6 +153,11 @@ static int __init xscale_cp0_init(void)
 {
        u32 cp_access;
 
+       /* do not attempt to probe iwmmxt on non-xscale family CPUs */
+       if (IS_ENABLED(CONFIG_ARCH_MULTIPLATFORM) &&

Do you really need this condition?

Quoted 23 lines

arch/arm/kernel/xscale-cp0.c +3 -0

+           !(cpu_is_xscale() || cpu_is_xsc3() || cpu_is_mohawk()))
+               return 0;
+
        cp_access = xscale_cp_access_read() & ~3;
        xscale_cp_access_write(cp_access | 1);

arch/arm/mm/idmap.c +2 -2

index e7a81cebbb2e..40140984db0a 100644
@@ -86,7 +86,8 @@ static void identity_mapping_add(pgd_t *pgd, const char *text_start,
 
        prot |= PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AF;
 
-       if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
+       if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ &&
+           !cpu_is_xscale() && !cpu_is_xsc3())
                prot |= PMD_BIT4;
 
        pgd += pgd_index(addr);
--

2.1.0.rc2

Arnd Bergmann

author

2015-02-27 19:20 UTC #5 lore raw

PATCH 3/8 ARM: make xscale iwmmxt code multiplatform aware

Quoted 8 lines · On Friday 27 February 2015 11:53:47 Rob Herring wrote:

Quoted 8 lines

arch/arm/include/asm/cputype.h +0 -0

index 819777d0e91f..7bc66e22afd7 100644
@@ -228,10 +228,33 @@ static inline int cpu_is_xsc3(void)
 }
 #endif

Quoted 4 lines

arch/arm/include/asm/cputype.h static inline int cpu_is_xsc3(void) · line 231
Quoted 2 lines
arch/arm/include/asm/cputype.h +1 -1
-#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
+#if !defined(CONFIG_CPU_XSCALE)
You could use IS_ENABLED here.

We use #ifdef for the same thing in the rest of the file, so I kept the coding style.

I could convert all three here and the PJ4, but the others wouldn't work because they require some other macros to be defined.

I think I'd rather keep it this way for consistency, unless Russell prefers it to be changed to

static inline int cpu_is_xscale(void)

{
        unsigned int id;

	if (!IS_ENABLED(CONFIG_XSCALE))
		return 0;

        id = read_cpuid_id() & 0xffffe000;

        if ((id == 0x69052000) || (id == 0x69054000))
                return 1;

        return 0;
}

Quoted 4 lines

arch/arm/include/asm/cputype.h +0 -0

@@ -152,6 +153,11 @@ static int __init xscale_cp0_init(void)
 {
        u32 cp_access;

Quoted 8 lines

arch/arm/include/asm/cputype.h static int __init xscale_cp0_init(void) · line 157
Quoted 2 lines
arch/arm/include/asm/cputype.h +2 -0
+       /* do not attempt to probe iwmmxt on non-xscale family CPUs */
+       if (IS_ENABLED(CONFIG_ARCH_MULTIPLATFORM) &&
Do you really need this condition?
Quoted 3 lines
arch/arm/include/asm/cputype.h +3 -0
+           !(cpu_is_xscale() || cpu_is_xsc3() || cpu_is_mohawk()))
+               return 0;
+

No, it was just an optimization for the other (non-multi) platforms to avoid reading the cpuid. I'll just drop it.

Arnd

Robert Jarzmik

2015-03-04 14:12 UTC #6 lore raw

PATCH 3/8 ARM: make xscale iwmmxt code multiplatform aware

In reply to Arnd Bergmann

Quoted 15 lines · Arnd Bergmann

In a multiplatform configuration, we may end up building a kernel for both Marvell PJ1 and an ARMv4 CPU implementation. In that case, the xscale-cp0 code is built with gcc -march=armv4{,t}, which results in a build error from the coprocessor instructions.
Since we know this code will only have to run on an actual xscale processor, we can simply build the entire file for ARMv5TE.
Related to this, we need to handle the iWMMXT initialization sequence differently during boot, to ensure we don't try to touch xscale specific registers on other CPUs from the xscale_cp0_init initcall. cpu_is_xscale() used to be hardcoded to '1' in any configuration that enables any XScale-compatible core, but this breaks once we can have a combined kernel with MMP1 and something else.

Quoted 10 lines

In this patch, I introduce two new macros, cpu_is_xscale() and cpu_is_mohawk, so we can test for all three of them in the iwmmxt initialization. The two existing users of cpu_is_xscale() are modified accordingly, but slightly change behavior for kernels that enable CPU_MOHAWK in combination with CPU_XSCALE or CPU_XSC3. Previously, these would leave clear PMD_BIT4 in the page tables, now they leave it untouched, just like we always do for kernels that enable only CPU_MOHAWK. Since the previous behavior was inconsistent, I assume it was unintentional.

Hi Arnd,

I'm not sure I understand this patch fully, so take with caution my comment. If I'm not mistaken, the former behavior was for pxa3xx:
- cpu_is_xscale() -> false
- cpu_is_xsc3() -> true
=> this implied PMD_BIT4 was set

With your patch :
- cpu_is_xscale() -> true
- cpu_is_xsc3() -> true
=> this implied PMD_BIT4 is not set

I like the new meaning for cpu_is_*(), but is the change of PMD_BIT4 the goal of this patch (the piece in [1]) ?

Cheers.

--
Robert

[1]

Quoted 6 lines

arch/arm/mm/idmap.c +2 -1

-	if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
+	if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ &&
+	    !cpu_is_xscale() && !cpu_is_xsc3())
 		prot |= PMD_BIT4;
 
 	pgd += pgd_index(addr);

Signature · 1 line

Robert

Arnd Bergmann

author

2015-03-04 14:38 UTC #7 lore raw

PATCH 3/8 ARM: make xscale iwmmxt code multiplatform aware

Quoted 9 lines · On Wednesday 04 March 2015 15:12:02 Robert Jarzmik wrote:

Arnd Bergmann <[email protected]> writes:
I'm not sure I understand this patch fully, so take with caution my comment. If I'm not mistaken, the former behavior was for pxa3xx:
- cpu_is_xscale() -> false
- cpu_is_xsc3() -> true
=> this implied PMD_BIT4 was set

Quoted 14 lines

With your patch :
- cpu_is_xscale() -> true
- cpu_is_xsc3() -> true
=> this implied PMD_BIT4 is not set
I like the new meaning for cpu_is_*(), but is the change of PMD_BIT4 the goal of this patch (the piece in [1]) ?
Quoted 6 lines
arch/arm/mm/idmap.c +2 -1
-     if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
+     if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ &&
+         !cpu_is_xscale() && !cpu_is_xsc3())
              prot |= PMD_BIT4;
 
      pgd += pgd_index(addr);

I tried to not change the behavior here, and I think you missed this part:

-#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3) +#if !defined(CONFIG_CPU_XSCALE)
#define cpu_is_xscale() 0
#else
-#define cpu_is_xscale() 1
...

This means that previously, cpu_is_xscale() returned true for pxa3xx, while now it returns false, and I added the "&& !cpu_is_xsc3()" to keep the logic the same as before.

Does that make sense?

Arnd

Robert Jarzmik

2015-03-04 17:30 UTC #8 lore raw

PATCH 3/8 ARM: make xscale iwmmxt code multiplatform aware

Quoted 11 lines · Arnd Bergmann

On Wednesday 04 March 2015 15:12:02 Robert Jarzmik wrote:
I tried to not change the behavior here, and I think you missed this part:
arch/arm/include/asm/cputype.h +1 -2
-#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
+#if !defined(CONFIG_CPU_XSCALE)
 #define        cpu_is_xscale() 0
 #else
-#define        cpu_is_xscale() 1
...

Quoted 5 lines

This means that previously, cpu_is_xscale() returned true for pxa3xx, while now it returns false, and I added the "&& !cpu_is_xsc3()" to keep the logic the same as before.
Does that make sense?

Ah now yes, I missed the former cpu_is_xscale() behavior, my brain is working in first gear lately ...

Then the patch looks fine.

Cheers.

Signature · 1 line

Robert

Russell King - ARM Linux

2015-03-09 17:37 UTC #9 lore raw

PATCH 3/8 ARM: make xscale iwmmxt code multiplatform aware

In reply to Arnd Bergmann

Quoted 34 lines · Arnd Bergmann

Quoted 9 lines · On Wednesday 04 March 2015 15:12:02 Robert Jarzmik wrote:
Arnd Bergmann <[email protected]> writes:
I'm not sure I understand this patch fully, so take with caution my comment. If I'm not mistaken, the former behavior was for pxa3xx:
- cpu_is_xscale() -> false
- cpu_is_xsc3() -> true
=> this implied PMD_BIT4 was set
Quoted 14 lines
With your patch :
- cpu_is_xscale() -> true
- cpu_is_xsc3() -> true
=> this implied PMD_BIT4 is not set
I like the new meaning for cpu_is_*(), but is the change of PMD_BIT4 the goal of this patch (the piece in [1]) ?
Quoted 6 lines
arch/arm/mm/idmap.c +2 -1
-     if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
+     if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ &&
+         !cpu_is_xscale() && !cpu_is_xsc3())
              prot |= PMD_BIT4;
 
      pgd += pgd_index(addr);
I tried to not change the behavior here, and I think you missed this part:
arch/arm/include/asm/cputype.h +1 -2
-#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
+#if !defined(CONFIG_CPU_XSCALE)
 #define        cpu_is_xscale() 0
 #else
-#define        cpu_is_xscale() 1
...

Quoted 3 lines

This means that previously, cpu_is_xscale() returned true for pxa3xx, while now it returns false, and I added the "&& !cpu_is_xsc3()" to keep the logic the same as before.

Please don't do stuff like this. It's really easy for it to be buggy.

Before your change, cpu_is_xscale() returns true for _any_ Xscale CPU, whether it's v1, v2 or v3. After your change, it only returns true for v1 and v2 CPUs. So now the macro is mis-named, and is misleading.

Either rename the macro, or keep the existing behaviour, or do something smarter like:

#define cpu_is_xscale() (cpu_is_xsc1_2() || cpu_is_xsc3())

defining cpu_is_xsc1_2() to be your new version of cpu_is_xscale().

Signature · 2 lines

FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up
according to speedtest.net.

Arnd Bergmann

author

2015-03-13 16:50 UTC #10 lore raw

PATCH 3/8 ARM: make xscale iwmmxt code multiplatform aware

Quoted 45 lines · Russell King - ARM Linux

Quoted 34 lines · Arnd Bergmann
Quoted 9 lines · On Wednesday 04 March 2015 15:12:02 Robert Jarzmik wrote:
Arnd Bergmann <[email protected]> writes:
I'm not sure I understand this patch fully, so take with caution my comment. If I'm not mistaken, the former behavior was for pxa3xx:
- cpu_is_xscale() -> false
- cpu_is_xsc3() -> true
=> this implied PMD_BIT4 was set
Quoted 14 lines
With your patch :
- cpu_is_xscale() -> true
- cpu_is_xsc3() -> true
=> this implied PMD_BIT4 is not set
I like the new meaning for cpu_is_*(), but is the change of PMD_BIT4 the goal of this patch (the piece in [1]) ?
Quoted 6 lines
arch/arm/mm/idmap.c +2 -1
-     if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
+     if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ &&
+         !cpu_is_xscale() && !cpu_is_xsc3())
              prot |= PMD_BIT4;
 
      pgd += pgd_index(addr);
I tried to not change the behavior here, and I think you missed this part:
arch/arm/include/asm/cputype.h +1 -2
-#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
+#if !defined(CONFIG_CPU_XSCALE)
 #define        cpu_is_xscale() 0
 #else
-#define        cpu_is_xscale() 1
...
Quoted 3 lines
This means that previously, cpu_is_xscale() returned true for pxa3xx, while now it returns false, and I added the "&& !cpu_is_xsc3()" to keep the logic the same as before.
Please don't do stuff like this. It's really easy for it to be buggy.
Before your change, cpu_is_xscale() returns true for _any_ Xscale CPU, whether it's v1, v2 or v3. After your change, it only returns true for v1 and v2 CPUs. So now the macro is mis-named, and is misleading.

Quoted 6 lines

Either rename the macro, or keep the existing behaviour, or do something smarter like:
#define cpu_is_xscale() (cpu_is_xsc1_2() || cpu_is_xsc3())
defining cpu_is_xsc1_2() to be your new version of cpu_is_xscale().

I've made a new version with a cpu_is_xscale_family() macro, will post that as a reply here.

I'm still undecided about what it should return for mohawk though, as the previous behavior was not well-defined in that case. I ended up picking the other approach in the second version, but would be thankful for any kind of guidance regarding whether mohawk should or should not clear PMD_BIT4.

Arnd

Arnd Bergmann

author

2015-03-13 16:56 UTC #11 lore raw

PATCH v2 1/1 ARM: make xscale iwmmxt code multiplatform aware

Since we know this code will only have to run on an actual xscale processor, we can simply build the entire file for ARMv5TE.

In this patch, I replace the existing cpu_is_xscale() macro with a new cpu_is_xscale_family() macro that evaluates true for xscale, xsc3 and mohawk, which makes the behavior more deterministic.

The two existing users of cpu_is_xscale() are modified accordingly, but slightly change behavior for kernels that enable CPU_MOHAWK without also enabling CPU_XSCALE or CPU_XSC3. Previously, these would leave leave PMD_BIT4 in the page tables untouched, now they clear it as we've always done for kernels that enable both MOHAWK and the support for the older CPU types.

Since the previous behavior was inconsistent, I assume it was unintentional.

Signed-off-by Arnd Bergmann <[email protected]>

---
Separate resubmission without the rest of the series.

changes since v1:
- replace cpu_is_xscale with a cpu_is_xscale_family function that returns true for all xscale cpus, as suggested by rmk
- also return true for mohawk from that macro instead of introducing cpu_is_mohawk. Please let me know if you think this is a good idea or not.

arch/arm/include/asm/cputype.h +19 -3

index 819777d0e91f..d7cc1d0d0aa7 100644
@@ -228,10 +228,26 @@ static inline int cpu_is_xsc3(void)
 }
 #endif
 
-#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
-#define	cpu_is_xscale()	0
+#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3) && \
+    !defined(CONFIG_CPU_MOHAWK)
+#define	cpu_is_xscale_family() 0
 #else
-#define	cpu_is_xscale()	1
+static inline int cpu_is_xscale_family(void)
+{
+	unsigned int id;
+	id = read_cpuid_id() & 0xffffe000;
+
+	switch (id) {
+	case 0x69052000: /* Intel XScale 1 */
+	case 0x69054000: /* Intel XScale 2 */
+	case 0x69056000: /* Intel XScale 3 */
+	case 0x56056000: /* Marvell XScale 3 */
+	case 0x56158000: /* Marvell Mohawk */
+		return 1;
+	}
+
+	return 0;
+}
 #endif
 
 /*

arch/arm/kernel/Makefile +1 -0

index 902397dd1000..7840acff6cd3 100644
@@ -67,6 +67,7 @@ obj-$(CONFIG_HAVE_HW_BREAKPOINT)	+= hw_breakpoint.o
 obj-$(CONFIG_CPU_XSCALE)	+= xscale-cp0.o
 obj-$(CONFIG_CPU_XSC3)		+= xscale-cp0.o
 obj-$(CONFIG_CPU_MOHAWK)	+= xscale-cp0.o
+CFLAGS_xscale-cp0.o		+= -Wa,-march=armv5te
 obj-$(CONFIG_CPU_PJ4)		+= pj4-cp0.o
 obj-$(CONFIG_CPU_PJ4B)		+= pj4-cp0.o
 obj-$(CONFIG_IWMMXT)		+= iwmmxt.o

arch/arm/kernel/xscale-cp0.c +5 -0

index bdbb8853a19b..55e02262edce 100644
@@ -15,6 +15,7 @@
 #include <linux/init.h>
 #include <linux/io.h>
 #include <asm/thread_notify.h>
+#include <asm/cputype.h>
 
 static inline void dsp_save_state(u32 *state)
 {

@@ -152,6 +153,10 @@ static int __init xscale_cp0_init(void)
 {
 	u32 cp_access;
 
+	/* do not attempt to probe iwmmxt on non-xscale family CPUs */
+	if (!cpu_is_xscale_family())
+		return 0;
+
 	cp_access = xscale_cp_access_read() & ~3;
 	xscale_cp_access_write(cp_access | 1);

arch/arm/mm/idmap.c +1 -1

index e7a81cebbb2e..d65909697165 100644
@@ -86,7 +86,7 @@ static void identity_mapping_add(pgd_t *pgd, const char *text_start,
 
 	prot |= PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AF;
 
-	if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
+	if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale_family())
 		prot |= PMD_BIT4;
 
 	pgd += pgd_index(addr);

arch/arm/mm/mmu.c +1 -1

index 235aed5f8284..50b6ffe2575b 100644
@@ -435,7 +435,7 @@ static void __init build_mem_type_table(void)
 	 * "update-able on write" bit on ARM610).  However, Xscale and
 	 * Xscale3 require this bit to be cleared.
 	 */
-	if (cpu_is_xscale() || cpu_is_xsc3()) {
+	if (cpu_is_xscale_family()) {
 		for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
 			mem_types[i].prot_sect &= ~PMD_BIT4;
 			mem_types[i].prot_l1 &= ~PMD_BIT4;

Arnd Bergmann

author

2015-02-27 13:29 UTC #12 lore raw

PATCH 4/8 ARM: mohawk: allow building with MMU disabled

In reply to Arnd Bergmann

It is in principle possible to build an MMP kernel for the mohawk CPU with the MMU code disabled, except for one simple build error:

proc-mohawk.S:345: Error: invalid operands (*UND* and *UND* sections) for `|'
proc-mohawk.S:345: Error: invalid operands (*ABS* and *UND* sections) for `|'
proc-mohawk.S:345: Error: invalid operands (*UND* and *UND* sections) for `|'
proc-mohawk.S:345: Error: invalid operands (*UND* and *UND* sections) for `|'

proc-mohawk.S:345: Error: undefined symbol L_PTE_USER used as an immediate value

This patch changes the proc-mohawk code to do the same as the other CPUs and not try to actually do anything for the cpu_mohawk_set_pte_ext function, which won't be used anyway.

Signed-off-by Arnd Bergmann <[email protected]>

---
 arch/arm/mm/proc-mohawk.S | 2 ++
 1 file changed, 2 insertions(+)

arch/arm/mm/proc-mohawk.S +2 -0

index df18dbd88c8a..74c0d0f7f325 100644
@@ -342,11 +342,13 @@ ENTRY(cpu_mohawk_switch_mm)
  */
 	.align	5
 ENTRY(cpu_mohawk_set_pte_ext)
+#ifdef CONFIG_MMU
 	armv3_set_pte_ext
 	mov	r0, r0
 	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
 	ret	lr
+#endif
 
 .globl	cpu_mohawk_suspend_size
 .equ	cpu_mohawk_suspend_size, 4 * 6

Signature · 1 line

2.1.0.rc2

Arnd Bergmann

author

2015-02-27 13:29 UTC #13 lore raw

PATCH 5/8 ARM: mmp: remove remaining legacy pxa-dma support

In reply to Arnd Bergmann

All drivers have stopped using this code, so we can just as well stop initializing it.

Signed-off-by Arnd Bergmann <[email protected]>

---
 arch/arm/mach-mmp/include/mach/dma.h | 13 -------------
 arch/arm/mach-mmp/mmp2.c             |  2 --
 arch/arm/mach-mmp/pxa168.c           |  2 --
 arch/arm/mach-mmp/pxa910.c           |  2 --
 arch/arm/plat-pxa/Makefile           |  2 +-
 5 files changed, 1 insertion(+), 20 deletions(-)
 delete mode 100644 arch/arm/mach-mmp/include/mach/dma.h

arch/arm/mach-mmp/include/mach/dma.h deleted +0 ~~-13~~

deleted file mode 100644
index 1d6914544da4..000000000000
@@ -1,13 +0,0 @@
-/*
- * linux/arch/arm/mach-mmp/include/mach/dma.h
- */
-
-#ifndef __ASM_MACH_DMA_H
-#define __ASM_MACH_DMA_H
-
-#include <mach/addr-map.h>
-
-#define DMAC_REGS_VIRT	(APB_VIRT_BASE + 0x00000)
-
-#include <plat/dma.h>
-#endif /* __ASM_MACH_DMA_H */

arch/arm/mach-mmp/mmp2.c +0 -2

index c8914ef21f7f..82eb53f5136a 100644
@@ -25,7 +25,6 @@
 #include <mach/regs-apbc.h>
 #include <mach/cputype.h>
 #include <mach/irqs.h>
-#include <mach/dma.h>
 #include <mach/mfp.h>
 #include <mach/devices.h>
 #include <mach/mmp2.h>

@@ -111,7 +110,6 @@ static int __init mmp2_init(void)
 #endif
 		mfp_init_base(MFPR_VIRT_BASE);
 		mfp_init_addr(mmp2_addr_map);
-		pxa_init_dma(IRQ_MMP2_DMA_RIQ, 16);
 		mmp2_clk_init(APB_PHYS_BASE + 0x50000,
 			      AXI_PHYS_BASE + 0x82800,
 			      APB_PHYS_BASE + 0x15000);

arch/arm/mach-mmp/pxa168.c +0 -2

index 53f21554ae63..7367f4b079e4 100644
@@ -24,7 +24,6 @@
 #include <mach/regs-apbc.h>
 #include <mach/regs-apmu.h>
 #include <mach/irqs.h>
-#include <mach/dma.h>
 #include <mach/devices.h>
 #include <mach/mfp.h>
 #include <linux/dma-mapping.h>

@@ -56,7 +55,6 @@ static int __init pxa168_init(void)
 	if (cpu_is_pxa168()) {
 		mfp_init_base(MFPR_VIRT_BASE);
 		mfp_init_addr(pxa168_mfp_addr_map);
-		pxa_init_dma(IRQ_PXA168_DMA_INT0, 32);
 		pxa168_clk_init(APB_PHYS_BASE + 0x50000,
 				AXI_PHYS_BASE + 0x82800,
 				APB_PHYS_BASE + 0x15000);

arch/arm/mach-mmp/pxa910.c +0 -2

index 545404261327..15f7be01fed8 100644
@@ -23,7 +23,6 @@
 #include <mach/regs-apbc.h>
 #include <mach/cputype.h>
 #include <mach/irqs.h>
-#include <mach/dma.h>
 #include <mach/mfp.h>
 #include <mach/devices.h>
 #include <mach/pm-pxa910.h>

@@ -97,7 +96,6 @@ static int __init pxa910_init(void)
 #endif
 		mfp_init_base(MFPR_VIRT_BASE);
 		mfp_init_addr(pxa910_mfp_addr_map);
-		pxa_init_dma(IRQ_PXA910_DMA_INT0, 32);
 		pxa910_clk_init(APB_PHYS_BASE + 0x50000,
 				AXI_PHYS_BASE + 0x82800,
 				APB_PHYS_BASE + 0x15000,

arch/arm/plat-pxa/Makefile +1 -1

index 1fc941944912..e507aebbef52 100644
@@ -2,7 +2,7 @@
 # Makefile for code common across different PXA processor families
 #
 
-obj-y	:= dma.o
+obj-$(CONFIG_ARCH_PXA)		:= dma.o
 
 obj-$(CONFIG_PXA3xx)		+= mfp.o
 obj-$(CONFIG_ARCH_MMP)		+= mfp.o

Signature · 1 line

2.1.0.rc2

Arnd Bergmann

author

2015-02-27 13:30 UTC #14 lore raw

PATCH 5/8 ARM: mmp: remove remaining legacy pxa-dma support

In reply to Arnd Bergmann

All drivers have stopped using this code, so we can just as well stop initializing it.

Signed-off-by Arnd Bergmann <[email protected]>

---
 arch/arm/mach-mmp/include/mach/dma.h | 13 -------------
 arch/arm/mach-mmp/mmp2.c             |  2 --
 arch/arm/mach-mmp/pxa168.c           |  2 --
 arch/arm/mach-mmp/pxa910.c           |  2 --
 arch/arm/plat-pxa/Makefile           |  2 +-
 5 files changed, 1 insertion(+), 20 deletions(-)
 delete mode 100644 arch/arm/mach-mmp/include/mach/dma.h

arch/arm/mach-mmp/include/mach/dma.h deleted +0 ~~-13~~

deleted file mode 100644
index 1d6914544da4..000000000000
@@ -1,13 +0,0 @@
-/*
- * linux/arch/arm/mach-mmp/include/mach/dma.h
- */
-
-#ifndef __ASM_MACH_DMA_H
-#define __ASM_MACH_DMA_H
-
-#include <mach/addr-map.h>
-
-#define DMAC_REGS_VIRT	(APB_VIRT_BASE + 0x00000)
-
-#include <plat/dma.h>
-#endif /* __ASM_MACH_DMA_H */

arch/arm/mach-mmp/mmp2.c +0 -2

index c8914ef21f7f..82eb53f5136a 100644
@@ -25,7 +25,6 @@
 #include <mach/regs-apbc.h>
 #include <mach/cputype.h>
 #include <mach/irqs.h>
-#include <mach/dma.h>
 #include <mach/mfp.h>
 #include <mach/devices.h>
 #include <mach/mmp2.h>

@@ -111,7 +110,6 @@ static int __init mmp2_init(void)
 #endif
 		mfp_init_base(MFPR_VIRT_BASE);
 		mfp_init_addr(mmp2_addr_map);
-		pxa_init_dma(IRQ_MMP2_DMA_RIQ, 16);
 		mmp2_clk_init(APB_PHYS_BASE + 0x50000,
 			      AXI_PHYS_BASE + 0x82800,
 			      APB_PHYS_BASE + 0x15000);

arch/arm/mach-mmp/pxa168.c +0 -2

index 53f21554ae63..7367f4b079e4 100644
@@ -24,7 +24,6 @@
 #include <mach/regs-apbc.h>
 #include <mach/regs-apmu.h>
 #include <mach/irqs.h>
-#include <mach/dma.h>
 #include <mach/devices.h>
 #include <mach/mfp.h>
 #include <linux/dma-mapping.h>

@@ -56,7 +55,6 @@ static int __init pxa168_init(void)
 	if (cpu_is_pxa168()) {
 		mfp_init_base(MFPR_VIRT_BASE);
 		mfp_init_addr(pxa168_mfp_addr_map);
-		pxa_init_dma(IRQ_PXA168_DMA_INT0, 32);
 		pxa168_clk_init(APB_PHYS_BASE + 0x50000,
 				AXI_PHYS_BASE + 0x82800,
 				APB_PHYS_BASE + 0x15000);

arch/arm/mach-mmp/pxa910.c +0 -2

index 545404261327..15f7be01fed8 100644
@@ -23,7 +23,6 @@
 #include <mach/regs-apbc.h>
 #include <mach/cputype.h>
 #include <mach/irqs.h>
-#include <mach/dma.h>
 #include <mach/mfp.h>
 #include <mach/devices.h>
 #include <mach/pm-pxa910.h>

@@ -97,7 +96,6 @@ static int __init pxa910_init(void)
 #endif
 		mfp_init_base(MFPR_VIRT_BASE);
 		mfp_init_addr(pxa910_mfp_addr_map);
-		pxa_init_dma(IRQ_PXA910_DMA_INT0, 32);
 		pxa910_clk_init(APB_PHYS_BASE + 0x50000,
 				AXI_PHYS_BASE + 0x82800,
 				APB_PHYS_BASE + 0x15000,

arch/arm/plat-pxa/Makefile +1 -1

index 1fc941944912..e507aebbef52 100644
@@ -2,7 +2,7 @@
 # Makefile for code common across different PXA processor families
 #
 
-obj-y	:= dma.o
+obj-$(CONFIG_ARCH_PXA)		:= dma.o
 
 obj-$(CONFIG_PXA3xx)		+= mfp.o
 obj-$(CONFIG_ARCH_MMP)		+= mfp.o

Signature · 1 line

2.1.0.rc2

Arnd Bergmann

author

2015-02-27 13:31 UTC #15 lore raw

PATCH 6/8 ARM: mmp: make all header files local

In reply to Arnd Bergmann

The mach/*.h headers are now inaccessible to any external code, so we can move them all into the mach-mmp directory itself and remove the subdirectories.

A few headers are not used at all, so we remove them here.

Signed-off-by Arnd Bergmann <[email protected]>

---
 arch/arm/mach-mmp/{include/mach => }/addr-map.h    |  2 --
 arch/arm/mach-mmp/aspenite.c                       |  8 ++---
 arch/arm/mach-mmp/avengers_lite.c                  |  8 ++---
 arch/arm/mach-mmp/brownstone.c                     |  8 ++---
 arch/arm/mach-mmp/clock-mmp2.c                     |  2 +-
 arch/arm/mach-mmp/clock-pxa168.c                   |  2 +-
 arch/arm/mach-mmp/clock-pxa910.c                   |  2 +-
 arch/arm/mach-mmp/clock.c                          |  2 +-
 arch/arm/mach-mmp/clock.h                          |  2 --
 arch/arm/mach-mmp/common.c                         |  4 +--
 arch/arm/mach-mmp/{include/mach => }/cputype.h     |  0
 arch/arm/mach-mmp/devices.c                        |  8 ++---
 arch/arm/mach-mmp/{include/mach => }/devices.h     |  0
 arch/arm/mach-mmp/flint.c                          |  8 ++---
 arch/arm/mach-mmp/gplugd.c                         |  6 ++--
 arch/arm/mach-mmp/include/mach/hardware.h          |  4 ---
 arch/arm/mach-mmp/include/mach/regs-smc.h          | 37 ----------------------
 arch/arm/mach-mmp/{include/mach => }/irqs.h        |  0
 arch/arm/mach-mmp/jasper.c                         |  8 ++---
 arch/arm/mach-mmp/{include/mach => }/mfp-mmp2.h    |  2 +-
 arch/arm/mach-mmp/{include/mach => }/mfp-pxa168.h  |  2 +-
 arch/arm/mach-mmp/{include/mach => }/mfp-pxa910.h  |  2 +-
 arch/arm/mach-mmp/{include/mach => }/mfp.h         |  0
 arch/arm/mach-mmp/mmp2.c                           | 16 +++++-----
 arch/arm/mach-mmp/{include/mach => }/mmp2.h        |  3 +-
 arch/arm/mach-mmp/pm-mmp2.c                        | 12 +++----
 arch/arm/mach-mmp/{include/mach => }/pm-mmp2.h     |  2 +-
 arch/arm/mach-mmp/pm-pxa910.c                      | 12 +++----
 arch/arm/mach-mmp/{include/mach => }/pm-pxa910.h   |  0
 arch/arm/mach-mmp/pxa168.c                         | 22 ++++++-------
 arch/arm/mach-mmp/{include/mach => }/pxa168.h      |  5 +--
 arch/arm/mach-mmp/pxa910.c                         | 16 +++++-----
 arch/arm/mach-mmp/{include/mach => }/pxa910.h      |  3 +-
 arch/arm/mach-mmp/{include/mach => }/regs-apbc.h   |  4 +--
 arch/arm/mach-mmp/{include/mach => }/regs-apmu.h   |  4 +--
 arch/arm/mach-mmp/{include/mach => }/regs-icu.h    |  4 +--
 arch/arm/mach-mmp/{include/mach => }/regs-timers.h |  4 +--
 arch/arm/mach-mmp/{include/mach => }/regs-usb.h    |  0
 arch/arm/mach-mmp/tavorevb.c                       |  8 ++---
 arch/arm/mach-mmp/teton_bga.c                      | 10 +++---
 arch/arm/mach-mmp/{include/mach => }/teton_bga.h   |  2 --
 arch/arm/mach-mmp/time.c                           | 11 +++----
 arch/arm/mach-mmp/ttc_dkb.c                        | 10 +++---
 43 files changed, 106 insertions(+), 159 deletions(-)
 rename arch/arm/mach-mmp/{include/mach => }/addr-map.h (96%)
 rename arch/arm/mach-mmp/{include/mach => }/cputype.h (100%)
 rename arch/arm/mach-mmp/{include/mach => }/devices.h (100%)
 delete mode 100644 arch/arm/mach-mmp/include/mach/hardware.h
 delete mode 100644 arch/arm/mach-mmp/include/mach/regs-smc.h
 rename arch/arm/mach-mmp/{include/mach => }/irqs.h (100%)
 rename arch/arm/mach-mmp/{include/mach => }/mfp-mmp2.h (99%)
 rename arch/arm/mach-mmp/{include/mach => }/mfp-pxa168.h (99%)
 rename arch/arm/mach-mmp/{include/mach => }/mfp-pxa910.h (99%)
 rename arch/arm/mach-mmp/{include/mach => }/mfp.h (100%)
 rename arch/arm/mach-mmp/{include/mach => }/mmp2.h (99%)
 rename arch/arm/mach-mmp/{include/mach => }/pm-mmp2.h (98%)
 rename arch/arm/mach-mmp/{include/mach => }/pm-pxa910.h (100%)
 rename arch/arm/mach-mmp/{include/mach => }/pxa168.h (98%)
 rename arch/arm/mach-mmp/{include/mach => }/pxa910.h (98%)
 rename arch/arm/mach-mmp/{include/mach => }/regs-apbc.h (88%)
 rename arch/arm/mach-mmp/{include/mach => }/regs-apmu.h (91%)
 rename arch/arm/mach-mmp/{include/mach => }/regs-icu.h (96%)
 rename arch/arm/mach-mmp/{include/mach => }/regs-timers.h (93%)
 rename arch/arm/mach-mmp/{include/mach => }/regs-usb.h (100%)
 rename arch/arm/mach-mmp/{include/mach => }/teton_bga.h (92%)

arch/arm/mach-mmp/addr-map.h renamed from arch/arm/mach-mmp/include/mach/addr-map.h +0 -2

similarity index 96%
rename from arch/arm/mach-mmp/include/mach/addr-map.h
rename to arch/arm/mach-mmp/addr-map.h
index f88a44c0ef91..2739d27bc89d 100644
@@ -1,6 +1,4 @@
 /*
- * linux/arch/arm/mach-mmp/include/mach/addr-map.h
- *
  *   Common address map definitions
  *
  * This program is free software; you can redistribute it and/or modify

arch/arm/mach-mmp/aspenite.c +4 -4

index 7e0248582efd..5db0edf716dd 100644
@@ -22,14 +22,14 @@
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <mach/addr-map.h>
-#include <mach/mfp-pxa168.h>
-#include <mach/pxa168.h>
-#include <mach/irqs.h>
 #include <video/pxa168fb.h>
 #include <linux/input.h>
 #include <linux/platform_data/keypad-pxa27x.h>
 
+#include "addr-map.h"
+#include "mfp-pxa168.h"
+#include "pxa168.h"
+#include "irqs.h"
 #include "common.h"
 
 static unsigned long common_pin_config[] __initdata = {

arch/arm/mach-mmp/avengers_lite.c +4 -4

index a451a0f4d512..3d2aea830ef7 100644
@@ -17,10 +17,10 @@
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <mach/addr-map.h>
-#include <mach/mfp-pxa168.h>
-#include <mach/pxa168.h>
-#include <mach/irqs.h>
+#include "addr-map.h"
+#include "mfp-pxa168.h"
+#include "pxa168.h"
+#include "irqs.h"
 
 
 #include "common.h"

arch/arm/mach-mmp/brownstone.c +4 -4

index ac25544b8cdb..d1613b954926 100644
@@ -22,10 +22,10 @@
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <mach/addr-map.h>
-#include <mach/mfp-mmp2.h>
-#include <mach/mmp2.h>
-#include <mach/irqs.h>
+#include "addr-map.h"
+#include "mfp-mmp2.h"
+#include "mmp2.h"
+#include "irqs.h"
 
 #include "common.h"

arch/arm/mach-mmp/clock-mmp2.c +1 -1

index 6847c49bbb39..835c3e7cc67e 100644
@@ -6,7 +6,7 @@
 #include <linux/clk.h>
 #include <linux/clk/mmp.h>
 
-#include <mach/addr-map.h>
+#include "addr-map.h"
 
 #include "common.h"
 #include "clock.h"

arch/arm/mach-mmp/clock-pxa168.c +1 -1

index bfa54bb16449..f726a3692431 100644
@@ -6,7 +6,7 @@
 #include <linux/clk.h>
 #include <linux/clk/mmp.h>
 
-#include <mach/addr-map.h>
+#include "addr-map.h"
 
 #include "common.h"
 #include "clock.h"

arch/arm/mach-mmp/clock-pxa910.c +1 -1

index ef7d3dbc8731..bca60a224e07 100644
@@ -6,7 +6,7 @@
 #include <linux/clk.h>
 #include <linux/clk/mmp.h>
 
-#include <mach/addr-map.h>
+#include "addr-map.h"
 
 #include "common.h"
 #include "clock.h"

arch/arm/mach-mmp/clock.c +1 -1

index 2d68953eb334..a1d26db21f4e 100644
@@ -13,7 +13,7 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <mach/regs-apbc.h>
+#include "regs-apbc.h"
 #include "clock.h"
 
 static void apbc_clk_enable(struct clk *clk)

arch/arm/mach-mmp/clock.h +0 -2

index 149b30cd1469..8194445183fe 100644
@@ -1,6 +1,4 @@
 /*
- *  linux/arch/arm/mach-mmp/clock.h
- *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License version 2 as
  *  published by the Free Software Foundation.

arch/arm/mach-mmp/common.c +2 -2

index c03b4ab582db..685a0993cff6 100644
@@ -15,8 +15,8 @@
 #include <asm/page.h>
 #include <asm/mach/map.h>
 #include <asm/system_misc.h>
-#include <mach/addr-map.h>
-#include <mach/cputype.h>
+#include "addr-map.h"
+#include "cputype.h"
 
 #include "common.h"

arch/arm/mach-mmp/cputype.h renamed from arch/arm/mach-mmp/include/mach/cputype.h +0 -0

similarity index 100%
rename from arch/arm/mach-mmp/include/mach/cputype.h
rename to arch/arm/mach-mmp/cputype.h

arch/arm/mach-mmp/devices.c +4 -4

index 16b2015110c0..3330ac7cfbef 100644
@@ -12,10 +12,10 @@
 #include <linux/delay.h>
 
 #include <asm/irq.h>
-#include <mach/irqs.h>
-#include <mach/devices.h>
-#include <mach/cputype.h>
-#include <mach/regs-usb.h>
+#include "irqs.h"
+#include "devices.h"
+#include "cputype.h"
+#include "regs-usb.h"
 
 int __init pxa_register_device(struct pxa_device_desc *desc,
 				void *data, size_t size)

arch/arm/mach-mmp/devices.h renamed from arch/arm/mach-mmp/include/mach/devices.h +0 -0

similarity index 100%
rename from arch/arm/mach-mmp/include/mach/devices.h
rename to arch/arm/mach-mmp/devices.h

arch/arm/mach-mmp/flint.c +4 -4

index 6291c33d83e2..078b98034960 100644
@@ -21,10 +21,10 @@
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <mach/addr-map.h>
-#include <mach/mfp-mmp2.h>
-#include <mach/mmp2.h>
-#include <mach/irqs.h>
+#include "addr-map.h"
+#include "mfp-mmp2.h"
+#include "mmp2.h"
+#include "irqs.h"
 
 #include "common.h"

arch/arm/mach-mmp/gplugd.c +3 -3

index 22762a1f9f72..c224119dc0f4 100644
@@ -16,9 +16,9 @@
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 
-#include <mach/irqs.h>
-#include <mach/pxa168.h>
-#include <mach/mfp-pxa168.h>
+#include "irqs.h"
+#include "pxa168.h"
+#include "mfp-pxa168.h"
 
 #include "common.h"

arch/arm/mach-mmp/include/mach/hardware.h deleted +0 -4

deleted file mode 100644
index 99264a5ce5e4..000000000000
@@ -1,4 +0,0 @@
-#ifndef __ASM_MACH_HARDWARE_H
-#define __ASM_MACH_HARDWARE_H
-
-#endif /* __ASM_MACH_HARDWARE_H */

arch/arm/mach-mmp/include/mach/regs-smc.h deleted +0 ~~-37~~

deleted file mode 100644
index e484d40d71bd..000000000000
@@ -1,37 +0,0 @@
-/*
- * linux/arch/arm/mach-mmp/include/mach/regs-smc.h
- *
- *  Static Memory Controller Registers
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_MACH_REGS_SMC_H
-#define __ASM_MACH_REGS_SMC_H
-
-#include <mach/addr-map.h>
-
-#define SMC_VIRT_BASE		(AXI_VIRT_BASE + 0x83800)
-#define SMC_REG(x)		(SMC_VIRT_BASE + (x))
-
-#define SMC_MSC0		SMC_REG(0x0020)
-#define SMC_MSC1		SMC_REG(0x0024)
-#define SMC_SXCNFG0		SMC_REG(0x0030)
-#define SMC_SXCNFG1		SMC_REG(0x0034)
-#define SMC_MEMCLKCFG		SMC_REG(0x0068)
-#define SMC_CSDFICFG0		SMC_REG(0x0090)
-#define SMC_CSDFICFG1		SMC_REG(0x0094)
-#define SMC_CLK_RET_DEL		SMC_REG(0x00b0)
-#define SMC_ADV_RET_DEL		SMC_REG(0x00b4)
-#define SMC_CSADRMAP0		SMC_REG(0x00c0)
-#define SMC_CSADRMAP1		SMC_REG(0x00c4)
-#define SMC_WE_AP0		SMC_REG(0x00e0)
-#define SMC_WE_AP1		SMC_REG(0x00e4)
-#define SMC_OE_AP0		SMC_REG(0x00f0)
-#define SMC_OE_AP1		SMC_REG(0x00f4)
-#define SMC_ADV_AP0		SMC_REG(0x0100)
-#define SMC_ADV_AP1		SMC_REG(0x0104)
-
-#endif /* __ASM_MACH_REGS_SMC_H */

arch/arm/mach-mmp/irqs.h renamed from arch/arm/mach-mmp/include/mach/irqs.h +0 -0

similarity index 100%
rename from arch/arm/mach-mmp/include/mach/irqs.h
rename to arch/arm/mach-mmp/irqs.h

arch/arm/mach-mmp/jasper.c +4 -4

index 0e9e5c05b37c..5dbb753a77ac 100644
@@ -20,12 +20,12 @@
 #include <linux/mfd/max8925.h>
 #include <linux/interrupt.h>
 
-#include <mach/irqs.h>
+#include "irqs.h"
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <mach/addr-map.h>
-#include <mach/mfp-mmp2.h>
-#include <mach/mmp2.h>
+#include "addr-map.h"
+#include "mfp-mmp2.h"
+#include "mmp2.h"
 
 #include "common.h"

arch/arm/mach-mmp/mfp-mmp2.h renamed from arch/arm/mach-mmp/include/mach/mfp-mmp2.h +1 -1

similarity index 99%
rename from arch/arm/mach-mmp/include/mach/mfp-mmp2.h
rename to arch/arm/mach-mmp/mfp-mmp2.h
index 4ad38629c3f6..b2744349725d 100644
@@ -1,7 +1,7 @@
 #ifndef __ASM_MACH_MFP_MMP2_H
 #define __ASM_MACH_MFP_MMP2_H
 
-#include <mach/mfp.h>
+#include "mfp.h"
 
 #define MFP_DRIVE_VERY_SLOW	(0x0 << 13)
 #define MFP_DRIVE_SLOW		(0x2 << 13)

arch/arm/mach-mmp/mfp-pxa168.h renamed from arch/arm/mach-mmp/include/mach/mfp-pxa168.h +1 -1

similarity index 99%
rename from arch/arm/mach-mmp/include/mach/mfp-pxa168.h
rename to arch/arm/mach-mmp/mfp-pxa168.h
index 92aaa3c19d61..9050d032377e 100644
@@ -1,7 +1,7 @@
 #ifndef __ASM_MACH_MFP_PXA168_H
 #define __ASM_MACH_MFP_PXA168_H
 
-#include <mach/mfp.h>
+#include "mfp.h"
 
 #define MFP_DRIVE_VERY_SLOW	(0x0 << 13)
 #define MFP_DRIVE_SLOW		(0x1 << 13)

arch/arm/mach-mmp/mfp-pxa910.h renamed from arch/arm/mach-mmp/include/mach/mfp-pxa910.h +1 -1

similarity index 99%
rename from arch/arm/mach-mmp/include/mach/mfp-pxa910.h
rename to arch/arm/mach-mmp/mfp-pxa910.h
index 8c78f2b16452..f06db5cd3ad3 100644
@@ -1,7 +1,7 @@
 #ifndef __ASM_MACH_MFP_PXA910_H
 #define __ASM_MACH_MFP_PXA910_H
 
-#include <mach/mfp.h>
+#include "mfp.h"
 
 #define MFP_DRIVE_VERY_SLOW	(0x0 << 13)
 #define MFP_DRIVE_SLOW		(0x2 << 13)

arch/arm/mach-mmp/mfp.h renamed from arch/arm/mach-mmp/include/mach/mfp.h +0 -0

similarity index 100%
rename from arch/arm/mach-mmp/include/mach/mfp.h
rename to arch/arm/mach-mmp/mfp.h

arch/arm/mach-mmp/mmp2.c +8 -8

index 82eb53f5136a..afba5460cdaf 100644
@@ -21,14 +21,14 @@
 #include <asm/hardware/cache-tauros2.h>
 
 #include <asm/mach/time.h>
-#include <mach/addr-map.h>
-#include <mach/regs-apbc.h>
-#include <mach/cputype.h>
-#include <mach/irqs.h>
-#include <mach/mfp.h>
-#include <mach/devices.h>
-#include <mach/mmp2.h>
-#include <mach/pm-mmp2.h>
+#include "addr-map.h"
+#include "regs-apbc.h"
+#include "cputype.h"
+#include "irqs.h"
+#include "mfp.h"
+#include "devices.h"
+#include "mmp2.h"
+#include "pm-mmp2.h"
 
 #include "common.h"

arch/arm/mach-mmp/mmp2.h renamed from arch/arm/mach-mmp/include/mach/mmp2.h +2 -1

similarity index 99%
rename from arch/arm/mach-mmp/include/mach/mmp2.h
rename to arch/arm/mach-mmp/mmp2.h
index 0764f4ecec82..9b5e75ee9e4d 100644
@@ -10,9 +10,10 @@ extern void mmp2_clear_pmic_int(void);
 
 #include <linux/i2c.h>
 #include <linux/i2c/pxa-i2c.h>
-#include <mach/devices.h>
 #include <linux/platform_data/dma-mmp_tdma.h>
 
+#include "devices.h"
+
 extern struct pxa_device_desc mmp2_device_uart1;
 extern struct pxa_device_desc mmp2_device_uart2;
 extern struct pxa_device_desc mmp2_device_uart3;

arch/arm/mach-mmp/pm-mmp2.c +6 -6

index 43b1a516957f..17699be3bc3d 100644
@@ -18,12 +18,12 @@
 #include <linux/io.h>
 #include <linux/interrupt.h>
 #include <asm/mach-types.h>
-#include <mach/hardware.h>
-#include <mach/cputype.h>
-#include <mach/addr-map.h>
-#include <mach/pm-mmp2.h>
-#include <mach/regs-icu.h>
-#include <mach/irqs.h>
+
+#include "cputype.h"
+#include "addr-map.h"
+#include "pm-mmp2.h"
+#include "regs-icu.h"
+#include "irqs.h"
 
 int mmp2_set_wake(struct irq_data *d, unsigned int on)
 {

arch/arm/mach-mmp/pm-mmp2.h renamed from arch/arm/mach-mmp/include/mach/pm-mmp2.h +1 -1

similarity index 98%
rename from arch/arm/mach-mmp/include/mach/pm-mmp2.h
rename to arch/arm/mach-mmp/pm-mmp2.h
index 98bd66ce8006..486e0590cd8d 100644
@@ -11,7 +11,7 @@
 #ifndef __MMP2_PM_H__
 #define __MMP2_PM_H__
 
-#include <mach/addr-map.h>
+#include "addr-map.h"
 
 #define APMU_PJ_IDLE_CFG			APMU_REG(0x018)
 #define APMU_PJ_IDLE_CFG_PJ_IDLE		(1 << 1)

arch/arm/mach-mmp/pm-pxa910.c +6 -6

index 04c9daf9f8d7..1601d9dbcace 100644
@@ -18,12 +18,12 @@
 #include <linux/io.h>
 #include <linux/irq.h>
 #include <asm/mach-types.h>
-#include <mach/hardware.h>
-#include <mach/cputype.h>
-#include <mach/addr-map.h>
-#include <mach/pm-pxa910.h>
-#include <mach/regs-icu.h>
-#include <mach/irqs.h>
+
+#include "cputype.h"
+#include "addr-map.h"
+#include "pm-pxa910.h"
+#include "regs-icu.h"
+#include "irqs.h"
 
 int pxa910_set_wake(struct irq_data *data, unsigned int on)
 {

arch/arm/mach-mmp/pm-pxa910.h renamed from arch/arm/mach-mmp/include/mach/pm-pxa910.h +0 -0

similarity index 100%
rename from arch/arm/mach-mmp/include/mach/pm-pxa910.h
rename to arch/arm/mach-mmp/pm-pxa910.h

arch/arm/mach-mmp/pxa168.c +11 ~~-11~~

index 7367f4b079e4..0f5f16fb8c66 100644
@@ -16,22 +16,22 @@
 #include <linux/clk/mmp.h>
 #include <linux/platform_device.h>
 #include <linux/platform_data/mv_usb.h>
+#include <linux/dma-mapping.h>
 
 #include <asm/mach/time.h>
 #include <asm/system_misc.h>
-#include <mach/cputype.h>
-#include <mach/addr-map.h>
-#include <mach/regs-apbc.h>
-#include <mach/regs-apmu.h>
-#include <mach/irqs.h>
-#include <mach/devices.h>
-#include <mach/mfp.h>
-#include <linux/dma-mapping.h>
-#include <mach/pxa168.h>
-#include <mach/regs-usb.h>
 
-#include "common.h"
+#include "addr-map.h"
 #include "clock.h"
+#include "common.h"
+#include "cputype.h"
+#include "devices.h"
+#include "irqs.h"
+#include "mfp.h"
+#include "pxa168.h"
+#include "regs-apbc.h"
+#include "regs-apmu.h"
+#include "regs-usb.h"
 
 #define MFPR_VIRT_BASE	(APB_VIRT_BASE + 0x1e000)

arch/arm/mach-mmp/pxa168.h renamed from arch/arm/mach-mmp/include/mach/pxa168.h +3 -2

similarity index 98%
rename from arch/arm/mach-mmp/include/mach/pxa168.h
rename to arch/arm/mach-mmp/pxa168.h
index a83ba7cb525d..75841e9ccd73 100644
@@ -11,14 +11,15 @@ extern void pxa168_clear_keypad_wakeup(void);
 
 #include <linux/i2c.h>
 #include <linux/i2c/pxa-i2c.h>
-#include <mach/devices.h>
 #include <linux/platform_data/mtd-nand-pxa3xx.h>
 #include <video/pxa168fb.h>
 #include <linux/platform_data/keypad-pxa27x.h>
-#include <mach/cputype.h>
 #include <linux/pxa168_eth.h>
 #include <linux/platform_data/mv_usb.h>
 
+#include "devices.h"
+#include "cputype.h"
+
 extern struct pxa_device_desc pxa168_device_uart1;
 extern struct pxa_device_desc pxa168_device_uart2;
 extern struct pxa_device_desc pxa168_device_uart3;

arch/arm/mach-mmp/pxa910.c +8 -8

index 15f7be01fed8..1ccbba9ac495 100644
@@ -19,14 +19,14 @@
 
 #include <asm/hardware/cache-tauros2.h>
 #include <asm/mach/time.h>
-#include <mach/addr-map.h>
-#include <mach/regs-apbc.h>
-#include <mach/cputype.h>
-#include <mach/irqs.h>
-#include <mach/mfp.h>
-#include <mach/devices.h>
-#include <mach/pm-pxa910.h>
-#include <mach/pxa910.h>
+#include "addr-map.h"
+#include "regs-apbc.h"
+#include "cputype.h"
+#include "irqs.h"
+#include "mfp.h"
+#include "devices.h"
+#include "pm-pxa910.h"
+#include "pxa910.h"
 
 #include "common.h"

arch/arm/mach-mmp/pxa910.h renamed from arch/arm/mach-mmp/include/mach/pxa910.h +2 -1

similarity index 98%
rename from arch/arm/mach-mmp/include/mach/pxa910.h
rename to arch/arm/mach-mmp/pxa910.h
index 92253203f5b4..a211e81e5a08 100644
@@ -7,10 +7,11 @@ extern void __init pxa910_init_irq(void);
 
 #include <linux/i2c.h>
 #include <linux/i2c/pxa-i2c.h>
-#include <mach/devices.h>
 #include <linux/platform_data/mtd-nand-pxa3xx.h>
 #include <video/mmp_disp.h>
 
+#include "devices.h"
+
 extern struct pxa_device_desc pxa910_device_uart1;
 extern struct pxa_device_desc pxa910_device_uart2;
 extern struct pxa_device_desc pxa910_device_twsi0;

arch/arm/mach-mmp/regs-apbc.h renamed from arch/arm/mach-mmp/include/mach/regs-apbc.h +1 -3

similarity index 88%
rename from arch/arm/mach-mmp/include/mach/regs-apbc.h
rename to arch/arm/mach-mmp/regs-apbc.h
index ddc812f40341..704bcae3fc26 100644
@@ -1,6 +1,4 @@
 /*
- * linux/arch/arm/mach-mmp/include/mach/regs-apbc.h
- *
  *   Application Peripheral Bus Clock Unit
  *
  * This program is free software; you can redistribute it and/or modify

@@ -11,7 +9,7 @@
 #ifndef __ASM_MACH_REGS_APBC_H
 #define __ASM_MACH_REGS_APBC_H
 
-#include <mach/addr-map.h>
+#include "addr-map.h"
 
 /* Common APB clock register bit definitions */
 #define APBC_APBCLK	(1 << 0)  /* APB Bus Clock Enable */

arch/arm/mach-mmp/regs-apmu.h renamed from arch/arm/mach-mmp/include/mach/regs-apmu.h +1 -3

similarity index 91%
rename from arch/arm/mach-mmp/include/mach/regs-apmu.h
rename to arch/arm/mach-mmp/regs-apmu.h
index 93c8d0e29bb9..23f6209b65aa 100644
@@ -1,6 +1,4 @@
 /*
- * linux/arch/arm/mach-mmp/include/mach/regs-apmu.h
- *
  *   Application Subsystem Power Management Unit
  *
  * This program is free software; you can redistribute it and/or modify

@@ -11,7 +9,7 @@
 #ifndef __ASM_MACH_REGS_APMU_H
 #define __ASM_MACH_REGS_APMU_H
 
-#include <mach/addr-map.h>
+#include "addr-map.h"
 
 #define APMU_FNCLK_EN	(1 << 4)
 #define APMU_AXICLK_EN	(1 << 3)

arch/arm/mach-mmp/regs-icu.h renamed from arch/arm/mach-mmp/include/mach/regs-icu.h +1 -3

similarity index 96%
rename from arch/arm/mach-mmp/include/mach/regs-icu.h
rename to arch/arm/mach-mmp/regs-icu.h
index f882d91894be..0328abe340a4 100644
@@ -1,6 +1,4 @@
 /*
- * linux/arch/arm/mach-mmp/include/mach/regs-icu.h
- *
  *   Interrupt Control Unit
  *
  * This program is free software; you can redistribute it and/or modify

@@ -11,7 +9,7 @@
 #ifndef __ASM_MACH_ICU_H
 #define __ASM_MACH_ICU_H
 
-#include <mach/addr-map.h>
+#include "addr-map.h"
 
 #define ICU_VIRT_BASE	(AXI_VIRT_BASE + 0x82000)
 #define ICU_REG(x)	(ICU_VIRT_BASE + (x))

arch/arm/mach-mmp/regs-timers.h renamed from arch/arm/mach-mmp/include/mach/regs-timers.h +1 -3

similarity index 93%
rename from arch/arm/mach-mmp/include/mach/regs-timers.h
rename to arch/arm/mach-mmp/regs-timers.h
index 45589fec9fc7..d3611c0becf0 100644
@@ -1,6 +1,4 @@
 /*
- * linux/arch/arm/mach-mmp/include/mach/regs-timers.h
- *
  *   Timers Module
  *
  * This program is free software; you can redistribute it and/or modify

@@ -11,7 +9,7 @@
 #ifndef __ASM_MACH_REGS_TIMERS_H
 #define __ASM_MACH_REGS_TIMERS_H
 
-#include <mach/addr-map.h>
+#include "addr-map.h"
 
 #define TIMERS1_VIRT_BASE	(APB_VIRT_BASE + 0x14000)
 #define TIMERS2_VIRT_BASE	(APB_VIRT_BASE + 0x16000)

arch/arm/mach-mmp/regs-usb.h renamed from arch/arm/mach-mmp/include/mach/regs-usb.h +0 -0

similarity index 100%
rename from arch/arm/mach-mmp/include/mach/regs-usb.h
rename to arch/arm/mach-mmp/regs-usb.h

arch/arm/mach-mmp/tavorevb.c +4 -4

index cdfc9bfee1a4..efe35fadeb60 100644
@@ -16,10 +16,10 @@
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <mach/addr-map.h>
-#include <mach/mfp-pxa910.h>
-#include <mach/pxa910.h>
-#include <mach/irqs.h>
+#include "addr-map.h"
+#include "mfp-pxa910.h"
+#include "pxa910.h"
+#include "irqs.h"
 
 #include "common.h"

arch/arm/mach-mmp/teton_bga.c +5 -5

index 6aa53fb29d26..cf038eb3bb4b 100644
@@ -23,11 +23,11 @@
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <mach/addr-map.h>
-#include <mach/mfp-pxa168.h>
-#include <mach/pxa168.h>
-#include <mach/teton_bga.h>
-#include <mach/irqs.h>
+#include "addr-map.h"
+#include "mfp-pxa168.h"
+#include "pxa168.h"
+#include "teton_bga.h"
+#include "irqs.h"
 
 #include "common.h"

arch/arm/mach-mmp/teton_bga.h renamed from arch/arm/mach-mmp/include/mach/teton_bga.h +0 -2

similarity index 92%
rename from arch/arm/mach-mmp/include/mach/teton_bga.h
rename to arch/arm/mach-mmp/teton_bga.h
index 61a539b2cc98..019730f5aa56 100644
@@ -1,6 +1,4 @@
 /*
- *  linux/arch/arm/mach-mmp/include/mach/teton_bga.h
- *
  *  Support for the Marvell PXA168 Teton BGA Development Platform.
  *
  *  This program is free software; you can redistribute it and/or modify

arch/arm/mach-mmp/time.c +5 -6

index 10bfa03e58d4..20364de95d31 100644
@@ -29,14 +29,13 @@
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/sched_clock.h>
-
-#include <mach/addr-map.h>
-#include <mach/regs-timers.h>
-#include <mach/regs-apbc.h>
-#include <mach/irqs.h>
-#include <mach/cputype.h>
 #include <asm/mach/time.h>
 
+#include "addr-map.h"
+#include "regs-timers.h"
+#include "regs-apbc.h"
+#include "irqs.h"
+#include "cputype.h"
 #include "clock.h"
 
 #ifdef CONFIG_CPU_MMP2

arch/arm/mach-mmp/ttc_dkb.c +5 -5

index ac4af81de3ea..d90c74fa614d 100644
@@ -26,11 +26,11 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
-#include <mach/addr-map.h>
-#include <mach/mfp-pxa910.h>
-#include <mach/pxa910.h>
-#include <mach/irqs.h>
-#include <mach/regs-usb.h>
+#include "addr-map.h"
+#include "mfp-pxa910.h"
+#include "pxa910.h"
+#include "irqs.h"
+#include "regs-usb.h"
 
 #include "common.h"

Signature · 1 line

2.1.0.rc2

Arnd Bergmann

author

2015-02-27 13:31 UTC #16 lore raw

PATCH 7/8 ARM: mmp: make plat-pxa build standalone

In reply to Arnd Bergmann

The ssp.c driver in plat-pxa is the only remaining file including a mach/*.h header from mmp. It actually doesn't need mach/hardware.h at all, so we can remove the #include.

Signed-off-by Arnd Bergmann <[email protected]>

---
 arch/arm/plat-pxa/ssp.c | 1 -
 1 file changed, 1 deletion(-)

arch/arm/plat-pxa/ssp.c +0 -1

index ad9529cc4203..257790259d2b 100644
@@ -34,7 +34,6 @@
 #include <linux/of_device.h>
 
 #include <asm/irq.h>
-#include <mach/hardware.h>
 
 static DEFINE_MUTEX(ssp_lock);
 static LIST_HEAD(ssp_list);

Signature · 1 line

2.1.0.rc2