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arm64: Expose ID_AA64ISAR1_EL1.XS to sanitised feature consumers

PATCH Applied Marc Zyngier 3 participants 6 messages Oct 31, 2024 – Nov 1, 2024

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Marc Zyngier

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#0 lore raw

PATCH 1/1 arm64: Expose ID_AA64ISAR1_EL1.XS to sanitised feature consumers

Despite KVM now being able to deal with XS-tagged TLBIs, we still don't expose these feature bits to KVM.

Plumb in the feature in ID_AA64ISAR1_EL1.

Fixes 0feec7769a63 ("KVM: arm64: nv: Add handling of NXS-flavoured TLBI operations")
Signed-off-by Marc Zyngier <[email protected]>
---
 arch/arm64/kernel/cpufeature.c | 1 +
 1 file changed, 1 insertion(+)
arch/arm64/kernel/cpufeature.c +1 -0
index 718728a85430..db994d1fd97e 100644
@@ -228,6 +228,7 @@ static const struct arm64_ftr_bits ftr_id_aa64isar0[] = {
 };
 
 static const struct arm64_ftr_bits ftr_id_aa64isar1[] = {
+	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_EL1_XS_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_EL1_I8MM_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_EL1_DGH_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_EL1_BF16_SHIFT, 4, 0),
Signature · 1 line
2.43.0
maintainer Acked-by on v1 1/1
#1 lore raw
Quoted 7 lines · Marc Zyngier

Despite KVM now being able to deal with XS-tagged TLBIs, we still don't expose these feature bits to KVM.

Plumb in the feature in ID_AA64ISAR1_EL1.

Fixes 0feec7769a63 ("KVM: arm64: nv: Add handling of NXS-flavoured TLBI operations")
Signed-off-by Marc Zyngier <[email protected]>
Acked-by Catalin Marinas <[email protected]>

Happy for this to go in as a fix via the kvm tree but let me know if I should pick it up instead.

Signature · 1 line
Catalin
Reviewed-by
#2 lore raw
Quoted 6 lines · Catalin Marinas
Quoted 5 lines · Marc Zyngier

Despite KVM now being able to deal with XS-tagged TLBIs, we still don't expose these feature bits to KVM.

Plumb in the feature in ID_AA64ISAR1_EL1.

Quoted 7 lines
Quoted 2 lines
Fixes 0feec7769a63 ("KVM: arm64: nv: Add handling of NXS-flavoured TLBI operations")
Signed-off-by Marc Zyngier <[email protected]>
Acked-by Catalin Marinas <[email protected]>

Happy for this to go in as a fix via the kvm tree but let me know if I should pick it up instead.

Thanks Catalin. I think this can wait for 6.13, would you mind grabbing it?

If you do:

Reviewed-by Oliver Upton <[email protected]>
Signature · 2 lines
Thanks,
Oliver
maintainer
#3 lore raw
Quoted 15 lines · Oliver Upton
Quoted 6 lines · Catalin Marinas
Quoted 5 lines · Marc Zyngier

Despite KVM now being able to deal with XS-tagged TLBIs, we still don't expose these feature bits to KVM.

Plumb in the feature in ID_AA64ISAR1_EL1.

Quoted 7 lines
Quoted 2 lines
Fixes 0feec7769a63 ("KVM: arm64: nv: Add handling of NXS-flavoured TLBI operations")
Signed-off-by Marc Zyngier <[email protected]>
Acked-by Catalin Marinas <[email protected]>

Happy for this to go in as a fix via the kvm tree but let me know if I should pick it up instead.

Quoted 6 lines

Thanks Catalin. I think this can wait for 6.13, would you mind grabbing it?

If you do:

Reviewed-by Oliver Upton <[email protected]>

I'll pick it up. Thanks.

Signature · 1 line
Catalin
author maintainer
#4 lore raw
In reply to Catalin Marinas
Quoted 7 lines · Catalin Marinas
Quoted 5 lines · Marc Zyngier

Despite KVM now being able to deal with XS-tagged TLBIs, we still don't expose these feature bits to KVM.

Plumb in the feature in ID_AA64ISAR1_EL1.

Quoted 7 lines
Quoted 2 lines
Fixes 0feec7769a63 ("KVM: arm64: nv: Add handling of NXS-flavoured TLBI operations")
Signed-off-by Marc Zyngier <[email protected]>
Acked-by Catalin Marinas <[email protected]>

Happy for this to go in as a fix via the kvm tree but let me know if I should pick it up instead.

No need to merge this urgently, nothing goes badly wrong.

Thanks,

	M.
Signature · 1 line
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