irqchip: irq-bcm2836: add support for DT interrupt polarity

PATCH New Stefan Wahren 5 participants 13 messages Dec 11, 2017 – Jan 3, 2018 2 messages not in the archive

Subsystems (4)

Device tree bindings irqchip drivers Broadcom BCM2711/BCM2835 Arm architecture Broadcom BCM281XX/BCM11XXX/BCM216XX Arm architecture

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Stefan Wahren

author

2017-12-11 20:39 UTC #0 lore raw

cover irqchip: irq-bcm2836: add support for DT interrupt polarity

This patch series implements DT polarity support for the 1st level interrupt controller.

Stefan Wahren (3):
dt-bindings: bcm2836-l1-intc: add interrupt polarity support
irqchip: irq-bcm2836: add support for DT interrupt polarity
ARM: dts: bcm283x: Define polarity of per-cpu interrupts

 .../interrupt-controller/brcm,bcm2836-l1-intc.txt  |  4 +-
 arch/arm/boot/dts/bcm2836.dtsi                     | 14 +++----
 arch/arm/boot/dts/bcm2837.dtsi                     | 12 +++---
 arch/arm/boot/dts/bcm283x.dtsi                     |  1 +
 drivers/irqchip/irq-bcm2836.c                      | 46 +++++++++++++---------
 5 files changed, 44 insertions(+), 33 deletions(-)

Signature · 1 line

2.7.4

Stefan Wahren

author

2017-12-11 20:39 UTC #1 lore raw

PATCH 1/3 dt-bindings: bcm2836-l1-intc: add interrupt polarity support

This increases the interrupt cells for the 1st level interrupt controller binding in order to describe the polarity like on the other ARM platforms.

Signed-off-by Stefan Wahren <[email protected]>

---
 .../devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.txt +2 -2

index f320dcd..8ced169 100644
@@ -12,7 +12,7 @@ Required properties:
 			  registers
 - interrupt-controller:	Identifies the node as an interrupt controller
 - #interrupt-cells:	Specifies the number of cells needed to encode an
-			  interrupt source. The value shall be 1
+			  interrupt source. The value shall be 2
 
 Please refer to interrupts.txt in this directory for details of the common
 Interrupt Controllers bindings used by client devices.

@@ -32,6 +32,6 @@ local_intc: local_intc {
 	compatible = "brcm,bcm2836-l1-intc";
 	reg = <0x40000000 0x100>;
 	interrupt-controller;
-	#interrupt-cells = <1>;
+	#interrupt-cells = <2>;
 	interrupt-parent = <&local_intc>;
 };

Signature · 1 line

2.7.4

Eric Anholt

2017-12-15 21:53 UTC #2 lore raw

PATCH 1/3 dt-bindings: bcm2836-l1-intc: add interrupt polarity support

Quoted 4 lines · Stefan Wahren

This increases the interrupt cells for the 1st level interrupt controller binding in order to describe the polarity like on the other ARM platforms.
Signed-off-by Stefan Wahren <[email protected]>

I'm happy with this. Any DT maintainer concerns?
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Rob Herring

maintainer

2017-12-15 22:23 UTC #3 lore raw

PATCH 1/3 dt-bindings: bcm2836-l1-intc: add interrupt polarity support

In reply to Stefan Wahren

Quoted 7 lines · Stefan Wahren

This increases the interrupt cells for the 1st level interrupt controller binding in order to describe the polarity like on the other ARM platforms.
Signed-off-by Stefan Wahren <[email protected]>
---
 .../devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Reviewed-by Rob Herring <[email protected]>

Stefan Wahren

author

2017-12-11 20:39 UTC #4 lore raw

PATCH 2/3 irqchip: irq-bcm2836: add support for DT interrupt polarity

In reply to Stefan Wahren

In order to properly define the polarity of the per-cpu interrupts, we need to support for a second property cell. But this must be optional to keep backward compatibility with old DT blobs.

Signed-off-by Stefan Wahren <[email protected]>

---
 drivers/irqchip/irq-bcm2836.c | 46 ++++++++++++++++++++++++++-----------------
 1 file changed, 28 insertions(+), 18 deletions(-)

drivers/irqchip/irq-bcm2836.c +28 ~~-18~~

index 667b9e1..dfe4a46 100644
@@ -98,13 +98,35 @@ static struct irq_chip bcm2836_arm_irqchip_gpu = {
 	.irq_unmask	= bcm2836_arm_irqchip_unmask_gpu_irq,
 };
 
-static void bcm2836_arm_irqchip_register_irq(int hwirq, struct irq_chip *chip)
-{
-	int irq = irq_create_mapping(intc.domain, hwirq);
+static int bcm2836_map(struct irq_domain *d, unsigned int irq,
+		       irq_hw_number_t hw)
+{
+	struct irq_chip *chip;
+
+	switch (hw) {
+	case LOCAL_IRQ_CNTPSIRQ:
+	case LOCAL_IRQ_CNTPNSIRQ:
+	case LOCAL_IRQ_CNTHPIRQ:
+	case LOCAL_IRQ_CNTVIRQ:
+		chip = &bcm2836_arm_irqchip_timer;
+		break;
+	case LOCAL_IRQ_GPU_FAST:
+		chip = &bcm2836_arm_irqchip_gpu;
+		break;
+	case LOCAL_IRQ_PMU_FAST:
+		chip = &bcm2836_arm_irqchip_pmu;
+		break;
+	default:
+		pr_warn_once("Unexpected hw irq: %lu\n", hw);
+		return -EINVAL;
+	}
 
 	irq_set_percpu_devid(irq);
-	irq_set_chip_and_handler(irq, chip, handle_percpu_devid_irq);
+	irq_domain_set_info(d, irq, hw, chip, d->host_data,
+			    handle_percpu_devid_irq, NULL, NULL);
 	irq_set_status_flags(irq, IRQ_NOAUTOEN);
+
+	return 0;
 }
 
 static void

@@ -165,7 +187,8 @@ static int bcm2836_cpu_dying(unsigned int cpu)
 #endif
 
 static const struct irq_domain_ops bcm2836_arm_irqchip_intc_ops = {
-	.xlate = irq_domain_xlate_onecell
+	.xlate = irq_domain_xlate_onetwocell,
+	.map = bcm2836_map,
 };
 
 static void

@@ -218,19 +241,6 @@ static int __init bcm2836_arm_irqchip_l1_intc_of_init(struct device_node *node,
 	if (!intc.domain)
 		panic("%pOF: unable to create IRQ domain\n", node);
 
-	bcm2836_arm_irqchip_register_irq(LOCAL_IRQ_CNTPSIRQ,
-					 &bcm2836_arm_irqchip_timer);
-	bcm2836_arm_irqchip_register_irq(LOCAL_IRQ_CNTPNSIRQ,
-					 &bcm2836_arm_irqchip_timer);
-	bcm2836_arm_irqchip_register_irq(LOCAL_IRQ_CNTHPIRQ,
-					 &bcm2836_arm_irqchip_timer);
-	bcm2836_arm_irqchip_register_irq(LOCAL_IRQ_CNTVIRQ,
-					 &bcm2836_arm_irqchip_timer);
-	bcm2836_arm_irqchip_register_irq(LOCAL_IRQ_GPU_FAST,
-					 &bcm2836_arm_irqchip_gpu);
-	bcm2836_arm_irqchip_register_irq(LOCAL_IRQ_PMU_FAST,
-					 &bcm2836_arm_irqchip_pmu);
-
 	bcm2836_arm_irqchip_smp_init();
 
 	set_handle_irq(bcm2836_arm_irqchip_handle_irq);

Signature · 1 line

2.7.4

Stefan Wahren

author

2017-12-11 20:39 UTC #5 lore raw

PATCH 3/3 ARM: dts: bcm283x: Define polarity of per-cpu interrupts

In reply to Stefan Wahren

This patch define the polarity of the per-cpu interrupts on BCM2836 and BCM2837 in order to avoid the warnings from ARM arch timer code:

arch_timer: WARNING: Invalid trigger for IRQ19, assuming level low
arch_timer: WARNING: Please fix your firmware
arch_timer: cp15 timer(s) running at 19.20MHz (virt).

Signed-off-by Stefan Wahren <[email protected]>

---
 arch/arm/boot/dts/bcm2836.dtsi | 14 +++++++-------
 arch/arm/boot/dts/bcm2837.dtsi | 12 ++++++------
 arch/arm/boot/dts/bcm283x.dtsi |  1 +
 3 files changed, 14 insertions(+), 13 deletions(-)

arch/arm/boot/dts/bcm2836.dtsi +7 -7

index 61e1580..1dfd764 100644
@@ -13,24 +13,24 @@
 			compatible = "brcm,bcm2836-l1-intc";
 			reg = <0x40000000 0x100>;
 			interrupt-controller;
-			#interrupt-cells = <1>;
+			#interrupt-cells = <2>;
 			interrupt-parent = <&local_intc>;
 		};
 
 		arm-pmu {
 			compatible = "arm,cortex-a7-pmu";
 			interrupt-parent = <&local_intc>;
-			interrupts = <9>;
+			interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
 		};
 	};
 
 	timer {
 		compatible = "arm,armv7-timer";
 		interrupt-parent = <&local_intc>;
-		interrupts = <0>, // PHYS_SECURE_PPI
-			     <1>, // PHYS_NONSECURE_PPI
-			     <3>, // VIRT_PPI
-			     <2>; // HYP_PPI
+		interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI
+			     <1 IRQ_TYPE_LEVEL_HIGH>, // PHYS_NONSECURE_PPI
+			     <3 IRQ_TYPE_LEVEL_HIGH>, // VIRT_PPI
+			     <2 IRQ_TYPE_LEVEL_HIGH>; // HYP_PPI
 		always-on;
 	};

@@ -76,7 +76,7 @@
 	compatible = "brcm,bcm2836-armctrl-ic";
 	reg = <0x7e00b200 0x200>;
 	interrupt-parent = <&local_intc>;
-	interrupts = <8>;
+	interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
 };
 
 &cpu_thermal {

arch/arm/boot/dts/bcm2837.dtsi +6 -6

index bc1cca5..efa7d33 100644
@@ -12,7 +12,7 @@
 			compatible = "brcm,bcm2836-l1-intc";
 			reg = <0x40000000 0x100>;
 			interrupt-controller;
-			#interrupt-cells = <1>;
+			#interrupt-cells = <2>;
 			interrupt-parent = <&local_intc>;
 		};
 	};

@@ -20,10 +20,10 @@
 	timer {
 		compatible = "arm,armv7-timer";
 		interrupt-parent = <&local_intc>;
-		interrupts = <0>, // PHYS_SECURE_PPI
-			     <1>, // PHYS_NONSECURE_PPI
-			     <3>, // VIRT_PPI
-			     <2>; // HYP_PPI
+		interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI
+			     <1 IRQ_TYPE_LEVEL_HIGH>, // PHYS_NONSECURE_PPI
+			     <3 IRQ_TYPE_LEVEL_HIGH>, // VIRT_PPI
+			     <2 IRQ_TYPE_LEVEL_HIGH>; // HYP_PPI
 		always-on;
 	};

@@ -73,7 +73,7 @@
 	compatible = "brcm,bcm2836-armctrl-ic";
 	reg = <0x7e00b200 0x200>;
 	interrupt-parent = <&local_intc>;
-	interrupts = <8>;
+	interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
 };
 
 &cpu_thermal {

arch/arm/boot/dts/bcm283x.dtsi +1 -0

index e08203c..0d43bd4 100644
@@ -2,6 +2,7 @@
 #include <dt-bindings/clock/bcm2835.h>
 #include <dt-bindings/clock/bcm2835-aux.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 
 /* firmware-provided startup stubs live here, where the secondary CPUs are
  * spinning.

Signature · 1 line

2.7.4

Stefan Wahren

author

2017-12-19 07:02 UTC #6 lore raw

cover irqchip: irq-bcm2836: add support for DT interrupt polarity

In reply to Stefan Wahren

Hi Marc,

Am 11.12.2017 um 21:39 schrieb Stefan Wahren:

Quoted 8 lines

This patch series implements DT polarity support for the 1st level interrupt controller.
Stefan Wahren (3):
dt-bindings: bcm2836-l1-intc: add interrupt polarity support
irqchip: irq-bcm2836: add support for DT interrupt polarity
ARM: dts: bcm283x: Define polarity of per-cpu interrupts

Quoted 7 lines

  .../interrupt-controller/brcm,bcm2836-l1-intc.txt  |  4 +-
  arch/arm/boot/dts/bcm2836.dtsi                     | 14 +++----
  arch/arm/boot/dts/bcm2837.dtsi                     | 12 +++---
  arch/arm/boot/dts/bcm283x.dtsi                     |  1 +
  drivers/irqchip/irq-bcm2836.c                      | 46 +++++++++++++---------
  5 files changed, 44 insertions(+), 33 deletions(-)

is this series okay?

Marc Zyngier

2017-12-19 16:36 UTC #7 lore raw

cover irqchip: irq-bcm2836: add support for DT interrupt polarity

Quoted 19 lines · Stefan Wahren

Hi Marc,
Am 11.12.2017 um 21:39 schrieb Stefan Wahren:
Quoted 8 lines
This patch series implements DT polarity support for the 1st level interrupt controller.
Stefan Wahren (3):
dt-bindings: bcm2836-l1-intc: add interrupt polarity support
irqchip: irq-bcm2836: add support for DT interrupt polarity
ARM: dts: bcm283x: Define polarity of per-cpu interrupts
Quoted 7 lines
  .../interrupt-controller/brcm,bcm2836-l1-intc.txt  |  4 +-
  arch/arm/boot/dts/bcm2836.dtsi                     | 14 +++----
  arch/arm/boot/dts/bcm2837.dtsi                     | 12 +++---
  arch/arm/boot/dts/bcm283x.dtsi                     |  1 +
  drivers/irqchip/irq-bcm2836.c                      | 46 +++++++++++++---------
  5 files changed, 44 insertions(+), 33 deletions(-)

Quoted 1 line

is this series okay?

Yes, it does look good. I'll queue that for 4.16.

Thanks,

M.

Signature · 1 line

Jazz is not dead. It just smells funny...

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Eric Anholt

2017-12-19 18:41 UTC #9 lore raw

Quoted 20 lines · Marc Zyngier

Quoted 19 lines · Stefan Wahren
Hi Marc,
Am 11.12.2017 um 21:39 schrieb Stefan Wahren:
Quoted 15 lines
This patch series implements DT polarity support for the 1st level interrupt controller.
Stefan Wahren (3):
dt-bindings: bcm2836-l1-intc: add interrupt polarity support
irqchip: irq-bcm2836: add support for DT interrupt polarity
ARM: dts: bcm283x: Define polarity of per-cpu interrupts
  .../interrupt-controller/brcm,bcm2836-l1-intc.txt  |  4 +-
  arch/arm/boot/dts/bcm2836.dtsi                     | 14 +++----
  arch/arm/boot/dts/bcm2837.dtsi                     | 12 +++---
  arch/arm/boot/dts/bcm283x.dtsi                     |  1 +
  drivers/irqchip/irq-bcm2836.c                      | 46 +++++++++++++---------
  5 files changed, 44 insertions(+), 33 deletions(-)

Quoted 3 lines

Quoted 1 line
is this series okay?
Yes, it does look good. I'll queue that for 4.16.

Are you grabbing all 3, or should I be grabbing the DT one?

Marc Zyngier

2017-12-19 18:50 UTC #10 lore raw

cover irqchip: irq-bcm2836: add support for DT interrupt polarity

Quoted 22 lines · Eric Anholt

Quoted 20 lines · Marc Zyngier
Quoted 19 lines · Stefan Wahren
Hi Marc,
Am 11.12.2017 um 21:39 schrieb Stefan Wahren:
Quoted 15 lines
This patch series implements DT polarity support for the 1st level interrupt controller.
Stefan Wahren (3):
dt-bindings: bcm2836-l1-intc: add interrupt polarity support
irqchip: irq-bcm2836: add support for DT interrupt polarity
ARM: dts: bcm283x: Define polarity of per-cpu interrupts
  .../interrupt-controller/brcm,bcm2836-l1-intc.txt  |  4 +-
  arch/arm/boot/dts/bcm2836.dtsi                     | 14 +++----
  arch/arm/boot/dts/bcm2837.dtsi                     | 12 +++---
  arch/arm/boot/dts/bcm283x.dtsi                     |  1 +
  drivers/irqchip/irq-bcm2836.c                      | 46 +++++++++++++---------
  5 files changed, 44 insertions(+), 33 deletions(-)

Quoted 5 lines

Quoted 3 lines
Quoted 1 line
is this series okay?
Yes, it does look good. I'll queue that for 4.16.
Are you grabbing all 3, or should I be grabbing the DT one?

All 3, if that's OK with you.

M.

Signature · 1 line

Jazz is not dead. It just smells funny...

A message that is not in the archive (sent off-list or not yet received): 97a68b71-2e62-13ba-72ac-575c3b68617a-5wv7dgnIgG8@public.gmane.org

Eric Anholt

2017-12-20 00:12 UTC #12 lore raw

Quoted 23 lines · Marc Zyngier

Quoted 22 lines · Eric Anholt
Quoted 20 lines · Marc Zyngier
Quoted 19 lines · Stefan Wahren
Hi Marc,
Am 11.12.2017 um 21:39 schrieb Stefan Wahren:
Quoted 15 lines
This patch series implements DT polarity support for the 1st level interrupt controller.
Stefan Wahren (3):
dt-bindings: bcm2836-l1-intc: add interrupt polarity support
irqchip: irq-bcm2836: add support for DT interrupt polarity
ARM: dts: bcm283x: Define polarity of per-cpu interrupts
  .../interrupt-controller/brcm,bcm2836-l1-intc.txt  |  4 +-
  arch/arm/boot/dts/bcm2836.dtsi                     | 14 +++----
  arch/arm/boot/dts/bcm2837.dtsi                     | 12 +++---
  arch/arm/boot/dts/bcm283x.dtsi                     |  1 +
  drivers/irqchip/irq-bcm2836.c                      | 46 +++++++++++++---------
  5 files changed, 44 insertions(+), 33 deletions(-)

Quoted 7 lines

Quoted 5 lines
Quoted 3 lines
Quoted 1 line
is this series okay?
Yes, it does look good. I'll queue that for 4.16.
Are you grabbing all 3, or should I be grabbing the DT one?
All 3, if that's OK with you.

Go for it.

Stefan Wahren

author

2018-01-03 17:10 UTC #13 lore raw

cover irqchip: irq-bcm2836: add support for DT interrupt polarity

In reply to Marc Zyngier

Hi Marc,

Am 19.12.2017 um 17:36 schrieb Marc Zyngier:

Quoted 19 lines · Stefan Wahren

Quoted 18 lines
Hi Marc,
Am 11.12.2017 um 21:39 schrieb Stefan Wahren:
Quoted 15 lines
This patch series implements DT polarity support for the 1st level interrupt controller.
Stefan Wahren (3):
dt-bindings: bcm2836-l1-intc: add interrupt polarity support
irqchip: irq-bcm2836: add support for DT interrupt polarity
ARM: dts: bcm283x: Define polarity of per-cpu interrupts
   .../interrupt-controller/brcm,bcm2836-l1-intc.txt  |  4 +-
   arch/arm/boot/dts/bcm2836.dtsi                     | 14 +++----
   arch/arm/boot/dts/bcm2837.dtsi                     | 12 +++---
   arch/arm/boot/dts/bcm283x.dtsi                     |  1 +
   drivers/irqchip/irq-bcm2836.c                      | 46 +++++++++++++---------
   5 files changed, 44 insertions(+), 33 deletions(-)

Quoted 6 lines

Quoted 1 line
is this series okay?
Yes, it does look good. I'll queue that for 4.16.
Thanks,
	M.

since i didn't found this in linux-next, please take this as a gentle reminder.

Thanks
Stefan

Marc Zyngier

2018-01-03 17:14 UTC #14 lore raw

cover irqchip: irq-bcm2836: add support for DT interrupt polarity

Quoted 24 lines · Stefan Wahren

Hi Marc,
Am 19.12.2017 um 17:36 schrieb Marc Zyngier:
Quoted 20 lines · Stefan Wahren
Quoted 19 lines
Hi Marc,
Am 11.12.2017 um 21:39 schrieb Stefan Wahren:
Quoted 8 lines
This patch series implements DT polarity support for the 1st level interrupt controller.
Stefan Wahren (3):
dt-bindings: bcm2836-l1-intc: add interrupt polarity support
irqchip: irq-bcm2836: add support for DT interrupt polarity
ARM: dts: bcm283x: Define polarity of per-cpu interrupts
Quoted 7 lines
   .../interrupt-controller/brcm,bcm2836-l1-intc.txt  |  4 +-
   arch/arm/boot/dts/bcm2836.dtsi                     | 14 +++----
   arch/arm/boot/dts/bcm2837.dtsi                     | 12 +++---
   arch/arm/boot/dts/bcm283x.dtsi                     |  1 +
   drivers/irqchip/irq-bcm2836.c                      | 46 +++++++++++++---------
   5 files changed, 44 insertions(+), 33 deletions(-)
is this series okay?

Quoted 8 lines

Quoted 5 lines
Yes, it does look good. I'll queue that for 4.16.
Thanks,
	M.
since i didn't found this in linux-next, please take this as a gentle reminder.

It will take some time before I push this to tglx, as I'm otherwise engaged. Patches are not lost.

Thanks,

M.

Signature · 1 line

Jazz is not dead. It just smells funny...