change pxa gpio to platform driver
Subsystems (6)
v7 cover change pxa gpio to platform driver
Changelog
v7:
1. add clk_prepare() support in gpio-pxa.c.
v6:
1. fix build issue in pxa910 since building gpio failure is found in mainline.
2. merge two dependant patches (original v5 0005 and 0006) together.
3. fix gpio bit issue in corgi and spitz.
4. replace printk() with dev_err in clk patch.
v5:
1. use generic gpio driver. So clean gpio-pxa.h and gpio-pxa.c again.
v4:
1. append one patch for clean gpio macros and use function instead.
v3:
1. Rebase on Russell's for-next branch.
2. Add clock support.
3. Move gpio edge detection initiliaztion of arch-mmp into gpio driver.
v2:
1. Remove gpio.c from mach-pxa & mach-mmp that is introduced from v1.
2. Remove init function in gpio.c. Move the platfrom_device_register() into platform driver.
3. Initialize pxa_gpio_regs in gpio-pxa.c
4. Simplify code of identifing pxa gpio series or mmp gpio series.
5. Use linux/io.h instead of asm/io.h.
PATCH v7 1/11 ARM: mmp: fix build error on gpio
Parameters of GPIO_REG() should be assigned as volatile.
arch/arm/plat-pxa/include/plat/gpio.h: In function ?gpio_get_value?:arch/arm/plat-pxa/include/plat/gpio.h:12:21: error: invalid operands to binary & (have ?void *? and ?int?) arch/arm/plat-pxa/include/plat/gpio.h: In function ?gpio_set_value?:arch/arm/plat-pxa/include/plat/gpio.h:21:4: error: lvalue required as left operand of assignment arch/arm/plat-pxa/include/plat/gpio.h:23:4: error: lvalue required as left operand of assignment
--- arch/arm/mach-mmp/include/mach/gpio-pxa.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mmp/include/mach/gpio-pxa.h +1 -1
@@ -7,7 +7,7 @@#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000)#define BANK_OFF (n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) -#define GPIO_REG (x) (GPIO_REGS_VIRT + (x)) +#define GPIO_REG (x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))#define NR_BUILTIN_GPIO IRQ_GPIO_NUM
Signature · 1 line
1.7.4.1
Eric Miao
AppliedPATCH v7 1/11 ARM: mmp: fix build error on gpio
Quoted 11 lines · Haojian Zhuang
Parameters of
GPIO_REG()should be assigned as volatile.
arch/arm/plat-pxa/include/plat/gpio.h: In function ?gpio_get_value?:arch/arm/plat-pxa/include/plat/gpio.h:12:21: error: invalid operands to binary & (have ?void *? and ?int?)arch/arm/plat-pxa/include/plat/gpio.h: In function ?gpio_set_value?:arch/arm/plat-pxa/include/plat/gpio.h:21:4: error: lvalue required as left operand of assignmentarch/arm/plat-pxa/include/plat/gpio.h:23:4: error: lvalue required as left operand of assignment
Quoted 1 line
Signed-off-by Haojian Zhuang <[email protected]>
Applied.
Quoted 21 lines
---
?arch/arm/mach-mmp/include/mach/gpio-pxa.h | ? ?2 +- ?1 files changed, 1 insertions(+), 1 deletions(-)arch/arm/mach-mmp/include/mach/gpio-pxa.h +1
-1@@ -7,7 +7,7 @@ ?#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000) ?#define BANK_OFF(n) ? ?(((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) -#define GPIO_REG (x) ? ?(GPIO_REGS_VIRT + (x)) +#define GPIO_REG (x) ? ?(*(volatile u32 *)(GPIO_REGS_VIRT + (x)))?#define
NR_BUILTIN_GPIO? ? ? ? ? ? ? ?IRQ_GPIO_NUM--
1.7.4.1
PATCH v7 1/11 ARM: mmp: fix build error on gpio
In reply to Haojian ZhuangQuoted 21 lines · Haojian Zhuang
Parameters of
GPIO_REG()should be assigned as volatile.
arch/arm/plat-pxa/include/plat/gpio.h: In function ?gpio_get_value?:arch/arm/plat-pxa/include/plat/gpio.h:12:21: error: invalid operands to binary & (have ?void *? and ?int?)arch/arm/plat-pxa/include/plat/gpio.h: In function ?gpio_set_value?:arch/arm/plat-pxa/include/plat/gpio.h:21:4: error: lvalue required as left operand of assignmentarch/arm/plat-pxa/include/plat/gpio.h:23:4: error: lvalue required as left operand of assignmentSigned-off-by Haojian Zhuang <[email protected]>--- arch/arm/mach-mmp/include/mach/gpio-pxa.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)arch/arm/mach-mmp/include/mach/gpio-pxa.h +0
-0
arch/arm/mach-mmp/include/mach/gpio-pxa.h line 12
Quoted 7 lines
arch/arm/mach-mmp/include/mach/gpio-pxa.h +1
-1@@ -7,7 +7,7 @@#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000)#define BANK_OFF (n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) -#define GPIO_REG (x) (GPIO_REGS_VIRT + (x)) +#define GPIO_REG (x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))#define NR_BUILTIN_GPIO IRQ_GPIO_NUM
Note that this is not the correct fix, it just restores the previous state after I broke the original code in an "evil" merge commit that tried to merge the gpio branch with my patch that changed the mmio annotations.
Anyway, everything seems fine now, since patch 9/11 removes the code either way.
Arnd
PATCH v7 1/11 ARM: mmp: fix build error on gpio
Quoted 35 lines · Arnd Bergmann
Quoted 27 lines · Haojian Zhuang
Parameters of
GPIO_REG()should be assigned as volatile.
arch/arm/plat-pxa/include/plat/gpio.h: In function ?gpio_get_value?:arch/arm/plat-pxa/include/plat/gpio.h:12:21: error: invalid operands to binary & (have ?void *? and ?int?)arch/arm/plat-pxa/include/plat/gpio.h: In function ?gpio_set_value?:arch/arm/plat-pxa/include/plat/gpio.h:21:4: error: lvalue required as left operand of assignmentarch/arm/plat-pxa/include/plat/gpio.h:23:4: error: lvalue required as left operand of assignmentSigned-off-by Haojian Zhuang <[email protected]>---
?arch/arm/mach-mmp/include/mach/gpio-pxa.h | ? ?2 +- ?1 files changed, 1 insertions(+), 1 deletions(-)arch/arm/mach-mmp/include/mach/gpio-pxa.h +1
-1@@ -7,7 +7,7 @@ ?#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000) ?#define BANK_OFF(n) ? ?(((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) -#define GPIO_REG (x) ? ?(GPIO_REGS_VIRT + (x)) +#define GPIO_REG (x) ? ?(*(volatile u32 *)(GPIO_REGS_VIRT + (x)))Quoted 1 line
?#define
NR_BUILTIN_GPIO? ? ? ? ? ? ? ?IRQ_GPIO_NUMNote that this is not the correct fix, it just restores the previous state after I broke the original code in an "evil" merge commit that tried to merge the gpio branch with my patch that changed the mmio annotations.
Quoted 2 lines
Anyway, everything seems fine now, since patch 9/11 removes the code either way.
Yeah, but having a patch here really helps to make a buildable state of the history.
Shall I go ahead and send the GIT PULL with this patch? or you have another idea?
PATCH v7 1/11 ARM: mmp: fix build error on gpio
Quoted 36 lines · Eric Miao
Quoted 35 lines · Arnd Bergmann
Quoted 21 lines · Haojian Zhuang
Parameters of
GPIO_REG()should be assigned as volatile.
arch/arm/plat-pxa/include/plat/gpio.h: In function ?gpio_get_value?:arch/arm/plat-pxa/include/plat/gpio.h:12:21: error: invalid operands to binary & (have ?void *? and ?int?)arch/arm/plat-pxa/include/plat/gpio.h: In function ?gpio_set_value?:arch/arm/plat-pxa/include/plat/gpio.h:21:4: error: lvalue required as left operand of assignmentarch/arm/plat-pxa/include/plat/gpio.h:23:4: error: lvalue required as left operand of assignmentSigned-off-by Haojian Zhuang <[email protected]>--- arch/arm/mach-mmp/include/mach/gpio-pxa.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)arch/arm/mach-mmp/include/mach/gpio-pxa.h +0
-0arch/arm/mach-mmp/include/mach/gpio-pxa.h line 12
Quoted 7 lines
arch/arm/mach-mmp/include/mach/gpio-pxa.h +1
-1@@ -7,7 +7,7 @@#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000)#define BANK_OFF (n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) -#define GPIO_REG (x) (GPIO_REGS_VIRT + (x)) +#define GPIO_REG (x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))#define NR_BUILTIN_GPIO IRQ_GPIO_NUMNote that this is not the correct fix, it just restores the previous state after I broke the original code in an "evil" merge commit that tried to merge the gpio branch with my patch that changed the mmio annotations.
Quoted 8 lines
Quoted 2 lines
Anyway, everything seems fine now, since patch 9/11 removes the code either way.
Yeah, but having a patch here really helps to make a buildable state of the history.
Shall I go ahead and send the GIT PULL with this patch? or you have another idea?
Actually it turns out that Russell has already sent an identical fix upstream, and that has made it into 3.2-rc1, so I think it should be fine now without your patch.
Arnd
PATCH v7 1/11 ARM: mmp: fix build error on gpio
Quoted 10 lines · Arnd Bergmann
Quoted 5 lines · Eric Miao
Yeah, but having a patch here really helps to make a buildable state of the history.
Shall I go ahead and send the GIT PULL with this patch? or you have another idea?
Actually it turns out that Russell has already sent an identical fix upstream, and that has made it into 3.2-rc1, so I think it should be fine now without your patch.
I sent one for PXA for rc1, but missed MMP. So the MMP one is still required.
PATCH v7 2/11 ARM: pxa: rename IRQ_GPIO to PXA_GPIO_TO_IRQ
In reply to Haojian ZhuangAvoid potential naming confliction since multiple architecture will be built in a single kernel.
--- arch/arm/mach-pxa/am200epd.c | 4 +- arch/arm/mach-pxa/am300epd.c | 4 +- arch/arm/mach-pxa/balloon3.c | 2 +- arch/arm/mach-pxa/cm-x270.c | 2 +- arch/arm/mach-pxa/cm-x2xx.c | 4 +- arch/arm/mach-pxa/cm-x300.c | 6 +- arch/arm/mach-pxa/em-x270.c | 6 +- arch/arm/mach-pxa/eseries.c | 4 +- arch/arm/mach-pxa/idp.c | 4 +- arch/arm/mach-pxa/include/mach/balloon3.h | 6 +- arch/arm/mach-pxa/include/mach/corgi.h | 24 +++++----- arch/arm/mach-pxa/include/mach/gpio.h | 2 +- arch/arm/mach-pxa/include/mach/gumstix.h | 20 +++++----- arch/arm/mach-pxa/include/mach/idp.h | 14 +++--- arch/arm/mach-pxa/include/mach/irqs.h | 2 +- arch/arm/mach-pxa/include/mach/palmld.h | 8 ++-- arch/arm/mach-pxa/include/mach/palmt5.h | 8 ++-- arch/arm/mach-pxa/include/mach/palmtc.h | 4 +- arch/arm/mach-pxa/include/mach/palmtx.h | 8 ++-- arch/arm/mach-pxa/include/mach/pcm027.h | 8 ++-- arch/arm/mach-pxa/include/mach/pcm990_baseboard.h | 14 +++--- arch/arm/mach-pxa/include/mach/poodle.h | 24 +++++----- arch/arm/mach-pxa/include/mach/spitz.h | 34 ++++++++-------- arch/arm/mach-pxa/include/mach/tosa.h | 46 ++++++++++---------- arch/arm/mach-pxa/include/mach/trizeps4.h | 16 ++++---- arch/arm/mach-pxa/littleton.c | 4 +- arch/arm/mach-pxa/lpd270.c | 4 +- arch/arm/mach-pxa/lubbock.c | 4 +- arch/arm/mach-pxa/mainstone.c | 4 +- arch/arm/mach-pxa/poodle.c | 4 +- arch/arm/mach-pxa/sharpsl_pm.c | 24 +++++----- arch/arm/mach-pxa/stargate2.c | 22 +++++----- arch/arm/mach-pxa/vpac270.c | 6 +- arch/arm/mach-pxa/zylonite_pxa300.c | 4 +- 34 files changed, 175 insertions(+), 175 deletions(-)
arch/arm/mach-pxa/am200epd.c +2 -2
@@ -138,7 +138,7 @@ static void am200_cleanup(struct metronomefb_par *par) {int i; -free_irq (IRQ_GPIO (RDY_GPIO_PIN ), par); +free_irq (PXA_GPIO_TO_IRQ (RDY_GPIO_PIN ), par);for (i =0 ; i <ARRAY_SIZE (gpios); i++)gpio_free (gpios[i]);
@@ -292,7 +292,7 @@ static int am200_setup_irq(struct fb_info *info) {int ret; - ret =request_irq (IRQ_GPIO (RDY_GPIO_PIN ), am200_handle_irq, + ret =request_irq (PXA_GPIO_TO_IRQ (RDY_GPIO_PIN ), am200_handle_irq,IRQF_DISABLED |IRQF_TRIGGER_FALLING ,"AM200" , info->par);if (ret)
arch/arm/mach-pxa/am300epd.c +2 -2
@@ -176,7 +176,7 @@ static void am300_cleanup(struct broadsheetfb_par *par) {int i; -free_irq (IRQ_GPIO (RDY_GPIO_PIN ), par); +free_irq (PXA_GPIO_TO_IRQ (RDY_GPIO_PIN ), par);for (i =0 ; i <ARRAY_SIZE (gpios); i++)gpio_free (gpios[i]);
@@ -240,7 +240,7 @@ static int am300_setup_irq(struct fb_info *info)int ret;struct broadsheetfb_par *par = info->par; - ret =request_irq (IRQ_GPIO (RDY_GPIO_PIN ), am300_handle_irq, + ret =request_irq (PXA_GPIO_TO_IRQ (RDY_GPIO_PIN ), am300_handle_irq,IRQF_DISABLED |IRQF_TRIGGER_RISING ,"AM300" , par);if (ret)
arch/arm/mach-pxa/balloon3.c +1 -1
@@ -179,7 +179,7 @@ static unsigned long balloon3_ac97_pin_config[] __initdata = { };static struct ucb1400_pdata vpac270_ucb1400_pdata = { - .irq =IRQ_GPIO (BALLOON3_GPIO_CODEC_IRQ ), + .irq =PXA_GPIO_TO_IRQ (BALLOON3_GPIO_CODEC_IRQ ), };
arch/arm/mach-pxa/cm-x270.c +1 -1
@@ -33,7 +33,7 @@/* GPIO IRQ usage */ #define GPIO83_MMC_IRQ (83) -#define CMX270_MMC_IRQ IRQ_GPIO(GPIO83_MMC_IRQ) +#define CMX270_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO83_MMC_IRQ)/* MMC power enable */ #define GPIO105_MMC_POWER (105)
arch/arm/mach-pxa/cm-x2xx.c +2 -2
@@ -58,8 +58,8 @@ extern void cmx270_init(void);#define CMX255_GPIO_IT8152_IRQ (0)#define CMX270_GPIO_IT8152_IRQ (22) -#define CMX255_ETHIRQ IRQ_GPIO(GPIO22_ETHIRQ) -#define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ) +#define CMX255_ETHIRQ PXA_GPIO_TO_IRQ(GPIO22_ETHIRQ) +#define CMX270_ETHIRQ PXA_GPIO_TO_IRQ(GPIO10_ETHIRQ)#if defined(CONFIG_DM9000 ) || defined(CONFIG_DM9000_MODULE ) static struct resource cmx255_dm9000_resource[] = {
arch/arm/mach-pxa/cm-x300.c +3 -3
@@ -64,7 +64,7 @@#define GPIO82_MMC_IRQ (82)#define GPIO85_MMC_WP (85) -#define CM_X300_MMC_IRQ IRQ_GPIO(GPIO82_MMC_IRQ) +#define CM_X300_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO82_MMC_IRQ)#define GPIO95_RTC_CS (95)#define GPIO96_RTC_WR (96)
@@ -229,8 +229,8 @@ static struct resource dm9000_resources[] = { .flags = IORESOURCE_MEM, }, [2] = { - .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), - .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), + .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)), + .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)), .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, } };
arch/arm/mach-pxa/em-x270.c +3 -3
@@ -70,7 +70,7 @@/* common GPIOs */ #define GPIO11_NAND_CS (11)#define GPIO41_ETHIRQ (41) -#define EM_X270_ETHIRQ IRQ_GPIO(GPIO41_ETHIRQ) +#define EM_X270_ETHIRQ PXA_GPIO_TO_IRQ(GPIO41_ETHIRQ)#define GPIO115_WLAN_PWEN (115)#define GPIO19_WLAN_STRAP (19)#define GPIO9_USB_VBUS_EN (9)
@@ -805,7 +805,7 @@ static struct spi_board_info em_x270_spi_devices[] __initdata = { .modalias = "libertas_spi", .max_speed_hz = 13000000, .bus_num = 2, - .irq = IRQ_GPIO(116), + .irq = PXA_GPIO_TO_IRQ(116), .chip_select = 0, .controller_data = &em_x270_libertas_chip, .platform_data = &em_x270_libertas_pdata,
@@ -1203,7 +1203,7 @@ static struct da903x_platform_data em_x270_da9030_info = {static struct i2c_board_info em_x270_i2c_pmic_info = {I2C_BOARD_INFO ("da9030" ,0x49 ), - .irq =IRQ_GPIO (0 ), + .irq =PXA_GPIO_TO_IRQ (0 ), .platform_data = &em_x270_da9030_info, };
arch/arm/mach-pxa/eseries.c +2 -2
@@ -119,8 +119,8 @@ struct resource eseries_tmio_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ), - .end = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ), + .start = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ), + .end = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ), .flags = IORESOURCE_IRQ, }, };
arch/arm/mach-pxa/idp.c +2 -2
@@ -75,8 +75,8 @@ static struct resource smc91x_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_GPIO(4), - .end = IRQ_GPIO(4), + .start = PXA_GPIO_TO_IRQ(4), + .end = PXA_GPIO_TO_IRQ(4), .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, } };
arch/arm/mach-pxa/include/mach/balloon3.h +3 -3
@@ -172,9 +172,9 @@ enum balloon3_features {/* Balloon3 Interrupts */ #define BALLOON3_IRQ (x) (IRQ_BOARD_START + (x)) -#define BALLOON3_AUX_NIRQ IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ) -#define BALLOON3_CODEC_IRQ IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ) -#define BALLOON3_S0_CD_IRQ IRQ_GPIO(BALLOON3_GPIO_S0_CD) +#define BALLOON3_AUX_NIRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_AUX_NIRQ) +#define BALLOON3_CODEC_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ) +#define BALLOON3_S0_CD_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_S0_CD)#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16)
arch/arm/mach-pxa/include/mach/corgi.h +12 -12
@@ -66,18 +66,18 @@/* * Corgi Interrupts */ -#define CORGI_IRQ_GPIO_KEY_INT IRQ_GPIO(0) -#define CORGI_IRQ_GPIO_AC_IN IRQ_GPIO(1) -#define CORGI_IRQ_GPIO_WAKEUP IRQ_GPIO(3) -#define CORGI_IRQ_GPIO_AK_INT IRQ_GPIO(4) -#define CORGI_IRQ_GPIO_TP_INT IRQ_GPIO(5) -#define CORGI_IRQ_GPIO_nSD_DETECT IRQ_GPIO(9) -#define CORGI_IRQ_GPIO_nSD_INT IRQ_GPIO(10) -#define CORGI_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(11) -#define CORGI_IRQ_GPIO_CF_CD IRQ_GPIO(14) -#define CORGI_IRQ_GPIO_CHRG_FULL IRQ_GPIO(16)/* Battery fully charged */ -#define CORGI_IRQ_GPIO_CF_IRQ IRQ_GPIO(17) -#define CORGI_IRQ_GPIO_KEY_SENSE (a) IRQ_GPIO(58+(a))/* Keyboard Sense lines */ +#define CORGI_IRQ_GPIO_KEY_INT PXA_GPIO_TO_IRQ(0) +#define CORGI_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(1) +#define CORGI_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(3) +#define CORGI_IRQ_GPIO_AK_INT PXA_GPIO_TO_IRQ(4) +#define CORGI_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(5) +#define CORGI_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(9) +#define CORGI_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(10) +#define CORGI_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(11) +#define CORGI_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(14) +#define CORGI_IRQ_GPIO_CHRG_FULL PXA_GPIO_TO_IRQ(16)/* Battery fully charged */ +#define CORGI_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(17) +#define CORGI_IRQ_GPIO_KEY_SENSE (a) PXA_GPIO_TO_IRQ(58+(a))/* Keyboard Sense lines */ /*
arch/arm/mach-pxa/include/mach/gpio.h +1 -1
@@ -28,7 +28,7 @@/* The defines for the driver are needed for the accelerated accessors */ #include "gpio-pxa.h" -#define gpio_to_irq (gpio) IRQ_GPIO(gpio) +#define gpio_to_irq (gpio) PXA_GPIO_TO_IRQ(gpio)static inline int irq_to_gpio (unsigned int irq) {
arch/arm/mach-pxa/include/mach/gumstix.h +10 -10
@@ -24,7 +24,7 @@ has detected a cable insertion; driven low otherwise. */#define GPIO_GUMSTIX_USB_GPIOx 41/* usb state change */ -#define GUMSTIX_USB_INTR_IRQ IRQ_GPIO(GPIO_GUMSTIX_USB_GPIOn) +#define GUMSTIX_USB_INTR_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_USB_GPIOn)#define GPIO_GUMSTIX_USB_GPIOn_MD (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN)#define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT)
@@ -35,7 +35,7 @@ has detected a cable insertion; driven low otherwise. */*/ #define GUMSTIX_GPIO_nSD_WP 22/* SD Write Protect */ #define GUMSTIX_GPIO_nSD_DETECT 11/* MMC/SD Card Detect */ -#define GUMSTIX_IRQ_GPIO_nSD_DETECT IRQ_GPIO(GUMSTIX_GPIO_nSD_DETECT) +#define GUMSTIX_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(GUMSTIX_GPIO_nSD_DETECT)/* * SMC Ethernet definitions
@@ -49,10 +49,10 @@ has detected a cable insertion; driven low otherwise. */#define GPIO_GUMSTIX_ETH0 36#define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN) -#define GUMSTIX_ETH0_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH0) +#define GUMSTIX_ETH0_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0)#define GPIO_GUMSTIX_ETH1 27#define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN) -#define GUMSTIX_ETH1_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH1) +#define GUMSTIX_ETH1_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH1)/* CF reset line */
@@ -63,18 +63,18 @@ has detected a cable insertion; driven low otherwise. */#define GPIO4_nSTSCHG GPIO4_nBVD1#define GPIO11_nCD 11#define GPIO26_PRDY_nBSY 26 -#define GUMSTIX_S0_nSTSCHG_IRQ IRQ_GPIO(GPIO4_nSTSCHG) -#define GUMSTIX_S0_nCD_IRQ IRQ_GPIO(GPIO11_nCD) -#define GUMSTIX_S0_PRDY_nBSY_IRQ IRQ_GPIO(GPIO26_PRDY_nBSY) +#define GUMSTIX_S0_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO4_nSTSCHG) +#define GUMSTIX_S0_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO11_nCD) +#define GUMSTIX_S0_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO26_PRDY_nBSY)/* CF slot 1 */ #define GPIO18_nBVD1 18#define GPIO18_nSTSCHG GPIO18_nBVD1#define GPIO36_nCD 36#define GPIO27_PRDY_nBSY 27 -#define GUMSTIX_S1_nSTSCHG_IRQ IRQ_GPIO(GPIO18_nSTSCHG) -#define GUMSTIX_S1_nCD_IRQ IRQ_GPIO(GPIO36_nCD) -#define GUMSTIX_S1_PRDY_nBSY_IRQ IRQ_GPIO(GPIO27_PRDY_nBSY) +#define GUMSTIX_S1_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO18_nSTSCHG) +#define GUMSTIX_S1_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO36_nCD) +#define GUMSTIX_S1_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO27_PRDY_nBSY)/* CF GPIO line modes */ #define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN)
arch/arm/mach-pxa/include/mach/idp.h +7 -7
@@ -135,24 +135,24 @@/* A listing of interrupts used by external hardware devices */ -#define TOUCH_PANEL_IRQ IRQ_GPIO(5) -#define IDE_IRQ IRQ_GPIO(21) +#define TOUCH_PANEL_IRQ PXA_GPIO_TO_IRQ(5) +#define IDE_IRQ PXA_GPIO_TO_IRQ(21)#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING -#define ETHERNET_IRQ IRQ_GPIO(4) +#define ETHERNET_IRQ PXA_GPIO_TO_IRQ(4)#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING -#define PCMCIA_S0_CD_VALID IRQ_GPIO(7) +#define PCMCIA_S0_CD_VALID PXA_GPIO_TO_IRQ(7)#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH -#define PCMCIA_S1_CD_VALID IRQ_GPIO(8) +#define PCMCIA_S1_CD_VALID PXA_GPIO_TO_IRQ(8)#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH -#define PCMCIA_S0_RDYINT IRQ_GPIO(19) -#define PCMCIA_S1_RDYINT IRQ_GPIO(22) +#define PCMCIA_S0_RDYINT PXA_GPIO_TO_IRQ(19) +#define PCMCIA_S1_RDYINT PXA_GPIO_TO_IRQ(22)/*
arch/arm/mach-pxa/include/mach/irqs.h +1 -1
@@ -91,7 +91,7 @@#define PXA_GPIO_IRQ_NUM (192)#define GPIO_2_x_TO_IRQ (x) (PXA_GPIO_IRQ_BASE + (x)) -#define IRQ_GPIO (x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x)) +#define PXA_GPIO_TO_IRQ (x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))/* * The following interrupts are for board specific purposes. Since
arch/arm/mach-pxa/include/mach/palmld.h +4 -4
@@ -68,10 +68,10 @@/* 20, 53 and 86 are usb related too */ /* INTERRUPTS */ -#define IRQ_GPIO_PALMLD_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMLD_GPIO_RESET) -#define IRQ_GPIO_PALMLD_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMLD_SD_DETECT_N) -#define IRQ_GPIO_PALMLD_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMLD_WM9712_IRQ) -#define IRQ_GPIO_PALMLD_IDE_IRQ IRQ_GPIO(GPIO_NR_PALMLD_IDE_IRQ) +#define IRQ_GPIO_PALMLD_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_GPIO_RESET) +#define IRQ_GPIO_PALMLD_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_SD_DETECT_N) +#define IRQ_GPIO_PALMLD_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_WM9712_IRQ) +#define IRQ_GPIO_PALMLD_IDE_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_IDE_IRQ)/** HERE ARE INIT VALUES **/
arch/arm/mach-pxa/include/mach/palmt5.h +4 -4
@@ -48,10 +48,10 @@#define GPIO_NR_PALMT5_BT_RESET 83/* INTERRUPTS */ -#define IRQ_GPIO_PALMT5_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMT5_SD_DETECT_N) -#define IRQ_GPIO_PALMT5_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMT5_WM9712_IRQ) -#define IRQ_GPIO_PALMT5_USB_DETECT IRQ_GPIO(GPIO_NR_PALMT5_USB_DETECT) -#define IRQ_GPIO_PALMT5_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMT5_GPIO_RESET) +#define IRQ_GPIO_PALMT5_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_SD_DETECT_N) +#define IRQ_GPIO_PALMT5_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_WM9712_IRQ) +#define IRQ_GPIO_PALMT5_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_USB_DETECT) +#define IRQ_GPIO_PALMT5_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_GPIO_RESET)/** HERE ARE INIT VALUES **/
arch/arm/mach-pxa/include/mach/palmtc.h +2 -2
@@ -52,8 +52,8 @@#define GPIO_NR_PALMTC_IR_DISABLE 45/* IRQs */ -#define IRQ_GPIO_PALMTC_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMTC_SD_DETECT_N) -#define IRQ_GPIO_PALMTC_WLAN_READY IRQ_GPIO(GPIO_NR_PALMTC_WLAN_READY) +#define IRQ_GPIO_PALMTC_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_SD_DETECT_N) +#define IRQ_GPIO_PALMTC_WLAN_READY PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_WLAN_READY)/* UCB1400 GPIOs */ #define GPIO_NR_PALMTC_POWER_DETECT (0x80 | 0x00)
arch/arm/mach-pxa/include/mach/palmtx.h +4 -4
@@ -62,10 +62,10 @@#define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79/* INTERRUPTS */ -#define IRQ_GPIO_PALMTX_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMTX_SD_DETECT_N) -#define IRQ_GPIO_PALMTX_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMTX_WM9712_IRQ) -#define IRQ_GPIO_PALMTX_USB_DETECT IRQ_GPIO(GPIO_NR_PALMTX_USB_DETECT) -#define IRQ_GPIO_PALMTX_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMTX_GPIO_RESET) +#define IRQ_GPIO_PALMTX_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_SD_DETECT_N) +#define IRQ_GPIO_PALMTX_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_WM9712_IRQ) +#define IRQ_GPIO_PALMTX_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_USB_DETECT) +#define IRQ_GPIO_PALMTX_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_GPIO_RESET)/** HERE ARE INIT VALUES **/
arch/arm/mach-pxa/include/mach/pcm027.h +4 -4
@@ -34,7 +34,7 @@/* I2C RTC */ #define PCM027_RTC_IRQ_GPIO 0 -#define PCM027_RTC_IRQ IRQ_GPIO(PCM027_RTC_IRQ_GPIO) +#define PCM027_RTC_IRQ PXA_GPIO_TO_IRQ(PCM027_RTC_IRQ_GPIO)#define PCM027_RTC_IRQ_EDGE IRQ_TYPE_EDGE_FALLING#define ADR_PCM027_RTC 0x51/* I2C address */
@@ -43,21 +43,21 @@/* Ethernet chip (SMSC91C111) */ #define PCM027_ETH_IRQ_GPIO 52 -#define PCM027_ETH_IRQ IRQ_GPIO(PCM027_ETH_IRQ_GPIO) +#define PCM027_ETH_IRQ PXA_GPIO_TO_IRQ(PCM027_ETH_IRQ_GPIO)#define PCM027_ETH_IRQ_EDGE IRQ_TYPE_EDGE_RISING#define PCM027_ETH_PHYS PXA_CS5_PHYS#define PCM027_ETH_SIZE (1*1024*1024)/* CAN controller SJA1000 (unsupported yet) */ #define PCM027_CAN_IRQ_GPIO 114 -#define PCM027_CAN_IRQ IRQ_GPIO(PCM027_CAN_IRQ_GPIO) +#define PCM027_CAN_IRQ PXA_GPIO_TO_IRQ(PCM027_CAN_IRQ_GPIO)#define PCM027_CAN_IRQ_EDGE IRQ_TYPE_EDGE_FALLING#define PCM027_CAN_PHYS 0x22000000#define PCM027_CAN_SIZE 0x100/* SPI GPIO expander (unsupported yet) */ #define PCM027_EGPIO_IRQ_GPIO 27 -#define PCM027_EGPIO_IRQ IRQ_GPIO(PCM027_EGPIO_IRQ_GPIO) +#define PCM027_EGPIO_IRQ PXA_GPIO_TO_IRQ(PCM027_EGPIO_IRQ_GPIO)#define PCM027_EGPIO_IRQ_EDGE IRQ_TYPE_EDGE_FALLING#define PCM027_EGPIO_CS 24/*
arch/arm/mach-pxa/include/mach/pcm990_baseboard.h +7 -7
@@ -28,14 +28,14 @@/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */ #define PCM990_CTRL_INT_IRQ_GPIO 9 -#define PCM990_CTRL_INT_IRQ IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO) +#define PCM990_CTRL_INT_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_INT_IRQ_GPIO)#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING#define PCM990_CTRL_PHYS PXA_CS1_PHYS/* 16-Bit */ #define PCM990_CTRL_BASE 0xea000000#define PCM990_CTRL_SIZE (1*1024*1024)#define PCM990_CTRL_PWR_IRQ_GPIO 14 -#define PCM990_CTRL_PWR_IRQ IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO) +#define PCM990_CTRL_PWR_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_PWR_IRQ_GPIO)#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING/* visible CPLD (U7) registers */
@@ -132,7 +132,7 @@* IDE */ #define PCM990_IDE_IRQ_GPIO 13 -#define PCM990_IDE_IRQ IRQ_GPIO(PCM990_IDE_IRQ_GPIO) +#define PCM990_IDE_IRQ PXA_GPIO_TO_IRQ(PCM990_IDE_IRQ_GPIO)#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING#define PCM990_IDE_PLD_PHYS 0x20000000/* 16 bit wide */ #define PCM990_IDE_PLD_BASE 0xee000000
@@ -188,11 +188,11 @@* Compact Flash */ #define PCM990_CF_IRQ_GPIO 11 -#define PCM990_CF_IRQ IRQ_GPIO(PCM990_CF_IRQ_GPIO) +#define PCM990_CF_IRQ PXA_GPIO_TO_IRQ(PCM990_CF_IRQ_GPIO)#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING#define PCM990_CF_CD_GPIO 12 -#define PCM990_CF_CD IRQ_GPIO(PCM990_CF_CD_GPIO) +#define PCM990_CF_CD PXA_GPIO_TO_IRQ(PCM990_CF_CD_GPIO)#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING#define PCM990_CF_PLD_PHYS 0x30000000/* 16 bit wide */
@@ -258,14 +258,14 @@* Wolfson AC97 Touch */ #define PCM990_AC97_IRQ_GPIO 10 -#define PCM990_AC97_IRQ IRQ_GPIO(PCM990_AC97_IRQ_GPIO) +#define PCM990_AC97_IRQ PXA_GPIO_TO_IRQ(PCM990_AC97_IRQ_GPIO)#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING/* * MMC phyCORE */ #define PCM990_MMC0_IRQ_GPIO 9 -#define PCM990_MMC0_IRQ IRQ_GPIO(PCM990_MMC0_IRQ_GPIO) +#define PCM990_MMC0_IRQ PXA_GPIO_TO_IRQ(PCM990_MMC0_IRQ_GPIO)#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING/*
arch/arm/mach-pxa/include/mach/poodle.h +12 -12
@@ -47,18 +47,18 @@#define POODLE_GPIO_DISCHARGE_ON (42)/* Enable battery discharge */ /* PXA GPIOs */ -#define POODLE_IRQ_GPIO_ON_KEY IRQ_GPIO(0) -#define POODLE_IRQ_GPIO_AC_IN IRQ_GPIO(1) -#define POODLE_IRQ_GPIO_HP_IN IRQ_GPIO(4) -#define POODLE_IRQ_GPIO_CO IRQ_GPIO(16) -#define POODLE_IRQ_GPIO_TP_INT IRQ_GPIO(5) -#define POODLE_IRQ_GPIO_WAKEUP IRQ_GPIO(11) -#define POODLE_IRQ_GPIO_GA_INT IRQ_GPIO(10) -#define POODLE_IRQ_GPIO_CF_IRQ IRQ_GPIO(17) -#define POODLE_IRQ_GPIO_CF_CD IRQ_GPIO(14) -#define POODLE_IRQ_GPIO_nSD_INT IRQ_GPIO(8) -#define POODLE_IRQ_GPIO_nSD_DETECT IRQ_GPIO(9) -#define POODLE_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(13) +#define POODLE_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(0) +#define POODLE_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(1) +#define POODLE_IRQ_GPIO_HP_IN PXA_GPIO_TO_IRQ(4) +#define POODLE_IRQ_GPIO_CO PXA_GPIO_TO_IRQ(16) +#define POODLE_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(5) +#define POODLE_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(11) +#define POODLE_IRQ_GPIO_GA_INT PXA_GPIO_TO_IRQ(10) +#define POODLE_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(17) +#define POODLE_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(14) +#define POODLE_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(8) +#define POODLE_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(9) +#define POODLE_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(13)/* SCOOP GPIOs */ #define POODLE_SCOOP_CHARGE_ON SCOOP_GPCR_PA11
arch/arm/mach-pxa/include/mach/spitz.h +17 -17
@@ -164,23 +164,23 @@/* Spitz IRQ Definitions */ -#define SPITZ_IRQ_GPIO_KEY_INT IRQ_GPIO(SPITZ_GPIO_KEY_INT) -#define SPITZ_IRQ_GPIO_AC_IN IRQ_GPIO(SPITZ_GPIO_AC_IN) -#define SPITZ_IRQ_GPIO_AK_INT IRQ_GPIO(SPITZ_GPIO_AK_INT) -#define SPITZ_IRQ_GPIO_HP_IN IRQ_GPIO(SPITZ_GPIO_HP_IN) -#define SPITZ_IRQ_GPIO_TP_INT IRQ_GPIO(SPITZ_GPIO_TP_INT) -#define SPITZ_IRQ_GPIO_SYNC IRQ_GPIO(SPITZ_GPIO_SYNC) -#define SPITZ_IRQ_GPIO_ON_KEY IRQ_GPIO(SPITZ_GPIO_ON_KEY) -#define SPITZ_IRQ_GPIO_SWA IRQ_GPIO(SPITZ_GPIO_SWA) -#define SPITZ_IRQ_GPIO_SWB IRQ_GPIO(SPITZ_GPIO_SWB) -#define SPITZ_IRQ_GPIO_BAT_COVER IRQ_GPIO(SPITZ_GPIO_BAT_COVER) -#define SPITZ_IRQ_GPIO_FATAL_BAT IRQ_GPIO(SPITZ_GPIO_FATAL_BAT) -#define SPITZ_IRQ_GPIO_CO IRQ_GPIO(SPITZ_GPIO_CO) -#define SPITZ_IRQ_GPIO_CF_IRQ IRQ_GPIO(SPITZ_GPIO_CF_IRQ) -#define SPITZ_IRQ_GPIO_CF_CD IRQ_GPIO(SPITZ_GPIO_CF_CD) -#define SPITZ_IRQ_GPIO_CF2_IRQ IRQ_GPIO(SPITZ_GPIO_CF2_IRQ) -#define SPITZ_IRQ_GPIO_nSD_INT IRQ_GPIO(SPITZ_GPIO_nSD_INT) -#define SPITZ_IRQ_GPIO_nSD_DETECT IRQ_GPIO(SPITZ_GPIO_nSD_DETECT) +#define SPITZ_IRQ_GPIO_KEY_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_KEY_INT) +#define SPITZ_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(SPITZ_GPIO_AC_IN) +#define SPITZ_IRQ_GPIO_AK_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_AK_INT) +#define SPITZ_IRQ_GPIO_HP_IN PXA_GPIO_TO_IRQ(SPITZ_GPIO_HP_IN) +#define SPITZ_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_TP_INT) +#define SPITZ_IRQ_GPIO_SYNC PXA_GPIO_TO_IRQ(SPITZ_GPIO_SYNC) +#define SPITZ_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(SPITZ_GPIO_ON_KEY) +#define SPITZ_IRQ_GPIO_SWA PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWA) +#define SPITZ_IRQ_GPIO_SWB PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWB) +#define SPITZ_IRQ_GPIO_BAT_COVER PXA_GPIO_TO_IRQ(SPITZ_GPIO_BAT_COVER) +#define SPITZ_IRQ_GPIO_FATAL_BAT PXA_GPIO_TO_IRQ(SPITZ_GPIO_FATAL_BAT) +#define SPITZ_IRQ_GPIO_CO PXA_GPIO_TO_IRQ(SPITZ_GPIO_CO) +#define SPITZ_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_IRQ) +#define SPITZ_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_CD) +#define SPITZ_IRQ_GPIO_CF2_IRQ PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF2_IRQ) +#define SPITZ_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_INT) +#define SPITZ_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_DETECT)/* * Shared data structures
arch/arm/mach-pxa/include/mach/tosa.h +24 -24
54 lines not on this page · raw message
arch/arm/mach-pxa/include/mach/trizeps4.h +8 -8
@@ -43,30 +43,30 @@/* Ethernet Controller Davicom DM9000 */ #define GPIO_DM9000 101 -#define TRIZEPS4_ETH_IRQ IRQ_GPIO(GPIO_DM9000) +#define TRIZEPS4_ETH_IRQ PXA_GPIO_TO_IRQ(GPIO_DM9000)/* UCB1400 audio / TS-controller */ #define GPIO_UCB1400 1 -#define TRIZEPS4_UCB1400_IRQ IRQ_GPIO(GPIO_UCB1400) +#define TRIZEPS4_UCB1400_IRQ PXA_GPIO_TO_IRQ(GPIO_UCB1400)/* PCMCIA socket Compact Flash */ #define GPIO_PCD 11/* PCMCIA Card Detect */ -#define TRIZEPS4_CD_IRQ IRQ_GPIO(GPIO_PCD) +#define TRIZEPS4_CD_IRQ PXA_GPIO_TO_IRQ(GPIO_PCD)#define GPIO_PRDY 13/* READY / nINT */ -#define TRIZEPS4_READY_NINT IRQ_GPIO(GPIO_PRDY) +#define TRIZEPS4_READY_NINT PXA_GPIO_TO_IRQ(GPIO_PRDY)/* MMC socket */ #define GPIO_MMC_DET 12 -#define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET) +#define TRIZEPS4_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO_MMC_DET)/* DOC NAND chip */ #define GPIO_DOC_LOCK 94#define GPIO_DOC_IRQ 93 -#define TRIZEPS4_DOC_IRQ IRQ_GPIO(GPIO_DOC_IRQ) +#define TRIZEPS4_DOC_IRQ PXA_GPIO_TO_IRQ(GPIO_DOC_IRQ)/* SPI interface */ #define GPIO_SPI 53 -#define TRIZEPS4_SPI_IRQ IRQ_GPIO(GPIO_SPI) +#define TRIZEPS4_SPI_IRQ PXA_GPIO_TO_IRQ(GPIO_SPI)/* LEDS using tx2 / rx2 */ #define GPIO_SYS_BUSY_LED 46
@@ -74,7 +74,7 @@/* Off-module PIC on ConXS board */ #define GPIO_PIC 0 -#define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC) +#define TRIZEPS4_PIC_IRQ PXA_GPIO_TO_IRQ(GPIO_PIC)#ifdef CONFIG_MACH_TRIZEPS_CONXS /* for CONXS base board define these registers */
arch/arm/mach-pxa/littleton.c +2 -2
@@ -124,8 +124,8 @@ static struct resource smc91x_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)), - .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)), + .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)), + .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)), .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, } };
arch/arm/mach-pxa/lpd270.c +2 -2
@@ -152,8 +152,8 @@ static void __init lpd270_init_irq(void) handle_level_irq);set_irq_flags (irq,IRQF_VALID |IRQF_PROBE ); } -irq_set_chained_handler (IRQ_GPIO (0 ), lpd270_irq_handler); -irq_set_irq_type (IRQ_GPIO (0 ),IRQ_TYPE_EDGE_FALLING ); +irq_set_chained_handler (PXA_GPIO_TO_IRQ (0 ), lpd270_irq_handler); +irq_set_irq_type (PXA_GPIO_TO_IRQ (0 ),IRQ_TYPE_EDGE_FALLING ); }
arch/arm/mach-pxa/lubbock.c +2 -2
@@ -170,8 +170,8 @@ static void __init lubbock_init_irq(void)set_irq_flags (irq,IRQF_VALID |IRQF_PROBE ); } -irq_set_chained_handler (IRQ_GPIO (0 ), lubbock_irq_handler); -irq_set_irq_type (IRQ_GPIO (0 ),IRQ_TYPE_EDGE_FALLING ); +irq_set_chained_handler (PXA_GPIO_TO_IRQ (0 ), lubbock_irq_handler); +irq_set_irq_type (PXA_GPIO_TO_IRQ (0 ),IRQ_TYPE_EDGE_FALLING ); }#ifdef CONFIG_PM
arch/arm/mach-pxa/mainstone.c +2 -2
@@ -178,8 +178,8 @@ static void __init mainstone_init_irq(void)MST_INTMSKENA =0 ;MST_INTSETCLR =0 ; -irq_set_chained_handler (IRQ_GPIO (0 ), mainstone_irq_handler); -irq_set_irq_type (IRQ_GPIO (0 ),IRQ_TYPE_EDGE_FALLING ); +irq_set_chained_handler (PXA_GPIO_TO_IRQ (0 ), mainstone_irq_handler); +irq_set_irq_type (PXA_GPIO_TO_IRQ (0 ),IRQ_TYPE_EDGE_FALLING ); }#ifdef CONFIG_PM
arch/arm/mach-pxa/poodle.c +2 -2
@@ -166,8 +166,8 @@ static struct resource locomo_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_GPIO(10), - .end = IRQ_GPIO(10), + .start = PXA_GPIO_TO_IRQ(10), + .end = PXA_GPIO_TO_IRQ(10), .flags = IORESOURCE_IRQ, }, };
arch/arm/mach-pxa/sharpsl_pm.c +12 -12
@@ -907,24 +907,24 @@ static int __devinit sharpsl_pm_probe(struct platform_device *pdev)gpio_direction_input (sharpsl_pm.machinfo->gpio_batlock);/* Register interrupt handlers */ -if (request_irq (IRQ_GPIO (sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr,IRQF_DISABLED |IRQF_TRIGGER_RISING |IRQF_TRIGGER_FALLING ,"AC Input Detect" , sharpsl_ac_isr)) { -dev_err (sharpsl_pm.dev,"Could not get irq %d.\n" ,IRQ_GPIO (sharpsl_pm.machinfo->gpio_acin)); +if (request_irq (PXA_GPIO_TO_IRQ (sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr,IRQF_DISABLED |IRQF_TRIGGER_RISING |IRQF_TRIGGER_FALLING ,"AC Input Detect" , sharpsl_ac_isr)) { +dev_err (sharpsl_pm.dev,"Could not get irq %d.\n" ,PXA_GPIO_TO_IRQ (sharpsl_pm.machinfo->gpio_acin)); } -if (request_irq (IRQ_GPIO (sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr,IRQF_DISABLED |IRQF_TRIGGER_FALLING ,"Battery Cover" , sharpsl_fatal_isr)) { -dev_err (sharpsl_pm.dev,"Could not get irq %d.\n" ,IRQ_GPIO (sharpsl_pm.machinfo->gpio_batlock)); +if (request_irq (PXA_GPIO_TO_IRQ (sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr,IRQF_DISABLED |IRQF_TRIGGER_FALLING ,"Battery Cover" , sharpsl_fatal_isr)) { +dev_err (sharpsl_pm.dev,"Could not get irq %d.\n" ,PXA_GPIO_TO_IRQ (sharpsl_pm.machinfo->gpio_batlock)); }if (sharpsl_pm.machinfo->gpio_fatal) { -if (request_irq (IRQ_GPIO (sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr,IRQF_DISABLED |IRQF_TRIGGER_FALLING ,"Fatal Battery" , sharpsl_fatal_isr)) { -dev_err (sharpsl_pm.dev,"Could not get irq %d.\n" ,IRQ_GPIO (sharpsl_pm.machinfo->gpio_fatal)); +if (request_irq (PXA_GPIO_TO_IRQ (sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr,IRQF_DISABLED |IRQF_TRIGGER_FALLING ,"Fatal Battery" , sharpsl_fatal_isr)) { +dev_err (sharpsl_pm.dev,"Could not get irq %d.\n" ,PXA_GPIO_TO_IRQ (sharpsl_pm.machinfo->gpio_fatal)); } }if (sharpsl_pm.machinfo->batfull_irq) {/* Register interrupt handler. */ -if (request_irq (IRQ_GPIO (sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr,IRQF_DISABLED |IRQF_TRIGGER_RISING ,"CO" , sharpsl_chrg_full_isr)) { -dev_err (sharpsl_pm.dev,"Could not get irq %d.\n" ,IRQ_GPIO (sharpsl_pm.machinfo->gpio_batfull)); +if (request_irq (PXA_GPIO_TO_IRQ (sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr,IRQF_DISABLED |IRQF_TRIGGER_RISING ,"CO" , sharpsl_chrg_full_isr)) { +dev_err (sharpsl_pm.dev,"Could not get irq %d.\n" ,PXA_GPIO_TO_IRQ (sharpsl_pm.machinfo->gpio_batfull)); } }
@@ -953,14 +953,14 @@ static int sharpsl_pm_remove(struct platform_device *pdev)led_trigger_unregister_simple (sharpsl_charge_led_trigger); -free_irq (IRQ_GPIO (sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr); -free_irq (IRQ_GPIO (sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr); +free_irq (PXA_GPIO_TO_IRQ (sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr); +free_irq (PXA_GPIO_TO_IRQ (sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr);if (sharpsl_pm.machinfo->gpio_fatal) -free_irq (IRQ_GPIO (sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr); +free_irq (PXA_GPIO_TO_IRQ (sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr);if (sharpsl_pm.machinfo->batfull_irq) -free_irq (IRQ_GPIO (sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr); +free_irq (PXA_GPIO_TO_IRQ (sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr);gpio_free (sharpsl_pm.machinfo->gpio_batlock);gpio_free (sharpsl_pm.machinfo->gpio_batfull);
arch/arm/mach-pxa/stargate2.c +11 -11
@@ -376,7 +376,7 @@ static struct spi_board_info spi_board_info[] __initdata = { .bus_num = 1, .chip_select = 0, .controller_data = &staccel_chip_info, - .irq = IRQ_GPIO(96), + .irq = PXA_GPIO_TO_IRQ(96), }, { .modalias = "cc2420", .max_speed_hz = 6500000,
@@ -560,18 +560,18 @@ static struct i2c_board_info __initdata imote2_i2c_board_info[] = {/* Through a nand gate - Also beware, on V2 sensor board the * pull up resistors are missing. */ - .irq = IRQ_GPIO(99), + .irq = PXA_GPIO_TO_IRQ(99), }, { /* ITS400 Sensor board only */ .type = "tsl2561", .addr = 0x49, /* Through a nand gate - Also beware, on V2 sensor board the * pull up resistors are missing. */ - .irq = IRQ_GPIO(99), + .irq = PXA_GPIO_TO_IRQ(99), }, { /* ITS400 Sensor board only */ .type = "tmp175", .addr = 0x4A, - .irq = IRQ_GPIO(96), + .irq = PXA_GPIO_TO_IRQ(96), }, { /* IMB400 Multimedia board */ .type = "wm8940", .addr = 0x1A,
@@ -661,8 +661,8 @@ static struct resource smc91x_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_GPIO(40), - .end = IRQ_GPIO(40), + .start = PXA_GPIO_TO_IRQ(40), + .end = PXA_GPIO_TO_IRQ(40), .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, } };
@@ -707,7 +707,7 @@ static int stargate2_mci_init(struct device *dev, }gpio_direction_input (SG2_GPIO_nSD_DETECT); - err = request_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT), + err = request_irq(PXA_GPIO_TO_IRQ(SG2_GPIO_nSD_DETECT), stargate2_detect_int, IRQ_TYPE_EDGE_BOTH, "MMC card detect",
@@ -738,7 +738,7 @@ static void stargate2_mci_setpower(struct device *dev, unsigned int vdd)static void stargate2_mci_exit (struct device *dev,void *data) { -free_irq (IRQ_GPIO (SG2_GPIO_nSD_DETECT), data); +free_irq (PXA_GPIO_TO_IRQ (SG2_GPIO_nSD_DETECT), data);gpio_free (SG2_SD_POWER_ENABLE );gpio_free (SG2_GPIO_nSD_DETECT); }
@@ -938,18 +938,18 @@ static struct i2c_board_info __initdata stargate2_i2c_board_info[] = {/* Through a nand gate - Also beware, on V2 sensor board the * pull up resistors are missing. */ - .irq = IRQ_GPIO(99), + .irq = PXA_GPIO_TO_IRQ(99), }, { /* ITS400 Sensor board only */ .type = "tsl2561", .addr = 0x49, /* Through a nand gate - Also beware, on V2 sensor board the * pull up resistors are missing. */ - .irq = IRQ_GPIO(99), + .irq = PXA_GPIO_TO_IRQ(99), }, { /* ITS400 Sensor board only */ .type = "tmp175", .addr = 0x4A, - .irq = IRQ_GPIO(96), + .irq = PXA_GPIO_TO_IRQ(96), }, };
arch/arm/mach-pxa/vpac270.c +3 -3
@@ -395,8 +395,8 @@ static struct resource vpac270_dm9000_resources[] = { .flags = IORESOURCE_MEM, }, [2] = { - .start = IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ), - .end = IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ), + .start = PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ), + .end = PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ), .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, }, };
@@ -433,7 +433,7 @@ static pxa2xx_audio_ops_t vpac270_ac97_pdata = { };static struct ucb1400_pdata vpac270_ucb1400_pdata = { - .irq =IRQ_GPIO (GPIO113_VPAC270_TS_IRQ ), + .irq =PXA_GPIO_TO_IRQ (GPIO113_VPAC270_TS_IRQ ), };static struct platform_device vpac270_ucb1400_device = {
arch/arm/mach-pxa/zylonite_pxa300.c +2 -2
@@ -231,12 +231,12 @@ static struct i2c_board_info zylonite_i2c_board_info[] = { .type = "pca9539", .addr = 0x74, .platform_data = &gpio_exp[0], - .irq = IRQ_GPIO(18), + .irq = PXA_GPIO_TO_IRQ(18), }, { .type = "pca9539", .addr = 0x75, .platform_data = &gpio_exp[1], - .irq = IRQ_GPIO(19), + .irq = PXA_GPIO_TO_IRQ(19), }, };
Signature · 1 line
1.7.4.1
PATCH v7 3/11 ARM: pxa: use chained interrupt for GPIO0 and GPIO1
In reply to Haojian ZhuangGPIO0 and GPIO1 are linked to unique interrupt line in PXA series, others are linked to another interrupt line. All GPIO are linked to one interrupt line in MMP series.
Since gpio driver is shared between PXA series and MMP series, define GPIO0 and GPIO1 as chained interrupt chip. So we can move out gpio code from irq.c to gpio-pxa.c.
--- arch/arm/mach-pxa/include/mach/gpio.h | 15 +-------- arch/arm/mach-pxa/include/mach/irqs.h | 4 +-- arch/arm/mach-pxa/irq.c | 58 --------------------------------- drivers/gpio/gpio-pxa.c | 14 ++++++++ 4 files changed, 16 insertions(+), 75 deletions(-)
arch/arm/mach-pxa/include/mach/gpio.h +1 -14
@@ -29,20 +29,7 @@#include "gpio-pxa.h" #define gpio_to_irq (gpio) PXA_GPIO_TO_IRQ(gpio) - -static inline int irq_to_gpio (unsigned int irq) -{ -int gpio; - -if (irq ==IRQ_GPIO0 || irq ==IRQ_GPIO1 ) -return irq -IRQ_GPIO0 ; - - gpio = irq -PXA_GPIO_IRQ_BASE ; -if (gpio >=2 && gpio <NR_BUILTIN_GPIO ) -return gpio; - -return -1 ; -} +#define irq_to_gpio (irq) (irq - PXA_GPIO_TO_IRQ(0))#include <plat/gpio.h> #endif
arch/arm/mach-pxa/include/mach/irqs.h +1 -3
@@ -89,9 +89,7 @@#define PXA_GPIO_IRQ_BASE PXA_IRQ(96)#define PXA_GPIO_IRQ_NUM (192) - -#define GPIO_2_x_TO_IRQ (x) (PXA_GPIO_IRQ_BASE + (x)) -#define PXA_GPIO_TO_IRQ (x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x)) +#define PXA_GPIO_TO_IRQ (x) (PXA_GPIO_IRQ_BASE + (x))/* * The following interrupts are for board specific purposes. Since
arch/arm/mach-pxa/irq.c +0 -58
76 lines not on this page · raw message
drivers/gpio/gpio-pxa.c +14 -0
@@ -283,6 +283,20 @@ void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)__raw_writel (~0 ,c->regbase +GEDR_OFFSET ); } +#ifdef CONFIG_ARCH_PXA + irq =gpio_to_irq (0 ); +irq_set_chip_and_handler (irq, &pxa_muxed_gpio_chip, + handle_edge_irq); +set_irq_flags (irq,IRQF_VALID |IRQF_PROBE ); +irq_set_chained_handler (IRQ_GPIO0 , pxa_gpio_demux_handler); + + irq =gpio_to_irq (1 ); +irq_set_chip_and_handler (irq, &pxa_muxed_gpio_chip, + handle_edge_irq); +set_irq_flags (irq,IRQF_VALID |IRQF_PROBE ); +irq_set_chained_handler (IRQ_GPIO1 , pxa_gpio_demux_handler); +#endif +for (irq =gpio_to_irq (start); irq <=gpio_to_irq (end); irq++) {irq_set_chip_and_handler (irq, &pxa_muxed_gpio_chip, handle_edge_irq);
Signature · 1 line
1.7.4.1
PATCH v7 4/11 ARM: pxa: rename gpio_to_irq and irq_to_gpio
In reply to Haojian ZhuangAvoid to define gpio_to_irq() and irq_to_gpio() for potential name confliction since multiple architecture will be built together.
--- arch/arm/mach-mmp/aspenite.c | 4 +- arch/arm/mach-mmp/flint.c | 4 +- arch/arm/mach-mmp/include/mach/gpio-pxa.h | 1 + arch/arm/mach-mmp/include/mach/gpio.h | 3 - arch/arm/mach-mmp/include/mach/irqs.h | 1 + arch/arm/mach-mmp/tavorevb.c | 4 +- arch/arm/mach-mmp/teton_bga.c | 2 +- arch/arm/mach-pxa/capc7117.c | 12 ++-- arch/arm/mach-pxa/cm-x270.c | 2 +- arch/arm/mach-pxa/cm-x2xx-pci.c | 4 +- arch/arm/mach-pxa/colibri-pxa270.c | 6 +- arch/arm/mach-pxa/colibri-pxa300.c | 4 +- arch/arm/mach-pxa/colibri-pxa320.c | 4 +- arch/arm/mach-pxa/corgi.c | 2 +- arch/arm/mach-pxa/em-x270.c | 6 +- arch/arm/mach-pxa/hx4700.c | 18 +++--- arch/arm/mach-pxa/icontrol.c | 8 +- arch/arm/mach-pxa/include/mach/csb726.h | 4 +- arch/arm/mach-pxa/include/mach/gpio.h | 3 - arch/arm/mach-pxa/littleton.c | 2 +- arch/arm/mach-pxa/magician.c | 8 +- arch/arm/mach-pxa/mioa701.c | 12 ++-- arch/arm/mach-pxa/mxm8x10.c | 4 +- arch/arm/mach-pxa/poodle.c | 2 +- arch/arm/mach-pxa/pxa25x.c | 2 +- arch/arm/mach-pxa/pxa27x.c | 2 +- arch/arm/mach-pxa/raumfeld.c | 14 ++-- arch/arm/mach-pxa/saar.c | 6 +- arch/arm/mach-pxa/saarb.c | 2 +- arch/arm/mach-pxa/spitz.c | 2 +- arch/arm/mach-pxa/stargate2.c | 4 +- arch/arm/mach-pxa/tavorevb.c | 4 +- arch/arm/mach-pxa/tavorevb3.c | 2 +- arch/arm/mach-pxa/tosa.c | 4 +- arch/arm/mach-pxa/viper.c | 16 +++--- arch/arm/mach-pxa/vpac270.c | 4 +- arch/arm/mach-pxa/z2.c | 2 +- arch/arm/mach-pxa/zeus.c | 34 ++++++------ arch/arm/mach-pxa/zylonite.c | 4 +- arch/arm/plat-pxa/include/plat/gpio-pxa.h | 1 + drivers/gpio/gpio-pxa.c | 89 +++++++++++++++++++++++++++- 41 files changed, 195 insertions(+), 117 deletions(-)
arch/arm/mach-mmp/aspenite.c +2 -2
@@ -120,8 +120,8 @@ static struct resource smc91x_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = gpio_to_irq(27), - .end = gpio_to_irq(27), + .start = MMP_GPIO_TO_IRQ(27), + .end = MMP_GPIO_TO_IRQ(27), .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, } };
arch/arm/mach-mmp/flint.c +2 -2
@@ -87,8 +87,8 @@ static struct resource smc91x_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = gpio_to_irq(155), - .end = gpio_to_irq(155), + .start = MMP_GPIO_TO_IRQ(155), + .end = MMP_GPIO_TO_IRQ(155), .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, } };
arch/arm/mach-mmp/include/mach/gpio-pxa.h +1 -0
@@ -2,6 +2,7 @@#define __ASM_MACH_GPIO_PXA_H#include <mach/addr-map.h> +#include <mach/cputype.h> #include <mach/irqs.h> #define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000)
arch/arm/mach-mmp/include/mach/gpio.h +0 -3
@@ -3,9 +3,6 @@#include <asm-generic/gpio.h> -#define gpio_to_irq (gpio) (IRQ_GPIO_START + (gpio)) -#define irq_to_gpio (irq) ((irq) - IRQ_GPIO_START) -#define __gpio_is_inverted (gpio) (0)#define __gpio_is_occupied (gpio) (0)
arch/arm/mach-mmp/include/mach/irqs.h +1 -0
@@ -221,6 +221,7 @@#define IRQ_GPIO_START 128#define IRQ_GPIO_NUM 192#define IRQ_GPIO (x) (IRQ_GPIO_START + (x)) +#define MMP_GPIO_TO_IRQ (gpio) (IRQ_GPIO_START + (gpio))#define IRQ_BOARD_START (IRQ_GPIO_START + IRQ_GPIO_NUM)
arch/arm/mach-mmp/tavorevb.c +2 -2
@@ -71,8 +71,8 @@ static struct resource smc91x_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = gpio_to_irq(80), - .end = gpio_to_irq(80), + .start = MMP_GPIO_TO_IRQ(80), + .end = MMP_GPIO_TO_IRQ(80), .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, } };
arch/arm/mach-mmp/teton_bga.c +1 -1
@@ -66,7 +66,7 @@ static struct pxa27x_keypad_platform_data teton_bga_keypad_info __initdata = {static struct i2c_board_info teton_bga_i2c_info[]__initdata = { {I2C_BOARD_INFO ("ds1337" ,0x68 ), - .irq =gpio_to_irq (RTC_INT_GPIO ) + .irq =MMP_GPIO_TO_IRQ (RTC_INT_GPIO ) }, };
arch/arm/mach-pxa/capc7117.c +6 -6
@@ -50,8 +50,8 @@ static struct resource capc7117_ide_resources[] = { .flags = IORESOURCE_MEM }, [2] = { - .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)), - .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)), + .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)), + .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)), .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING } };
@@ -80,7 +80,7 @@ static void __init capc7117_ide_init(void)static struct plat_serial8250_port ti16c752_platform_data[] = { [0 ] = { .mapbase =0x14000000 , - .irq =gpio_to_irq (mfp_to_gpio (MFP_PIN_GPIO78 )), + .irq =PXA_GPIO_TO_IRQ (mfp_to_gpio (MFP_PIN_GPIO78 )), .irqflags =IRQF_TRIGGER_RISING , .flags =TI16C752_FLAGS , .iotype =UPIO_MEM ,
@@ -89,7 +89,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = { }, [1] = { .mapbase = 0x14000040, - .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO79)), + .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO79)), .irqflags = IRQF_TRIGGER_RISING, .flags = TI16C752_FLAGS, .iotype = UPIO_MEM,
@@ -98,7 +98,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = { }, [2] = { .mapbase = 0x14000080, - .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO80)), + .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO80)), .irqflags = IRQF_TRIGGER_RISING, .flags = TI16C752_FLAGS, .iotype = UPIO_MEM,
@@ -107,7 +107,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = { }, [3] = { .mapbase = 0x140000c0, - .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO81)), + .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO81)), .irqflags = IRQF_TRIGGER_RISING, .flags = TI16C752_FLAGS, .iotype = UPIO_MEM,
arch/arm/mach-pxa/cm-x270.c +1 -1
@@ -380,7 +380,7 @@ static struct spi_board_info cm_x270_spi_devices[] __initdata = { .modalias = "libertas_spi", .max_speed_hz = 13000000, .bus_num = 2, - .irq = gpio_to_irq(95), + .irq = PXA_GPIO_TO_IRQ(95), .chip_select = 0, .controller_data = &cm_x270_libertas_chip, .platform_data = &cm_x270_libertas_pdata,
arch/arm/mach-pxa/cm-x2xx-pci.c +2 -2
@@ -43,9 +43,9 @@ void __cmx2xx_pci_init_irq(int irq_gpio) cmx2xx_it8152_irq_gpio = irq_gpio; -irq_set_irq_type (gpio_to_irq (irq_gpio),IRQ_TYPE_EDGE_RISING ); +irq_set_irq_type (PXA_GPIO_TO_IRQ (irq_gpio),IRQ_TYPE_EDGE_RISING ); -irq_set_chained_handler (gpio_to_irq (irq_gpio), +irq_set_chained_handler (PXA_GPIO_TO_IRQ (irq_gpio), cmx2xx_it8152_irq_demux); }
arch/arm/mach-pxa/colibri-pxa270.c +3 -3
@@ -218,8 +218,8 @@ static struct resource colibri_pxa270_dm9000_resources[] = { .flags = IORESOURCE_MEM, }, { - .start = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ), - .end = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ), + .start = PXA_GPIO_TO_IRQ(GPIO114_COLIBRI_PXA270_ETH_IRQ), + .end = PXA_GPIO_TO_IRQ(GPIO114_COLIBRI_PXA270_ETH_IRQ), .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING, }, };
@@ -249,7 +249,7 @@ static pxa2xx_audio_ops_t colibri_pxa270_ac97_pdata = { };static struct ucb1400_pdata colibri_pxa270_ucb1400_pdata = { - .irq =gpio_to_irq (GPIO113_COLIBRI_PXA270_TS_IRQ ), + .irq =PXA_GPIO_TO_IRQ (GPIO113_COLIBRI_PXA270_TS_IRQ ), };static struct platform_device colibri_pxa270_ucb1400_device = {
arch/arm/mach-pxa/colibri-pxa300.c +2 -2
@@ -78,8 +78,8 @@ static struct resource colibri_asix_resource[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), - .end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), + .start = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO), + .end = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO), .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, } };
arch/arm/mach-pxa/colibri-pxa320.c +2 -2
@@ -115,8 +115,8 @@ static struct resource colibri_asix_resource[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), - .end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), + .start = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO), + .end = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO), .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, } };
arch/arm/mach-pxa/corgi.c +1 -1
@@ -531,7 +531,7 @@ static struct spi_board_info corgi_spi_devices[] = { .chip_select = 0, .platform_data = &corgi_ads7846_info, .controller_data= &corgi_ads7846_chip, - .irq = gpio_to_irq(CORGI_GPIO_TP_INT), + .irq = PXA_GPIO_TO_IRQ(CORGI_GPIO_TP_INT), }, { .modalias = "corgi-lcd", .max_speed_hz = 50000,
arch/arm/mach-pxa/em-x270.c +3 -3
@@ -558,7 +558,7 @@ static int em_x270_mci_init(struct device *dev,return PTR_ERR (em_x270_sdio_ldo); } - err =request_irq (gpio_to_irq (mmc_cd), em_x270_detect_int, + err =request_irq (PXA_GPIO_TO_IRQ (mmc_cd), em_x270_detect_int,IRQF_DISABLED |IRQF_TRIGGER_RISING |IRQF_TRIGGER_FALLING ,"MMC card detect" , data);
@@ -588,7 +588,7 @@ static int em_x270_mci_init(struct device *dev,return 0 ; err_gpio_wp: -free_irq (gpio_to_irq (mmc_cd), data); +free_irq (PXA_GPIO_TO_IRQ (mmc_cd), data); err_irq:regulator_put (em_x270_sdio_ldo);
@@ -611,7 +611,7 @@ static void em_x270_mci_setpower(struct device *dev, unsigned int vdd)static void em_x270_mci_exit (struct device *dev,void *data) { -free_irq (gpio_to_irq (mmc_cd), data); +free_irq (PXA_GPIO_TO_IRQ (mmc_cd), data);regulator_put (em_x270_sdio_ldo);if (machine_is_em_x270 ())
arch/arm/mach-pxa/hx4700.c +9 -9
@@ -252,8 +252,8 @@ static struct resource asic3_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ), - .end = gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ), + .start = PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ), + .end = PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ), .flags = IORESOURCE_IRQ, },/* SD part */
@@ -263,8 +263,8 @@ static struct resource asic3_resources[] = { .flags = IORESOURCE_MEM, }, [3] = { - .start = gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ), - .end = gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ), + .start = PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ), + .end = PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ), .flags = IORESOURCE_IRQ, }, };
@@ -587,7 +587,7 @@ static struct spi_board_info tsc2046_board_info[] __initdata = { .modalias = "ads7846", .bus_num = 2, .max_speed_hz = 2600000, /* 100 kHz sample rate */ - .irq = gpio_to_irq(GPIO58_HX4700_TSC2046_nPENIRQ), + .irq = PXA_GPIO_TO_IRQ(GPIO58_HX4700_TSC2046_nPENIRQ), .platform_data = &tsc2046_info, .controller_data = &tsc2046_chip, },
@@ -635,15 +635,15 @@ static struct resource power_supply_resources[] = { .name = "ac", .flags =IORESOURCE_IRQ |IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE, - .start = gpio_to_irq(GPIOD9_nAC_IN), - .end = gpio_to_irq(GPIOD9_nAC_IN), + .start = PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN), + .end = PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN), }, [1] = { .name = "usb", .flags =IORESOURCE_IRQ |IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE, - .start = gpio_to_irq(GPIOD14_nUSBC_DETECT), - .end = gpio_to_irq(GPIOD14_nUSBC_DETECT), + .start = PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT), + .end = PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT), }, };
arch/arm/mach-pxa/icontrol.c +4 -4
@@ -86,7 +86,7 @@ static struct spi_board_info mcp251x_board_info[] = { .chip_select = 0, .platform_data = &mcp251x_info, .controller_data = &mcp251x_chip_info1, - .irq =gpio_to_irq (ICONTROL_MCP251x_nIRQ1) + .irq =PXA_GPIO_TO_IRQ (ICONTROL_MCP251x_nIRQ1) }, { .modalias = "mcp2515",
@@ -95,7 +95,7 @@ static struct spi_board_info mcp251x_board_info[] = { .chip_select = 1, .platform_data = &mcp251x_info, .controller_data = &mcp251x_chip_info2, - .irq =gpio_to_irq (ICONTROL_MCP251x_nIRQ2) + .irq =PXA_GPIO_TO_IRQ (ICONTROL_MCP251x_nIRQ2) }, { .modalias = "mcp2515",
@@ -104,7 +104,7 @@ static struct spi_board_info mcp251x_board_info[] = { .chip_select = 0, .platform_data = &mcp251x_info, .controller_data = &mcp251x_chip_info3, - .irq =gpio_to_irq (ICONTROL_MCP251x_nIRQ3) + .irq =PXA_GPIO_TO_IRQ (ICONTROL_MCP251x_nIRQ3) }, { .modalias = "mcp2515",
@@ -113,7 +113,7 @@ static struct spi_board_info mcp251x_board_info[] = { .chip_select = 1, .platform_data = &mcp251x_info, .controller_data = &mcp251x_chip_info4, - .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ4) + .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ4) } };
arch/arm/mach-pxa/include/mach/csb726.h +2 -2
@@ -19,8 +19,8 @@#define CSB726_FLASH_SIZE (64 * 1024 * 1024)#define CSB726_FLASH_uMON (8 * 1024 * 1024) -#define CSB726_IRQ_LAN gpio_to_irq(CSB726_GPIO_IRQ_LAN) -#define CSB726_IRQ_SM501 gpio_to_irq(CSB726_GPIO_IRQ_SM501) +#define CSB726_IRQ_LAN PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_LAN) +#define CSB726_IRQ_SM501 PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_SM501)#endif
arch/arm/mach-pxa/include/mach/gpio.h +0 -3
@@ -28,8 +28,5 @@/* The defines for the driver are needed for the accelerated accessors */ #include "gpio-pxa.h" -#define gpio_to_irq (gpio) PXA_GPIO_TO_IRQ(gpio) -#define irq_to_gpio (irq) (irq - PXA_GPIO_TO_IRQ(0)) -#include <plat/gpio.h> #endif
arch/arm/mach-pxa/littleton.c +1 -1
@@ -395,7 +395,7 @@ static struct i2c_board_info littleton_i2c_info[] = { .type = "da9034", .addr = 0x34, .platform_data = &littleton_da9034_info, - .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO18)), + .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO18)), }, [1] = { .type = "max7320",
arch/arm/mach-pxa/magician.c +4 -4
@@ -184,8 +184,8 @@ static struct resource egpio_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = gpio_to_irq(GPIO13_MAGICIAN_CPLD_IRQ), - .end = gpio_to_irq(GPIO13_MAGICIAN_CPLD_IRQ), + .start = PXA_GPIO_TO_IRQ(GPIO13_MAGICIAN_CPLD_IRQ), + .end = PXA_GPIO_TO_IRQ(GPIO13_MAGICIAN_CPLD_IRQ), .flags = IORESOURCE_IRQ, }, };
@@ -468,8 +468,8 @@ static struct resource pasic3_resources[] = { },/* No IRQ handler in the PASIC3, DS1WM needs an external IRQ */ [1 ] = { - .start =gpio_to_irq (GPIO107_MAGICIAN_DS1WM_IRQ ), - .end =gpio_to_irq (GPIO107_MAGICIAN_DS1WM_IRQ ), + .start =PXA_GPIO_TO_IRQ (GPIO107_MAGICIAN_DS1WM_IRQ ), + .end =PXA_GPIO_TO_IRQ (GPIO107_MAGICIAN_DS1WM_IRQ ), .flags =IORESOURCE_IRQ |IORESOURCE_IRQ_HIGHEDGE , } };
arch/arm/mach-pxa/mioa701.c +6 -6
@@ -314,7 +314,7 @@ static int __init gsm_init(void) rc =gpio_request_array (ARRAY_AND_SIZE (gsm_gpios));if (rc) goto err_gpio; - rc =request_irq (gpio_to_irq (GPIO25_GSM_MOD_ON_STATE ), gsm_on_irq, + rc =request_irq (PXA_GPIO_TO_IRQ (GPIO25_GSM_MOD_ON_STATE ), gsm_on_irq,IRQF_TRIGGER_RISING |IRQF_TRIGGER_FALLING ,"GSM XS200 Power Irq" ,NULL );if (rc)
@@ -333,7 +333,7 @@ err_gpio:static void gsm_exit (void ) { -free_irq (gpio_to_irq (GPIO25_GSM_MOD_ON_STATE ),NULL ); +free_irq (PXA_GPIO_TO_IRQ (GPIO25_GSM_MOD_ON_STATE ),NULL );gpio_free_array (ARRAY_AND_SIZE (gsm_gpios)); }
@@ -541,15 +541,15 @@ static struct pda_power_pdata power_pdata = {static struct resource power_resources[] = { [0 ] = { .name ="ac" , - .start =gpio_to_irq (GPIO96_AC_DETECT ), - .end =gpio_to_irq (GPIO96_AC_DETECT ), + .start =PXA_GPIO_TO_IRQ (GPIO96_AC_DETECT ), + .end =PXA_GPIO_TO_IRQ (GPIO96_AC_DETECT ), .flags =IORESOURCE_IRQ |IORESOURCE_IRQ_HIGHEDGE |IORESOURCE_IRQ_LOWEDGE , }, [1 ] = { .name ="usb" , - .start =gpio_to_irq (GPIO13_nUSB_DETECT), - .end =gpio_to_irq (GPIO13_nUSB_DETECT), + .start =PXA_GPIO_TO_IRQ (GPIO13_nUSB_DETECT), + .end =PXA_GPIO_TO_IRQ (GPIO13_nUSB_DETECT), .flags =IORESOURCE_IRQ |IORESOURCE_IRQ_HIGHEDGE |IORESOURCE_IRQ_LOWEDGE , },
arch/arm/mach-pxa/mxm8x10.c +2 -2
@@ -416,8 +416,8 @@ static struct resource dm9k_resources[] = { .flags = IORESOURCE_MEM }, [2] = { - .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)), - .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)), + .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)), + .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)), .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE } };
arch/arm/mach-pxa/poodle.c +1 -1
@@ -212,7 +212,7 @@ static struct spi_board_info poodle_spi_devices[] = { .bus_num = 1, .platform_data = &poodle_ads7846_info, .controller_data= &poodle_ads7846_chip, - .irq = gpio_to_irq(POODLE_GPIO_TP_INT), + .irq = PXA_GPIO_TO_IRQ(POODLE_GPIO_TP_INT), }, };
arch/arm/mach-pxa/pxa25x.c +1 -1
@@ -287,7 +287,7 @@ static inline void pxa25x_init_pm(void) {}static int pxa25x_set_wake (struct irq_data *d,unsigned int on) { -int gpio =irq_to_gpio (d->irq); +int gpio =pxa_irq_to_gpio (d->irq);uint32_t mask =0 ;if (gpio >=0 && gpio <85 )
arch/arm/mach-pxa/pxa27x.c +1 -1
@@ -355,7 +355,7 @@ static inline void pxa27x_init_pm(void) {}*/ static int pxa27x_set_wake (struct irq_data *d,unsigned int on) { -int gpio =irq_to_gpio (d->irq); +int gpio =pxa_irq_to_gpio (d->irq);uint32_t mask;if (gpio >=0 && gpio <128 )
arch/arm/mach-pxa/raumfeld.c +7 -7
@@ -292,8 +292,8 @@ static struct resource smc91x_resources[] = { .flags = IORESOURCE_MEM, }, { - .start = gpio_to_irq(GPIO_ETH_IRQ), - .end = gpio_to_irq(GPIO_ETH_IRQ), + .start = PXA_GPIO_TO_IRQ(GPIO_ETH_IRQ), + .end = PXA_GPIO_TO_IRQ(GPIO_ETH_IRQ), .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, } };
@@ -671,7 +671,7 @@ static struct lis3lv02d_platform_data lis3_pdata = { .chip_select = 1, \ .controller_data = (void *) GPIO_ACCEL_CS, \ .platform_data = &lis3_pdata, \ - .irq = gpio_to_irq(GPIO_ACCEL_IRQ), \ + .irq = PXA_GPIO_TO_IRQ(GPIO_ACCEL_IRQ), \ }#define SPI_DAC7512 \
@@ -823,10 +823,10 @@ static void __init raumfeld_power_init(void)else gpio_direction_output (GPIO_CHARGE_USB_SUSP ,0 ); - power_supply_resources[0 ].start =gpio_to_irq (GPIO_CHARGE_DC_OK ); - power_supply_resources[0 ].end =gpio_to_irq (GPIO_CHARGE_DC_OK ); + power_supply_resources[0 ].start =PXA_GPIO_TO_IRQ (GPIO_CHARGE_DC_OK ); + power_supply_resources[0 ].end =PXA_GPIO_TO_IRQ (GPIO_CHARGE_DC_OK ); - ret =request_irq (gpio_to_irq (GPIO_CHARGE_DONE ), + ret =request_irq (PXA_GPIO_TO_IRQ (GPIO_CHARGE_DONE ), &charge_done_irq,IORESOURCE_IRQ_LOWEDGE ,"charge_done" ,NULL );
@@ -955,7 +955,7 @@ static struct eeti_ts_platform_data eeti_ts_pdata = {static struct i2c_board_info raumfeld_controller_i2c_board_info__initdata = { .type ="eeti_ts" , .addr =0x0a , - .irq =gpio_to_irq (GPIO_TOUCH_IRQ ), + .irq =PXA_GPIO_TO_IRQ (GPIO_TOUCH_IRQ ), .platform_data = &eeti_ts_pdata, };
arch/arm/mach-pxa/saar.c +3 -3
@@ -96,8 +96,8 @@ static struct resource smc91x_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)), - .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)), + .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)), + .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)), .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, } };
@@ -502,7 +502,7 @@ static struct i2c_board_info saar_i2c_info[] = { .type = "da9034", .addr = 0x34, .platform_data = &saar_da9034_info, - .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)), + .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)), }, };
arch/arm/mach-pxa/saarb.c +1 -1
@@ -92,7 +92,7 @@ static struct i2c_board_info saarb_i2c_info[] = { .type = "88PM860x", .addr = 0x34, .platform_data = &saarb_pm8607_info, - .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)), + .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)), }, };
arch/arm/mach-pxa/spitz.c +1 -1
@@ -552,7 +552,7 @@ static struct spi_board_info spitz_spi_devices[] = { .chip_select = 0, .platform_data = &spitz_ads7846_info, .controller_data = &spitz_ads7846_chip, - .irq = gpio_to_irq(SPITZ_GPIO_TP_INT), + .irq = PXA_GPIO_TO_IRQ(SPITZ_GPIO_TP_INT), }, { .modalias = "corgi-lcd", .max_speed_hz = 50000,
arch/arm/mach-pxa/stargate2.c +2 -2
@@ -546,7 +546,7 @@ static struct i2c_board_info __initdata imote2_pwr_i2c_board_info[] = { .type = "da9030", .addr = 0x49, .platform_data = &imote2_da9030_pdata, - .irq = gpio_to_irq(1), + .irq = PXA_GPIO_TO_IRQ(1), }, };
@@ -913,7 +913,7 @@ static struct i2c_board_info __initdata stargate2_pwr_i2c_board_info[] = { .type = "da9030", .addr = 0x49, .platform_data = &stargate2_da9030_pdata, - .irq = gpio_to_irq(1), + .irq = PXA_GPIO_TO_IRQ(1), }, };
arch/arm/mach-pxa/tavorevb.c +2 -2
@@ -85,8 +85,8 @@ static struct resource smc91x_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)), - .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)), + .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO47)), + .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO47)), .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, } };
arch/arm/mach-pxa/tavorevb3.c +1 -1
@@ -101,7 +101,7 @@ static struct i2c_board_info evb3_i2c_info[] = { .type = "88PM860x", .addr = 0x34, .platform_data = &evb3_pm8607_info, - .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)), + .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)), }, };
arch/arm/mach-pxa/tosa.c +2 -2
@@ -404,8 +404,8 @@ static struct pda_power_pdata tosa_power_data = {static struct resource tosa_power_resource[] = { { .name ="ac" , - .start =gpio_to_irq (TOSA_GPIO_AC_IN ), - .end =gpio_to_irq (TOSA_GPIO_AC_IN ), + .start =PXA_GPIO_TO_IRQ (TOSA_GPIO_AC_IN ), + .end =PXA_GPIO_TO_IRQ (TOSA_GPIO_AC_IN ), .flags =IORESOURCE_IRQ |IORESOURCE_IRQ_HIGHEDGE |IORESOURCE_IRQ_LOWEDGE ,
arch/arm/mach-pxa/viper.c +8 -8
@@ -315,9 +315,9 @@ static void __init viper_init_irq(void)set_irq_flags (isa_irq,IRQF_VALID |IRQF_PROBE ); } -irq_set_chained_handler (gpio_to_irq (VIPER_CPLD_GPIO ), +irq_set_chained_handler (PXA_GPIO_TO_IRQ (VIPER_CPLD_GPIO ), viper_irq_handler); -irq_set_irq_type (gpio_to_irq (VIPER_CPLD_GPIO ),IRQ_TYPE_EDGE_BOTH ); +irq_set_irq_type (PXA_GPIO_TO_IRQ (VIPER_CPLD_GPIO ),IRQ_TYPE_EDGE_BOTH ); }/* Flat Panel */
@@ -422,8 +422,8 @@ static struct resource smc91x_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = gpio_to_irq(VIPER_ETH_GPIO), - .end = gpio_to_irq(VIPER_ETH_GPIO), + .start = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO), + .end = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO), .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, }, [2] = {
@@ -546,7 +546,7 @@ static struct plat_serial8250_port serial_platform_data[] = {/* External UARTs */ { .mapbase = VIPER_UARTA_PHYS, - .irq = gpio_to_irq(VIPER_UARTA_GPIO), + .irq = PXA_GPIO_TO_IRQ(VIPER_UARTA_GPIO), .irqflags = IRQF_TRIGGER_RISING, .uartclk = 1843200, .regshift = 1,
@@ -556,7 +556,7 @@ static struct plat_serial8250_port serial_platform_data[] = { }, { .mapbase = VIPER_UARTB_PHYS, - .irq = gpio_to_irq(VIPER_UARTB_GPIO), + .irq = PXA_GPIO_TO_IRQ(VIPER_UARTB_GPIO), .irqflags = IRQF_TRIGGER_RISING, .uartclk = 1843200, .regshift = 1,
@@ -596,8 +596,8 @@ static struct resource isp116x_resources[] = { .flags = IORESOURCE_MEM, }, [2] = { - .start = gpio_to_irq(VIPER_USB_GPIO), - .end = gpio_to_irq(VIPER_USB_GPIO), + .start = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO), + .end = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO), .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, }, };
arch/arm/mach-pxa/vpac270.c +2 -2
@@ -610,8 +610,8 @@ static struct resource vpac270_ide_resources[] = { .flags = IORESOURCE_DMA }, [3] = { /* IDE IRQ pin */ - .start = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ), - .end = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ), + .start = PXA_GPIO_TO_IRQ(GPIO36_VPAC270_IDE_IRQ), + .end = PXA_GPIO_TO_IRQ(GPIO36_VPAC270_IDE_IRQ), .flags = IORESOURCE_IRQ } };
arch/arm/mach-pxa/z2.c +1 -1
@@ -573,7 +573,7 @@ static struct spi_board_info spi_board_info[] __initdata = { .modalias = "libertas_spi", .platform_data = &z2_lbs_pdata, .controller_data = &z2_lbs_chip_info, - .irq = gpio_to_irq(GPIO36_ZIPITZ2_WIFI_IRQ), + .irq = PXA_GPIO_TO_IRQ(GPIO36_ZIPITZ2_WIFI_IRQ), .max_speed_hz = 13000000, .bus_num = 1, .chip_select = 0,
arch/arm/mach-pxa/zeus.c +17 -17
@@ -136,12 +136,12 @@ static void __init zeus_init_irq(void)/* Peripheral IRQs. It would be nice to move those inside driver configuration, but it is not supported@the moment. */ -irq_set_irq_type (gpio_to_irq (ZEUS_AC97_GPIO ),IRQ_TYPE_EDGE_RISING ); -irq_set_irq_type (gpio_to_irq (ZEUS_WAKEUP_GPIO ),IRQ_TYPE_EDGE_RISING ); -irq_set_irq_type (gpio_to_irq (ZEUS_PTT_GPIO ),IRQ_TYPE_EDGE_RISING ); -irq_set_irq_type (gpio_to_irq (ZEUS_EXTGPIO_GPIO ), +irq_set_irq_type (PXA_GPIO_TO_IRQ (ZEUS_AC97_GPIO ),IRQ_TYPE_EDGE_RISING ); +irq_set_irq_type (PXA_GPIO_TO_IRQ (ZEUS_WAKEUP_GPIO ),IRQ_TYPE_EDGE_RISING ); +irq_set_irq_type (PXA_GPIO_TO_IRQ (ZEUS_PTT_GPIO ),IRQ_TYPE_EDGE_RISING ); +irq_set_irq_type (PXA_GPIO_TO_IRQ (ZEUS_EXTGPIO_GPIO ),IRQ_TYPE_EDGE_FALLING ); -irq_set_irq_type (gpio_to_irq (ZEUS_CAN_GPIO ),IRQ_TYPE_EDGE_FALLING ); +irq_set_irq_type (PXA_GPIO_TO_IRQ (ZEUS_CAN_GPIO ),IRQ_TYPE_EDGE_FALLING );/* Setup ISA IRQs */ for (level =0 ; level <ARRAY_SIZE (zeus_isa_irqs); level++) {
@@ -151,8 +151,8 @@ static void __init zeus_init_irq(void)set_irq_flags (isa_irq,IRQF_VALID |IRQF_PROBE ); } -irq_set_irq_type (gpio_to_irq (ZEUS_ISA_GPIO ),IRQ_TYPE_EDGE_RISING ); -irq_set_chained_handler (gpio_to_irq (ZEUS_ISA_GPIO ), zeus_irq_handler); +irq_set_irq_type (PXA_GPIO_TO_IRQ (ZEUS_ISA_GPIO ),IRQ_TYPE_EDGE_RISING ); +irq_set_chained_handler (PXA_GPIO_TO_IRQ (ZEUS_ISA_GPIO ), zeus_irq_handler); }
@@ -233,7 +233,7 @@ static struct plat_serial8250_port serial_platform_data[] = {/* FIXME: Shared IRQs on COM1-COM4 will not work properly on v1i1 hardware. */ {/* COM1 */ .mapbase = 0x10000000, - .irq = gpio_to_irq(ZEUS_UARTA_GPIO), + .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTA_GPIO), .irqflags = IRQF_TRIGGER_RISING, .uartclk = 14745600, .regshift = 1,
@@ -242,7 +242,7 @@ static struct plat_serial8250_port serial_platform_data[] = { }, {/* COM2 */ .mapbase = 0x10800000, - .irq = gpio_to_irq(ZEUS_UARTB_GPIO), + .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTB_GPIO), .irqflags = IRQF_TRIGGER_RISING, .uartclk = 14745600, .regshift = 1,
@@ -251,7 +251,7 @@ static struct plat_serial8250_port serial_platform_data[] = { }, {/* COM3 */ .mapbase = 0x11000000, - .irq = gpio_to_irq(ZEUS_UARTC_GPIO), + .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTC_GPIO), .irqflags = IRQF_TRIGGER_RISING, .uartclk = 14745600, .regshift = 1,
@@ -260,7 +260,7 @@ static struct plat_serial8250_port serial_platform_data[] = { }, {/* COM4 */ .mapbase = 0x11800000, - .irq = gpio_to_irq(ZEUS_UARTD_GPIO), + .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTD_GPIO), .irqflags = IRQF_TRIGGER_RISING, .uartclk = 14745600, .regshift = 1,
@@ -321,8 +321,8 @@ static struct resource zeus_dm9k0_resource[] = { .flags = IORESOURCE_MEM }, [2] = { - .start = gpio_to_irq(ZEUS_ETH0_GPIO), - .end = gpio_to_irq(ZEUS_ETH0_GPIO), + .start = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO), + .end = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO), .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, }, };
@@ -339,8 +339,8 @@ static struct resource zeus_dm9k1_resource[] = { .flags = IORESOURCE_MEM, }, [2] = { - .start = gpio_to_irq(ZEUS_ETH1_GPIO), - .end = gpio_to_irq(ZEUS_ETH1_GPIO), + .start = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO), + .end = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO), .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, }, };
@@ -423,7 +423,7 @@ static struct spi_board_info zeus_spi_board_info[] = { [0] = { .modalias = "mcp2515", .platform_data = &zeus_mcp2515_pdata, - .irq = gpio_to_irq(ZEUS_CAN_GPIO), + .irq = PXA_GPIO_TO_IRQ(ZEUS_CAN_GPIO), .max_speed_hz = 1*1000*1000, .bus_num = 3, .mode = SPI_MODE_0,
@@ -753,7 +753,7 @@ static struct i2c_board_info __initdata zeus_i2c_devices[] = { { I2C_BOARD_INFO("pca9535", 0x20), .platform_data = &zeus_pca953x_pdata[2], - .irq =gpio_to_irq (ZEUS_EXTGPIO_GPIO ), + .irq =PXA_GPIO_TO_IRQ (ZEUS_EXTGPIO_GPIO ), }, { I2C_BOARD_INFO("lm75a", 0x48) }, { I2C_BOARD_INFO("24c01", 0x50) },
arch/arm/mach-pxa/zylonite.c +2 -2
@@ -407,8 +407,8 @@ static void __init zylonite_init(void)* Note: We depend that the bootloader set * the correct value to MSC register for SMC91x. */ - smc91x_resources[1 ].start =gpio_to_irq (gpio_eth_irq); - smc91x_resources[1 ].end =gpio_to_irq (gpio_eth_irq); + smc91x_resources[1 ].start =PXA_GPIO_TO_IRQ (gpio_eth_irq); + smc91x_resources[1 ].end =PXA_GPIO_TO_IRQ (gpio_eth_irq);platform_device_register (&smc91x_device);pxa_set_ac97_info (NULL );
arch/arm/plat-pxa/include/plat/gpio-pxa.h +1 -0
@@ -40,5 +40,6 @@ extern int pxa_last_gpio;typedef int (*set_wake_t )(struct irq_data *d,unsigned int on);extern void pxa_init_gpio (int mux_irq,int start,int end,set_wake_t fn); +extern int pxa_irq_to_gpio (int irq);#endif /* __PLAT_PXA_GPIO_H */
drivers/gpio/gpio-pxa.c +85 -4
133 lines not on this page · raw message
Signature · 1 line
1.7.4.1
PATCH v7 4/11 ARM: pxa: rename gpio_to_irq and irq_to_gpio
Quoted 5 lines · Haojian Zhuang
arch/arm/mach-pxa/cm-x2xx-pci.c +0
-0
arch/arm/mach-pxa/cm-x2xx-pci.c void __cmx2xx_pci_init_irq(int irq_gpio) · line 49
Quoted 9 lines
arch/arm/mach-pxa/cm-x2xx-pci.c +2
-2@@ -43,9 +43,9 @@ void __cmx2xx_pci_init_irq(int irq_gpio) cmx2xx_it8152_irq_gpio = irq_gpio; -irq_set_irq_type (gpio_to_irq (irq_gpio),IRQ_TYPE_EDGE_RISING ); +irq_set_irq_type (PXA_GPIO_TO_IRQ (irq_gpio),IRQ_TYPE_EDGE_RISING ); -irq_set_chained_handler (gpio_to_irq (irq_gpio), +irq_set_chained_handler (PXA_GPIO_TO_IRQ (irq_gpio), cmx2xx_it8152_irq_demux);
The only comment remaining from the previous review of these patches is that these changes to the runtime usage of gpio_to_irq() should not be necessary.
If gpiolib is implemented correctly, when running on PXA, PXA_GPIO_TO_IRQ(gpio) should be the same as gpio_to_irq(gpio).
Haojian Zhuang
maintainerPATCH v7 4/11 ARM: pxa: rename gpio_to_irq and irq_to_gpio
Quoted 20 lines · Russell King - ARM Linux
Quoted 5 lines · Haojian Zhuang
arch/arm/mach-pxa/cm-x2xx-pci.c +0
-0arch/arm/mach-pxa/cm-x2xx-pci.c void __cmx2xx_pci_init_irq(int irq_gpio) · line 49
Quoted 9 lines
arch/arm/mach-pxa/cm-x2xx-pci.c +2
-2@@ -43,9 +43,9 @@ void __cmx2xx_pci_init_irq(int irq_gpio) ? ? ? cmx2xx_it8152_irq_gpio = irq_gpio; - ? ? irq_set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING); + ? ? irq_set_irq_type(PXA_GPIO_TO_IRQ(irq_gpio), IRQ_TYPE_EDGE_RISING); - ? ? irq_set_chained_handler(gpio_to_irq(irq_gpio), + ? ? irq_set_chained_handler(PXA_GPIO_TO_IRQ(irq_gpio), ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? cmx2xx_it8152_irq_demux);The only comment remaining from the previous review of these patches is that these changes to the runtime usage of
gpio_to_irq()should not be necessary.
Quoted 3 lines
If gpiolib is implemented correctly, when running on PXA,
PXA_GPIO_TO_IRQ(gpio)should be the same asgpio_to_irq(gpio).
Yes, it seems that this patch is unnecessary. So will you merge rest of those gpio patches into your git tree?
Thanks
Haojian
PATCH v7 4/11 ARM: pxa: rename gpio_to_irq and irq_to_gpio
Quoted 22 lines · Haojian Zhuang
Quoted 20 lines · Russell King - ARM Linux
Quoted 5 lines · Haojian Zhuang
arch/arm/mach-pxa/cm-x2xx-pci.c +0
-0arch/arm/mach-pxa/cm-x2xx-pci.c void __cmx2xx_pci_init_irq(int irq_gpio) · line 49
Quoted 9 lines
arch/arm/mach-pxa/cm-x2xx-pci.c +2
-2@@ -43,9 +43,9 @@ void __cmx2xx_pci_init_irq(int irq_gpio) ? ? ? cmx2xx_it8152_irq_gpio = irq_gpio; - ? ? irq_set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING); + ? ? irq_set_irq_type(PXA_GPIO_TO_IRQ(irq_gpio), IRQ_TYPE_EDGE_RISING); - ? ? irq_set_chained_handler(gpio_to_irq(irq_gpio), + ? ? irq_set_chained_handler(PXA_GPIO_TO_IRQ(irq_gpio), ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? cmx2xx_it8152_irq_demux);The only comment remaining from the previous review of these patches is that these changes to the runtime usage of
gpio_to_irq()should not be necessary.
Quoted 6 lines
Quoted 3 lines
If gpiolib is implemented correctly, when running on PXA,
PXA_GPIO_TO_IRQ(gpio)should be the same asgpio_to_irq(gpio).Yes, it seems that this patch is unnecessary. So will you merge rest of those gpio patches into your git tree?
Some of this patch is required - all the places where gpio_to_irq() is used as an initializer need to be fixed. Those places where it is used at run-time should not be fixed up though.
Haojian Zhuang
maintainerPATCH v7 4/11 ARM: pxa: rename gpio_to_irq and irq_to_gpio
Quoted 27 lines · Russell King - ARM Linux
Quoted 26 lines · Haojian Zhuang
Quoted 23 lines · Russell King - ARM Linux
Quoted 5 lines · Haojian Zhuang
arch/arm/mach-pxa/cm-x2xx-pci.c +0
-0arch/arm/mach-pxa/cm-x2xx-pci.c void __cmx2xx_pci_init_irq(int irq_gpio) · line 49
Quoted 9 lines
arch/arm/mach-pxa/cm-x2xx-pci.c +2
-2@@ -43,9 +43,9 @@ void __cmx2xx_pci_init_irq(int irq_gpio) ? ? ? cmx2xx_it8152_irq_gpio = irq_gpio; - ? ? irq_set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING); + ? ? irq_set_irq_type(PXA_GPIO_TO_IRQ(irq_gpio), IRQ_TYPE_EDGE_RISING); - ? ? irq_set_chained_handler(gpio_to_irq(irq_gpio), + ? ? irq_set_chained_handler(PXA_GPIO_TO_IRQ(irq_gpio), ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? cmx2xx_it8152_irq_demux);The only comment remaining from the previous review of these patches is that these changes to the runtime usage of
gpio_to_irq()should not be necessary.If gpiolib is implemented correctly, when running on PXA,
PXA_GPIO_TO_IRQ(gpio)should be the same asgpio_to_irq(gpio).
Quoted 7 lines
Quoted 2 lines
Yes, it seems that this patch is unnecessary. So will you merge rest of those gpio patches into your git tree?
Some of this patch is required - all the places where
gpio_to_irq()is used as an initializer need to be fixed. ?Those places where it is used at run-time should not be fixed up though.
OK. I'll submit a new patch series again.
Thanks
Haojian
PATCH v7 4/11 ARM: pxa: rename gpio_to_irq and irq_to_gpio
Quoted 32 lines · Haojian Zhuang
Quoted 30 lines · Russell King - ARM Linux
Quoted 28 lines · Haojian Zhuang
Quoted 20 lines · Russell King - ARM Linux
Quoted 5 lines · Haojian Zhuang
arch/arm/mach-pxa/cm-x2xx-pci.c +0
-0arch/arm/mach-pxa/cm-x2xx-pci.c void __cmx2xx_pci_init_irq(int irq_gpio) · line 49
Quoted 9 lines
arch/arm/mach-pxa/cm-x2xx-pci.c +2
-2@@ -43,9 +43,9 @@ void __cmx2xx_pci_init_irq(int irq_gpio) ? ? ? cmx2xx_it8152_irq_gpio = irq_gpio; - ? ? irq_set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING); + ? ? irq_set_irq_type(PXA_GPIO_TO_IRQ(irq_gpio), IRQ_TYPE_EDGE_RISING); - ? ? irq_set_chained_handler(gpio_to_irq(irq_gpio), + ? ? irq_set_chained_handler(PXA_GPIO_TO_IRQ(irq_gpio), ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? cmx2xx_it8152_irq_demux);The only comment remaining from the previous review of these patches is that these changes to the runtime usage of
gpio_to_irq()should not be necessary.Quoted 3 lines
If gpiolib is implemented correctly, when running on PXA,
PXA_GPIO_TO_IRQ(gpio)should be the same asgpio_to_irq(gpio).Yes, it seems that this patch is unnecessary. So will you merge rest of those gpio patches into your git tree?
Quoted 6 lines
Quoted 4 lines
Some of this patch is required - all the places where
gpio_to_irq()is used as an initializer need to be fixed. ?Those places where it is used at run-time should not be fixed up though.OK. I'll submit a new patch series again.
You could just submit a replacement for patch 4, rather than re-sending the entire series.
PATCH v7 5/11 ARM: pxa: recognize gpio number and type
In reply to Haojian ZhuangUse cpuid to recognize the gpio number and type. CPU_PXA26x is the special case since we can't identify it by cpuid.
--- drivers/gpio/gpio-pxa.c | 41 ++++++++++++++++++++++++++++++++++++++++- 1 files changed, 40 insertions(+), 1 deletions(-)
drivers/gpio/gpio-pxa.c +40 -1
@@ -347,12 +347,51 @@ static struct irq_chip pxa_muxed_gpio_chip = { .irq_set_type = pxa_gpio_irq_type, }; +static int pxa_gpio_nums (void ) +{ +int count =0 ; + +#ifdef CONFIG_ARCH_PXA +if (cpu_is_pxa25x ()) { +#ifdef CONFIG_CPU_PXA26x + count =89 ; + gpio_type =PXA26X_GPIO ; +#elif defined(CONFIG_PXA25x) + count =84 ; + gpio_type =PXA26X_GPIO ; +#endif /* CONFIG_CPU_PXA26x */ + }else if (cpu_is_pxa27x ()) { + count =120 ; + gpio_type =PXA27X_GPIO ; + }else if (cpu_is_pxa93x () ||cpu_is_pxa95x ()) { + count =191 ; + gpio_type =PXA93X_GPIO ; + }else if (cpu_is_pxa3xx ()) { + count =127 ; + gpio_type =PXA3XX_GPIO ; + } +#endif /* CONFIG_ARCH_PXA */ + +#ifdef CONFIG_ARCH_MMP +if (cpu_is_pxa168 () ||cpu_is_pxa910 ()) { + count =127 ; + gpio_type =MMP_GPIO ; + }else if (cpu_is_mmp2 ()) { + count =191 ; + gpio_type =MMP2_GPIO ; + } +#endif /* CONFIG_ARCH_MMP */ +return count; +} +void __init pxa_init_gpio (int mux_irq,int start,int end,set_wake_t fn) {struct pxa_gpio_chip *c;int gpio, irq; - pxa_last_gpio = end; + pxa_last_gpio =pxa_gpio_nums (); +if (!pxa_last_gpio) +return ;/* Initialize GPIO chips */ pxa_init_gpio_chip (end);
Signature · 1 line
1.7.4.1
PATCH v7 6/11 ARM: pxa: rename NR_BUILTIN_GPIO
In reply to Haojian ZhuangNR_BUILTIN_GPIO is both defined in arch-pxa and arch-mmp. Now replace it with PXA_NR_BUILTIN_GPIO and MMP_NR_BUILTIN_GPIO.
--- arch/arm/mach-mmp/include/mach/gpio-pxa.h | 2 - arch/arm/mach-mmp/include/mach/gpio.h | 1 - arch/arm/mach-mmp/include/mach/irqs.h | 5 +-- arch/arm/mach-mmp/tavorevb.c | 1 + arch/arm/mach-mmp/ttc_dkb.c | 7 +++-- arch/arm/mach-pxa/include/mach/corgi.h | 2 +- arch/arm/mach-pxa/include/mach/gpio-pxa.h | 2 - arch/arm/mach-pxa/include/mach/gpio.h | 1 - arch/arm/mach-pxa/include/mach/hx4700.h | 2 +- arch/arm/mach-pxa/include/mach/irqs.h | 4 +- arch/arm/mach-pxa/include/mach/littleton.h | 2 +- arch/arm/mach-pxa/include/mach/magician.h | 2 +- arch/arm/mach-pxa/include/mach/poodle.h | 2 +- arch/arm/mach-pxa/include/mach/spitz.h | 6 ++-- arch/arm/mach-pxa/include/mach/tosa.h | 6 ++-- arch/arm/mach-pxa/pcm990-baseboard.c | 6 ++-- arch/arm/plat-pxa/include/plat/gpio.h | 30 ---------------------------- 17 files changed, 23 insertions(+), 58 deletions(-) delete mode 100644 arch/arm/plat-pxa/include/plat/gpio.h
arch/arm/mach-mmp/include/mach/gpio-pxa.h +0 -2
@@ -10,8 +10,6 @@#define BANK_OFF (n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))#define GPIO_REG (x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x))) -#define NR_BUILTIN_GPIO IRQ_GPIO_NUM -#define gpio_to_bank (gpio) ((gpio) >> 5)/* NOTE: these macros are defined here to make optimization of
arch/arm/mach-mmp/include/mach/gpio.h +0 -1
@@ -6,5 +6,4 @@#define __gpio_is_inverted (gpio) (0)#define __gpio_is_occupied (gpio) (0) -#include <plat/gpio.h> #endif /* __ASM_MACH_GPIO_H */
arch/arm/mach-mmp/include/mach/irqs.h +2 -3
@@ -219,11 +219,10 @@#define IRQ_MMP2_MUX_END (IRQ_MMP2_SSP_BASE + 2)#define IRQ_GPIO_START 128 -#define IRQ_GPIO_NUM 192 -#define IRQ_GPIO (x) (IRQ_GPIO_START + (x)) +#define MMP_NR_BUILTIN_GPIO 192#define MMP_GPIO_TO_IRQ (gpio) (IRQ_GPIO_START + (gpio)) -#define IRQ_BOARD_START (IRQ_GPIO_START + IRQ_GPIO_NUM) +#define IRQ_BOARD_START (IRQ_GPIO_START + MMP_NR_BUILTIN_GPIO)#define NR_IRQS (IRQ_BOARD_START)
arch/arm/mach-mmp/tavorevb.c +1 -0
@@ -19,6 +19,7 @@#include <mach/addr-map.h> #include <mach/mfp-pxa910.h> #include <mach/pxa910.h> +#include <mach/irqs.h> #include "common.h"
arch/arm/mach-mmp/ttc_dkb.c +4 -3
@@ -24,12 +24,13 @@#include <mach/addr-map.h> #include <mach/mfp-pxa910.h> #include <mach/pxa910.h> +#include <mach/irqs.h> #include "common.h" -#define TTCDKB_GPIO_EXT0 (x) (NR_BUILTIN_GPIO + ((x < 0) ? 0 : \ +#define TTCDKB_GPIO_EXT0 (x) (MMP_NR_BUILTIN_GPIO + ((x < 0) ? 0 : \ ((x < 16) ? x : 15))) -#define TTCDKB_GPIO_EXT1 (x) (NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 : \ +#define TTCDKB_GPIO_EXT1 (x) (MMP_NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 : \ ((x < 16) ? x : 15)))/*
@@ -136,7 +137,7 @@ static struct i2c_board_info ttc_dkb_i2c_info[] = { { .type = "max7312", .addr = 0x23, - .irq = IRQ_GPIO(80), + .irq = MMP_GPIO_TO_IRQ(80), .platform_data = &max7312_data, }, };
arch/arm/mach-pxa/include/mach/corgi.h +1 -1
@@ -98,7 +98,7 @@ CORGI_SCP_MIC_BIAS )#define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R ) -#define CORGI_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO) +#define CORGI_SCOOP_GPIO_BASE (PXA_NR_BUILTIN_GPIO)#define CORGI_GPIO_LED_GREEN (CORGI_SCOOP_GPIO_BASE + 0)#define CORGI_GPIO_SWA (CORGI_SCOOP_GPIO_BASE + 1)/* Hinge Switch A */ #define CORGI_GPIO_SWB (CORGI_SCOOP_GPIO_BASE + 2)/* Hinge Switch B */
arch/arm/mach-pxa/include/mach/gpio-pxa.h +0 -2
@@ -93,8 +93,6 @@#define GAFR (x) GPIO_REG(0x54 + (((x) & 0x70) >> 2)) -#define NR_BUILTIN_GPIO PXA_GPIO_IRQ_NUM -#define gpio_to_bank (gpio) ((gpio) >> 5)#ifdef CONFIG_CPU_PXA26x
arch/arm/mach-pxa/include/mach/gpio.h +0 -1
@@ -28,5 +28,4 @@/* The defines for the driver are needed for the accelerated accessors */ #include "gpio-pxa.h" -#include <plat/gpio.h> #endif
arch/arm/mach-pxa/include/mach/hx4700.h +1 -1
@@ -15,7 +15,7 @@#include <linux/gpio.h> #include <linux/mfd/asic3.h> -#define HX4700_ASIC3_GPIO_BASE NR_BUILTIN_GPIO +#define HX4700_ASIC3_GPIO_BASE PXA_NR_BUILTIN_GPIO#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS)#define HX4700_NR_IRQS (IRQ_BOARD_START + 70)
arch/arm/mach-pxa/include/mach/irqs.h +2 -2
@@ -88,7 +88,7 @@#define IRQ_U2P PXA_IRQ(93)/* USB PHY D+/D- Lines (PXA935) */ #define PXA_GPIO_IRQ_BASE PXA_IRQ(96) -#define PXA_GPIO_IRQ_NUM (192) +#define PXA_NR_BUILTIN_GPIO (192)#define PXA_GPIO_TO_IRQ (x) (PXA_GPIO_IRQ_BASE + (x))/*
@@ -98,7 +98,7 @@* By default, no board IRQ is reserved. It should be finished in * custom board since sparse IRQ is already enabled. */ -#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM) +#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_NR_BUILTIN_GPIO)#define NR_IRQS (IRQ_BOARD_START)
arch/arm/mach-pxa/include/mach/littleton.h +1 -1
@@ -7,7 +7,7 @@#define LITTLETON_GPIO_LCD_CS (17) -#define EXT0_GPIO_BASE (NR_BUILTIN_GPIO) +#define EXT0_GPIO_BASE (PXA_NR_BUILTIN_GPIO)#define EXT0_GPIO (x) (EXT0_GPIO_BASE + (x))#define LITTLETON_NR_IRQS (IRQ_BOARD_START + 8)
arch/arm/mach-pxa/include/mach/magician.h +1 -1
@@ -78,7 +78,7 @@* CPLD EGPIOs */ -#define MAGICIAN_EGPIO_BASE NR_BUILTIN_GPIO +#define MAGICIAN_EGPIO_BASE PXA_NR_BUILTIN_GPIO#define MAGICIAN_EGPIO (reg,bit) \ (MAGICIAN_EGPIO_BASE + 8*reg + bit)
arch/arm/mach-pxa/include/mach/poodle.h +1 -1
@@ -71,7 +71,7 @@#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT )#define POODLE_SCOOP_IO_OUT ( 0 ) -#define POODLE_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO) +#define POODLE_SCOOP_GPIO_BASE (PXA_NR_BUILTIN_GPIO)#define POODLE_GPIO_CHARGE_ON (POODLE_SCOOP_GPIO_BASE + 0)#define POODLE_GPIO_CP401 (POODLE_SCOOP_GPIO_BASE + 2)#define POODLE_GPIO_VPEN (POODLE_SCOOP_GPIO_BASE + 7)
arch/arm/mach-pxa/include/mach/spitz.h +3 -3
@@ -108,7 +108,7 @@#define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)#define SPITZ_SCP_SUS_SET 0 -#define SPITZ_SCP_GPIO_BASE (NR_BUILTIN_GPIO) +#define SPITZ_SCP_GPIO_BASE (PXA_NR_BUILTIN_GPIO)#define SPITZ_GPIO_LED_GREEN (SPITZ_SCP_GPIO_BASE + 0)#define SPITZ_GPIO_JK_B (SPITZ_SCP_GPIO_BASE + 1)#define SPITZ_GPIO_CHRG_ON (SPITZ_SCP_GPIO_BASE + 2)
@@ -140,7 +140,7 @@ SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)#define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1) -#define SPITZ_SCP2_GPIO_BASE (NR_BUILTIN_GPIO + 12) +#define SPITZ_SCP2_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12)#define SPITZ_GPIO_IR_ON (SPITZ_SCP2_GPIO_BASE + 0)#define SPITZ_GPIO_AKIN_PULLUP (SPITZ_SCP2_GPIO_BASE + 1)#define SPITZ_GPIO_RESERVED_1 (SPITZ_SCP2_GPIO_BASE + 2)
@@ -152,7 +152,7 @@#define SPITZ_GPIO_MIC_BIAS (SPITZ_SCP2_GPIO_BASE + 8)/* Akita IO Expander GPIOs */ -#define AKITA_IOEXP_GPIO_BASE (NR_BUILTIN_GPIO + 12) +#define AKITA_IOEXP_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12)#define AKITA_GPIO_RESERVED_0 (AKITA_IOEXP_GPIO_BASE + 0)#define AKITA_GPIO_RESERVED_1 (AKITA_IOEXP_GPIO_BASE + 1)#define AKITA_GPIO_MIC_BIAS (AKITA_IOEXP_GPIO_BASE + 2)
arch/arm/mach-pxa/include/mach/tosa.h +3 -3
@@ -24,7 +24,7 @@/* * SCOOP2 internal GPIOs */ -#define TOSA_SCOOP_GPIO_BASE NR_BUILTIN_GPIO +#define TOSA_SCOOP_GPIO_BASE PXA_NR_BUILTIN_GPIO#define TOSA_SCOOP_PXA_VCORE1 SCOOP_GPCR_PA11#define TOSA_GPIO_TC6393XB_REST_IN (TOSA_SCOOP_GPIO_BASE + 1)#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2)
@@ -42,7 +42,7 @@/* * SCOOP2 jacket GPIOs */ -#define TOSA_SCOOP_JC_GPIO_BASE (NR_BUILTIN_GPIO + 12) +#define TOSA_SCOOP_JC_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12)#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0)#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1)#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2)
@@ -59,7 +59,7 @@/* * TC6393XB GPIOs */ -#define TOSA_TC6393XB_GPIO_BASE (NR_BUILTIN_GPIO + 2 * 12) +#define TOSA_TC6393XB_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 2 * 12)#define TOSA_GPIO_TG_ON (TOSA_TC6393XB_GPIO_BASE + 0)#define TOSA_GPIO_L_MUTE (TOSA_TC6393XB_GPIO_BASE + 1)
arch/arm/mach-pxa/pcm990-baseboard.c +3 -3
@@ -378,7 +378,7 @@ struct pxacamera_platform_data pcm990_pxacamera_platform_data = {#include <linux/i2c/pca953x.h> static struct pca953x_platform_data pca9536_data = { - .gpio_base =NR_BUILTIN_GPIO , + .gpio_base =PXA_NR_BUILTIN_GPIO , };static int gpio_bus_switch = -EINVAL ;
@@ -406,9 +406,9 @@ static unsigned long pcm990_camera_query_bus_param(struct soc_camera_link *link)int ret;if (gpio_bus_switch <0 ) { - ret =gpio_request (NR_BUILTIN_GPIO ,"camera" ); + ret =gpio_request (PXA_NR_BUILTIN_GPIO ,"camera" );if (!ret) { - gpio_bus_switch =NR_BUILTIN_GPIO ; + gpio_bus_switch =PXA_NR_BUILTIN_GPIO ;gpio_direction_output (gpio_bus_switch,0 ); } }
arch/arm/plat-pxa/include/plat/gpio.h deleted +0 -30
@@ -1,30 +0,0 @@ -#ifndef __PLAT_GPIO_H -#define __PLAT_GPIO_H - -#define __ARM_GPIOLIB_COMPLEX - -/* The individual machine provides register offsets and NR_BUILTIN_GPIO */ -#include <mach/gpio-pxa.h> - -static inline int gpio_get_value (unsigned gpio) -{ -if (__builtin_constant_p (gpio) && (gpio <NR_BUILTIN_GPIO )) -return GPLR (gpio) &GPIO_bit (gpio); -else -return __gpio_get_value (gpio); -} - -static inline void gpio_set_value (unsigned gpio,int value) -{ -if (__builtin_constant_p (gpio) && (gpio <NR_BUILTIN_GPIO )) { -if (value) -GPSR (gpio) =GPIO_bit (gpio); -else -GPCR (gpio) =GPIO_bit (gpio); - }else -__gpio_set_value (gpio, value); -} - -#define gpio_cansleep __gpio_cansleep - -#endif /* __PLAT_GPIO_H */
Signature · 1 line
1.7.4.1
PATCH v7 7/11 ARM: pxa: use little endian read write in gpio driver
In reply to Haojian ZhuangRemove __raw_readl()/__raw_writel(). Use readl_relaxed()/writel_relaxed() instead.
--- drivers/gpio/gpio-pxa.c | 68 +++++++++++++++++++++++----------------------- 1 files changed, 34 insertions(+), 34 deletions(-)
drivers/gpio/gpio-pxa.c +34 -34
@@ -143,12 +143,12 @@ static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)spin_lock_irqsave (&gpio_lock, flags); - value =__raw_readl (base +GPDR_OFFSET ); + value =readl_relaxed (base +GPDR_OFFSET );if (__gpio_is_inverted (chip->base + offset)) value |= mask;else value &= ~mask; -__raw_writel (value, base +GPDR_OFFSET ); +writel_relaxed (value, base +GPDR_OFFSET );spin_unlock_irqrestore (&gpio_lock, flags);return 0 ;
@@ -161,16 +161,16 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip,uint32_t tmp, mask =1 << offset;unsigned long flags; -__raw_writel (mask, base + (value ?GPSR_OFFSET :GPCR_OFFSET )); +writel_relaxed (mask, base + (value ?GPSR_OFFSET :GPCR_OFFSET ));spin_lock_irqsave (&gpio_lock, flags); - tmp =__raw_readl (base +GPDR_OFFSET ); + tmp =readl_relaxed (base +GPDR_OFFSET );if (__gpio_is_inverted (chip->base + offset)) tmp &= ~mask;else tmp |= mask; -__raw_writel (tmp, base +GPDR_OFFSET ); +writel_relaxed (tmp, base +GPDR_OFFSET );spin_unlock_irqrestore (&gpio_lock, flags);return 0 ;
@@ -178,12 +178,12 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip,static int pxa_gpio_get (struct gpio_chip *chip,unsigned offset) { -return __raw_readl (gpio_chip_base (chip) +GPLR_OFFSET ) & (1 << offset); +return readl_relaxed (gpio_chip_base (chip) +GPLR_OFFSET ) & (1 << offset); }static void pxa_gpio_set (struct gpio_chip *chip,unsigned offset,int value) { -__raw_writel (1 << offset,gpio_chip_base (chip) + +writel_relaxed (1 << offset,gpio_chip_base (chip) + (value ?GPSR_OFFSET :GPCR_OFFSET )); }
@@ -228,12 +228,12 @@ static inline void update_edge_detect(struct pxa_gpio_chip *c) {uint32_t grer, gfer; - grer =__raw_readl (c->regbase +GRER_OFFSET ) & ~c->irq_mask; - gfer =__raw_readl (c->regbase +GFER_OFFSET ) & ~c->irq_mask; + grer =readl_relaxed (c->regbase +GRER_OFFSET ) & ~c->irq_mask; + gfer =readl_relaxed (c->regbase +GFER_OFFSET ) & ~c->irq_mask; grer |= c->irq_edge_rise & c->irq_mask; gfer |= c->irq_edge_fall & c->irq_mask; -__raw_writel (grer, c->regbase +GRER_OFFSET ); -__raw_writel (gfer, c->regbase +GFER_OFFSET ); +writel_relaxed (grer, c->regbase +GRER_OFFSET ); +writel_relaxed (gfer, c->regbase +GFER_OFFSET ); }static int pxa_gpio_irq_type (struct irq_data *d,unsigned int type)
@@ -257,12 +257,12 @@ static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type) type =IRQ_TYPE_EDGE_RISING |IRQ_TYPE_EDGE_FALLING ; } - gpdr =__raw_readl (c->regbase +GPDR_OFFSET ); + gpdr =readl_relaxed (c->regbase +GPDR_OFFSET );if (__gpio_is_inverted (gpio)) -__raw_writel (gpdr | mask, c->regbase +GPDR_OFFSET ); +writel_relaxed (gpdr | mask, c->regbase +GPDR_OFFSET );else -__raw_writel (gpdr & ~mask, c->regbase +GPDR_OFFSET ); +writel_relaxed (gpdr & ~mask, c->regbase +GPDR_OFFSET );if (type &IRQ_TYPE_EDGE_RISING ) c->irq_edge_rise |= mask;
@@ -293,9 +293,9 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)for_each_gpio_chip (gpio, c) { gpio_base = c->chip.base; - gedr =__raw_readl (c->regbase +GEDR_OFFSET ); + gedr =readl_relaxed (c->regbase +GEDR_OFFSET ); gedr = gedr & c->irq_mask; -__raw_writel (gedr, c->regbase +GEDR_OFFSET ); +writel_relaxed (gedr, c->regbase +GEDR_OFFSET ); n =find_first_bit (&gedr,BITS_PER_LONG );while (n <BITS_PER_LONG ) {
@@ -313,7 +313,7 @@ static void pxa_ack_muxed_gpio(struct irq_data *d)int gpio =pxa_irq_to_gpio (d->irq);struct pxa_gpio_chip *c =gpio_to_pxachip (gpio); -__raw_writel (GPIO_bit (gpio), c->regbase +GEDR_OFFSET ); +writel_relaxed (GPIO_bit (gpio), c->regbase +GEDR_OFFSET ); }static void pxa_mask_muxed_gpio (struct irq_data *d)
@@ -324,10 +324,10 @@ static void pxa_mask_muxed_gpio(struct irq_data *d) c->irq_mask &= ~GPIO_bit (gpio); - grer =__raw_readl (c->regbase +GRER_OFFSET ) & ~GPIO_bit (gpio); - gfer =__raw_readl (c->regbase +GFER_OFFSET ) & ~GPIO_bit (gpio); -__raw_writel (grer, c->regbase +GRER_OFFSET ); -__raw_writel (gfer, c->regbase +GFER_OFFSET ); + grer =readl_relaxed (c->regbase +GRER_OFFSET ) & ~GPIO_bit (gpio); + gfer =readl_relaxed (c->regbase +GFER_OFFSET ) & ~GPIO_bit (gpio); +writel_relaxed (grer, c->regbase +GRER_OFFSET ); +writel_relaxed (gfer, c->regbase +GFER_OFFSET ); }static void pxa_unmask_muxed_gpio (struct irq_data *d)
@@ -398,9 +398,9 @@ void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)/* clear all GPIO edge detects */ for_each_gpio_chip (gpio, c) { -__raw_writel (0 , c->regbase +GFER_OFFSET ); -__raw_writel (0 , c->regbase +GRER_OFFSET ); -__raw_writel (~0 ,c->regbase +GEDR_OFFSET ); +writel_relaxed (0 , c->regbase +GFER_OFFSET ); +writel_relaxed (0 , c->regbase +GRER_OFFSET ); +writel_relaxed (~0 ,c->regbase +GEDR_OFFSET ); }#ifdef CONFIG_ARCH_PXA
@@ -435,13 +435,13 @@ static int pxa_gpio_suspend(void)int gpio;for_each_gpio_chip (gpio, c) { - c->saved_gplr =__raw_readl (c->regbase +GPLR_OFFSET ); - c->saved_gpdr =__raw_readl (c->regbase +GPDR_OFFSET ); - c->saved_grer =__raw_readl (c->regbase +GRER_OFFSET ); - c->saved_gfer =__raw_readl (c->regbase +GFER_OFFSET ); + c->saved_gplr =readl_relaxed (c->regbase +GPLR_OFFSET ); + c->saved_gpdr =readl_relaxed (c->regbase +GPDR_OFFSET ); + c->saved_grer =readl_relaxed (c->regbase +GRER_OFFSET ); + c->saved_gfer =readl_relaxed (c->regbase +GFER_OFFSET );/* Clear GPIO transition detect bits */ -__raw_writel (0xffffffff , c->regbase +GEDR_OFFSET ); +writel_relaxed (0xffffffff , c->regbase +GEDR_OFFSET ); }return 0 ; }
@@ -453,12 +453,12 @@ static void pxa_gpio_resume(void)for_each_gpio_chip (gpio, c) {/* restore level with set/clear */ -__raw_writel ( c->saved_gplr, c->regbase +GPSR_OFFSET ); -__raw_writel (~c->saved_gplr, c->regbase +GPCR_OFFSET ); +writel_relaxed ( c->saved_gplr, c->regbase +GPSR_OFFSET ); +writel_relaxed (~c->saved_gplr, c->regbase +GPCR_OFFSET ); -__raw_writel (c->saved_grer, c->regbase +GRER_OFFSET ); -__raw_writel (c->saved_gfer, c->regbase +GFER_OFFSET ); -__raw_writel (c->saved_gpdr, c->regbase +GPDR_OFFSET ); +writel_relaxed (c->saved_grer, c->regbase +GRER_OFFSET ); +writel_relaxed (c->saved_gfer, c->regbase +GFER_OFFSET ); +writel_relaxed (c->saved_gpdr, c->regbase +GPDR_OFFSET ); } }#else
Signature · 1 line
1.7.4.1
PATCH v7 8/11 ARM: pxa: use generic gpio operation instead of gpio register
In reply to Haojian ZhuangRemove the code of accessing gpio register. Use the generic read operation instead.
--- arch/arm/mach-pxa/corgi_pm.c | 20 +++++++++++++++++--- arch/arm/mach-pxa/spitz_pm.c | 10 ++++++++-- 2 files changed, 25 insertions(+), 5 deletions(-)
arch/arm/mach-pxa/corgi_pm.c +17 -3
@@ -40,7 +40,9 @@ static struct gpio charger_gpios[] = { { CORGI_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" }, { CORGI_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" }, { CORGI_GPIO_CHRG_UKN, GPIOF_OUT_INIT_LOW, "Charger Unknown" }, + { CORGI_GPIO_AC_IN, GPIOF_IN, "Charger Detection" }, { CORGI_GPIO_KEY_INT, GPIOF_IN, "Key Interrupt" }, + { CORGI_GPIO_WAKEUP, GPIOF_IN, "System wakeup notification" }, };static void corgi_charger_init (void )
@@ -90,7 +92,12 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm) {int is_resume =0 ; -dev_dbg (sharpsl_pm.dev,"GPLR0 = %x,%x\n" ,GPLR0 ,PEDR ); +dev_dbg (sharpsl_pm.dev,"PEDR = %x, GPIO_AC_IN = %d, " +"GPIO_CHRG_FULL = %d, GPIO_KEY_INT = %d, GPIO_WAKEUP = %d\n" , +PEDR ,gpio_get_value (CORGI_GPIO_AC_IN ), +gpio_get_value (CORGI_GPIO_CHRG_FULL ), +gpio_get_value (CORGI_GPIO_KEY_INT ), +gpio_get_value (CORGI_GPIO_WAKEUP ));if ((PEDR &GPIO_bit (CORGI_GPIO_AC_IN ))) {if (sharpsl_pm.machinfo->read_devdata (SHARPSL_STATUS_ACIN )) {
@@ -124,14 +131,21 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm)static unsigned long corgi_charger_wakeup (void ) { -return ~GPLR0 & (GPIO_bit (CORGI_GPIO_AC_IN ) |GPIO_bit (CORGI_GPIO_KEY_INT ) |GPIO_bit (CORGI_GPIO_WAKEUP ) ); +unsigned long ret; + + ret = (!gpio_get_value (CORGI_GPIO_AC_IN ) <<GPIO_bit (CORGI_GPIO_AC_IN )) + | (!gpio_get_value (CORGI_GPIO_KEY_INT ) + <<GPIO_bit (CORGI_GPIO_KEY_INT )) + | (!gpio_get_value (CORGI_GPIO_WAKEUP ) + <<GPIO_bit (CORGI_GPIO_WAKEUP )); +return ret; }unsigned long corgipm_read_devdata (int type) {switch (type) {case SHARPSL_STATUS_ACIN : -return ((GPLR (CORGI_GPIO_AC_IN ) &GPIO_bit (CORGI_GPIO_AC_IN )) !=0 ); +return !gpio_get_value (CORGI_GPIO_AC_IN );case SHARPSL_STATUS_LOCK :return gpio_get_value (sharpsl_pm.machinfo->gpio_batlock);case SHARPSL_STATUS_CHRGFULL :
arch/arm/mach-pxa/spitz_pm.c +8 -2
@@ -41,6 +41,7 @@ static int spitz_last_ac_status;static struct gpio spitz_charger_gpios[] = { {SPITZ_GPIO_KEY_INT ,GPIOF_IN ,"Keyboard Interrupt" }, {SPITZ_GPIO_SYNC ,GPIOF_IN ,"Sync" }, + {SPITZ_GPIO_AC_IN ,GPIOF_IN ,"Charger Detection" }, {SPITZ_GPIO_ADC_TEMP_ON ,GPIOF_OUT_INIT_LOW ,"ADC Temp On" }, {SPITZ_GPIO_JK_B ,GPIOF_OUT_INIT_LOW ,"JK B" }, {SPITZ_GPIO_CHRG_ON ,GPIOF_OUT_INIT_LOW ,"Charger On" },
@@ -169,14 +170,19 @@ static int spitz_should_wakeup(unsigned int resume_on_alarm)static unsigned long spitz_charger_wakeup (void ) { -return (~GPLR0 &GPIO_bit (SPITZ_GPIO_KEY_INT )) | (GPLR0 &GPIO_bit (SPITZ_GPIO_SYNC )); +unsigned long ret; + ret = (!gpio_get_value (SPITZ_GPIO_KEY_INT ) + <<GPIO_bit (SPITZ_GPIO_KEY_INT )) + | (!gpio_get_value (SPITZ_GPIO_SYNC ) + <<GPIO_bit (SPITZ_GPIO_SYNC )); +return ret; }unsigned long spitzpm_read_devdata (int type) {switch (type) {case SHARPSL_STATUS_ACIN : -return (((~GPLR (SPITZ_GPIO_AC_IN )) &GPIO_bit (SPITZ_GPIO_AC_IN )) !=0 ); +return !gpio_get_value (SPITZ_GPIO_AC_IN );case SHARPSL_STATUS_LOCK :return gpio_get_value (sharpsl_pm.machinfo->gpio_batlock);case SHARPSL_STATUS_CHRGFULL :
Signature · 1 line
1.7.4.1
PATCH v7 9/11 ARM: pxa: change gpio to platform device
In reply to Haojian ZhuangRemove most gpio macros and change gpio driver to platform driver.
--- arch/arm/Kconfig | 2 + arch/arm/mach-mmp/aspenite.c | 1 + arch/arm/mach-mmp/avengers_lite.c | 1 + arch/arm/mach-mmp/brownstone.c | 1 + arch/arm/mach-mmp/flint.c | 1 + arch/arm/mach-mmp/gplugd.c | 1 + arch/arm/mach-mmp/include/mach/gpio-pxa.h | 29 ------ arch/arm/mach-mmp/include/mach/gpio.h | 3 +- arch/arm/mach-mmp/include/mach/mmp2.h | 2 + arch/arm/mach-mmp/include/mach/pxa168.h | 2 + arch/arm/mach-mmp/include/mach/pxa910.h | 2 + arch/arm/mach-mmp/mmp2.c | 28 ++++-- arch/arm/mach-mmp/pxa168.c | 29 ++++-- arch/arm/mach-mmp/pxa910.c | 29 ++++-- arch/arm/mach-mmp/tavorevb.c | 1 + arch/arm/mach-mmp/teton_bga.c | 1 + arch/arm/mach-mmp/ttc_dkb.c | 1 + arch/arm/mach-pxa/devices.c | 30 ++++++ arch/arm/mach-pxa/devices.h | 1 + arch/arm/mach-pxa/include/mach/gpio-pxa.h | 131 --------------------------- arch/arm/mach-pxa/include/mach/gpio.h | 5 +- arch/arm/mach-pxa/include/mach/idp.h | 2 - arch/arm/mach-pxa/include/mach/littleton.h | 2 - arch/arm/mach-pxa/irq.c | 3 +- arch/arm/mach-pxa/mfp-pxa2xx.c | 6 +- arch/arm/mach-pxa/pxa25x.c | 3 +- arch/arm/mach-pxa/pxa27x.c | 3 +- arch/arm/mach-pxa/pxa3xx.c | 6 +- arch/arm/mach-pxa/pxa95x.c | 3 +- arch/arm/plat-pxa/include/plat/gpio-pxa.h | 45 --------- drivers/gpio/Kconfig | 6 ++ drivers/gpio/Makefile | 2 +- drivers/gpio/gpio-pxa.c | 135 +++++++++++++++++++++++++-- include/linux/gpio-pxa.h | 16 ++++ 34 files changed, 271 insertions(+), 262 deletions(-) delete mode 100644 arch/arm/mach-mmp/include/mach/gpio-pxa.h delete mode 100644 arch/arm/mach-pxa/include/mach/gpio-pxa.h delete mode 100644 arch/arm/plat-pxa/include/plat/gpio-pxa.h create mode 100644 include/linux/gpio-pxa.h
arch/arm/Kconfig +2 -0
@@ -591,6 +591,7 @@ config ARCH_MMP select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS + select GPIO_PXA select HAVE_SCHED_CLOCK select TICK_ONESHOT select PLAT_PXA
@@ -673,6 +674,7 @@ config ARCH_PXA select CLKSRC_MMIO select ARCH_REQUIRE_GPIOLIB select GENERIC_CLOCKEVENTS + select GPIO_PXA select HAVE_SCHED_CLOCK select TICK_ONESHOT select PLAT_PXA
arch/arm/mach-mmp/aspenite.c +1 -0
@@ -231,6 +231,7 @@ static void __init common_init(void)pxa168_add_nand (&aspenite_nand_info);pxa168_add_fb (&aspenite_lcd_info);pxa168_add_keypad (&aspenite_keypad_info); +platform_device_register (&pxa168_device_gpio);/* off-chip devices */ platform_device_register (&smc91x_device);
arch/arm/mach-mmp/avengers_lite.c +1 -0
@@ -38,6 +38,7 @@ static void __init avengers_lite_init(void)/* on-chip devices */ pxa168_add_uart (2 ); +platform_device_register (&pxa168_device_gpio); }MACHINE_START (AVENGERS_LITE ,"PXA168 Avengers lite Development Platform" )
arch/arm/mach-mmp/brownstone.c +1 -0
@@ -202,6 +202,7 @@ static void __init brownstone_init(void)/* on-chip devices */ mmp2_add_uart (1 );mmp2_add_uart (3 ); +platform_device_register (&mmp2_device_gpio);mmp2_add_twsi (1 ,NULL ,ARRAY_AND_SIZE (brownstone_twsi1_info));mmp2_add_sdhost (0 , &mmp2_sdh_platdata_mmc0);/* SD/MMC */ mmp2_add_sdhost (2 , &mmp2_sdh_platdata_mmc2);/* eMMC */
arch/arm/mach-mmp/flint.c +1 -0
@@ -110,6 +110,7 @@ static void __init flint_init(void)/* on-chip devices */ mmp2_add_uart (1 );mmp2_add_uart (2 ); +platform_device_register (&mmp2_device_gpio);/* off-chip devices */ platform_device_register (&smc91x_device);
arch/arm/mach-mmp/gplugd.c +1 -0
@@ -184,6 +184,7 @@ static void __init gplugd_init(void)pxa168_add_uart (3 );pxa168_add_ssp (0 );pxa168_add_twsi (0 ,NULL ,ARRAY_AND_SIZE (gplugd_i2c_board_info)); +platform_device_register (&pxa168_device_gpio);pxa168_add_eth (&gplugd_eth_platform_data); }
arch/arm/mach-mmp/include/mach/gpio-pxa.h deleted +0 -29
@@ -1,29 +0,0 @@ -#ifndef __ASM_MACH_GPIO_PXA_H -#define __ASM_MACH_GPIO_PXA_H - -#include <mach/addr-map.h> -#include <mach/cputype.h> -#include <mach/irqs.h> - -#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000) - -#define BANK_OFF (n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) -#define GPIO_REG (x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x))) - -#define gpio_to_bank (gpio) ((gpio) >> 5) - -/* NOTE: these macros are defined here to make optimization of -* gpio_{get,set}_value() to work when 'gpio' is a constant. -* Usage of these macros otherwise is no longer recommended, -* use generic GPIO API whenever possible. -*/ -#define GPIO_bit (gpio) (1 << ((gpio) & 0x1f)) - -#define GPLR (x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x00) -#define GPDR (x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x0c) -#define GPSR (x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x18) -#define GPCR (x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x24) - -#include <plat/gpio-pxa.h> - -#endif /* __ASM_MACH_GPIO_PXA_H */
arch/arm/mach-mmp/include/mach/gpio.h +1 -2
@@ -3,7 +3,6 @@#include <asm-generic/gpio.h> -#define __gpio_is_inverted (gpio) (0) -#define __gpio_is_occupied (gpio) (0) +#include <mach/cputype.h> #endif /* __ASM_MACH_GPIO_H */
arch/arm/mach-mmp/include/mach/mmp2.h +2 -0
@@ -32,6 +32,8 @@ extern struct pxa_device_desc mmp2_device_sdh3;extern struct pxa_device_desc mmp2_device_asram;extern struct pxa_device_desc mmp2_device_isram; +extern struct platform_device mmp2_device_gpio; +static inline int mmp2_add_uart (int id) {struct pxa_device_desc *d =NULL ;
arch/arm/mach-mmp/include/mach/pxa168.h +2 -0
@@ -42,6 +42,8 @@ struct pxa168_usb_pdata {/* pdata can be NULL */ int __init pxa168_add_usb_host (struct pxa168_usb_pdata *pdata); +extern struct platform_device pxa168_device_gpio; +static inline int pxa168_add_uart (int id) {struct pxa_device_desc *d =NULL ;
arch/arm/mach-mmp/include/mach/pxa910.h +2 -0
@@ -21,6 +21,8 @@ extern struct pxa_device_desc pxa910_device_pwm3;extern struct pxa_device_desc pxa910_device_pwm4;extern struct pxa_device_desc pxa910_device_nand; +extern struct platform_device pxa910_device_gpio; +static inline int pxa910_add_uart (int id) {struct pxa_device_desc *d =NULL ;
arch/arm/mach-mmp/mmp2.c +19 -9
@@ -13,6 +13,7 @@#include <linux/kernel.h> #include <linux/init.h> #include <linux/io.h> +#include <linux/platform_device.h> #include <asm/hardware/cache-tauros2.h>
@@ -24,7 +25,6 @@#include <mach/irqs.h> #include <mach/dma.h> #include <mach/mfp.h> -#include <mach/gpio-pxa.h> #include <mach/devices.h> #include <mach/mmp2.h>
@@ -33,8 +33,6 @@#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000) -#define APMASK (i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x9c) -static struct mfp_addr_map mmp2_addr_map[]__initdata = {MFP_ADDR_X (GPIO0 ,GPIO58 ,0x54 ),
@@ -101,12 +99,6 @@ static void __init mmp2_init_gpio(void)/* enable GPIO clock */ __raw_writel (APBC_APBCLK |APBC_FNCLK ,APBC_MMP2_GPIO ); - -/* unmask GPIO edge detection for all 6 banks -- APMASKx */ -for (i =0 ; i <6 ; i++) -__raw_writel (0xffffffff ,APMASK (i)); - -pxa_init_gpio (IRQ_MMP2_GPIO ,0 ,167 ,NULL ); }void __init mmp2_init_irq (void )
@@ -230,3 +222,21 @@ MMP2_DEVICE(asram, "asram", -1, NONE, 0xe0000000, 0x4000);/* 0xd1000000 ~ 0xd101ffff is reserved for secure processor */ MMP2_DEVICE (isram,"isram" ,-1 ,NONE ,0xd1020000 ,0x18000 ); +struct resource mmp2_resource_gpio[] = { + { + .start =0xd4019000 , + .end =0xd4019fff , + .flags =IORESOURCE_MEM , + }, { + .start =IRQ_MMP2_GPIO , + .end =IRQ_MMP2_GPIO , + .flags =IORESOURCE_IRQ , + }, +}; + +struct platform_device mmp2_device_gpio = { + .name ="pxa-gpio" , + .id =-1 , + .num_resources =ARRAY_SIZE (mmp2_resource_gpio), + .resource = mmp2_resource_gpio, +};
arch/arm/mach-mmp/pxa168.c +20 -9
@@ -13,6 +13,7 @@#include <linux/list.h> #include <linux/io.h> #include <linux/clk.h> +#include <linux/platform_device.h> #include <asm/mach/time.h> #include <mach/addr-map.h>
@@ -20,7 +21,6 @@#include <mach/regs-apbc.h> #include <mach/regs-apmu.h> #include <mach/irqs.h> -#include <mach/gpio-pxa.h> #include <mach/dma.h> #include <mach/devices.h> #include <mach/mfp.h>
@@ -43,20 +43,12 @@ static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata = MFP_ADDR_END, }; -#define APMASK (i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c) -static void __init pxa168_init_gpio (void ) {int i;/* enable GPIO clock */ __raw_writel (APBC_APBCLK |APBC_FNCLK ,APBC_PXA168_GPIO ); - -/* unmask GPIO edge detection for all 4 banks - APMASKx */ -for (i =0 ; i <4 ; i++) -__raw_writel (0xffffffff ,APMASK (i)); - -pxa_init_gpio (IRQ_PXA168_GPIOX ,0 ,127 ,NULL ); }void __init pxa168_init_irq (void )
@@ -174,6 +166,25 @@ PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);PXA168_DEVICE (keypad,"pxa27x-keypad" ,-1 ,KEYPAD ,0xd4012000 ,0x4c );PXA168_DEVICE (eth,"pxa168-eth" ,-1 ,MFU ,0xc0800000 ,0x0fff ); +struct resource pxa168_resource_gpio[] = { + { + .start =0xd4019000 , + .end =0xd4019fff , + .flags =IORESOURCE_MEM , + }, { + .start =IRQ_PXA168_GPIOX , + .end =IRQ_PXA168_GPIOX , + .flags =IORESOURCE_IRQ , + }, +}; + +struct platform_device pxa168_device_gpio = { + .name ="pxa-gpio" , + .id =-1 , + .num_resources =ARRAY_SIZE (pxa168_resource_gpio), + .resource = pxa168_resource_gpio, +}; +struct resource pxa168_usb_host_resources[] = {/* USB Host conroller register base */ [0 ] = {
arch/arm/mach-mmp/pxa910.c +20 -9
@@ -12,6 +12,7 @@#include <linux/init.h> #include <linux/list.h> #include <linux/io.h> +#include <linux/platform_device.h> #include <asm/mach/time.h> #include <mach/addr-map.h>
@@ -19,7 +20,6 @@#include <mach/regs-apmu.h> #include <mach/cputype.h> #include <mach/irqs.h> -#include <mach/gpio-pxa.h> #include <mach/dma.h> #include <mach/mfp.h> #include <mach/devices.h>
@@ -77,20 +77,12 @@ static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata = MFP_ADDR_END, }; -#define APMASK (i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c) -static void __init pxa910_init_gpio (void ) {int i;/* enable GPIO clock */ __raw_writel (APBC_APBCLK |APBC_FNCLK ,APBC_PXA910_GPIO ); - -/* unmask GPIO edge detection for all 4 banks - APMASKx */ -for (i =0 ; i <4 ; i++) -__raw_writel (0xffffffff ,APMASK (i)); - -pxa_init_gpio (IRQ_PXA910_AP_GPIO ,0 ,127 ,NULL ); }void __init pxa910_init_irq (void )
@@ -179,3 +171,22 @@ PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);PXA910_DEVICE (pwm3,"pxa910-pwm" ,2 ,NONE ,0xd401a800 ,0x10 );PXA910_DEVICE (pwm4,"pxa910-pwm" ,3 ,NONE ,0xd401ac00 ,0x10 );PXA910_DEVICE (nand,"pxa3xx-nand" ,-1 ,NAND ,0xd4283000 ,0x80 ,97 ,99 ); + +struct resource pxa910_resource_gpio[] = { + { + .start =0xd4019000 , + .end =0xd4019fff , + .flags =IORESOURCE_MEM , + }, { + .start =IRQ_PXA910_AP_GPIO , + .end =IRQ_PXA910_AP_GPIO , + .flags =IORESOURCE_IRQ , + }, +}; + +struct platform_device pxa910_device_gpio = { + .name ="pxa-gpio" , + .id =-1 , + .num_resources =ARRAY_SIZE (pxa910_resource_gpio), + .resource = pxa910_resource_gpio, +};
arch/arm/mach-mmp/tavorevb.c +1 -0
@@ -94,6 +94,7 @@ static void __init tavorevb_init(void)/* on-chip devices */ pxa910_add_uart (1 ); +platform_device_register (&pxa910_device_gpio);/* off-chip devices */ platform_device_register (&smc91x_device);
arch/arm/mach-mmp/teton_bga.c +1 -0
@@ -78,6 +78,7 @@ static void __init teton_bga_init(void)pxa168_add_uart (1 );pxa168_add_keypad (&teton_bga_keypad_info);pxa168_add_twsi (0 ,NULL ,ARRAY_AND_SIZE (teton_bga_i2c_info)); +platform_device_register (&pxa168_device_gpio); }MACHINE_START (TETON_BGA ,"PXA168-based Teton BGA Development Platform" )
arch/arm/mach-mmp/ttc_dkb.c +1 -0
@@ -123,6 +123,7 @@ static struct platform_device ttc_dkb_device_onenand = { };static struct platform_device *ttc_dkb_devices[] = { + &pxa910_device_gpio, &ttc_dkb_device_onenand, };
arch/arm/mach-pxa/devices.c +30 -0
@@ -1051,6 +1051,36 @@ struct platform_device pxa3xx_device_ssp4 = { };#endif /* CONFIG_PXA3xx || CONFIG_PXA95x */ +struct resource pxa_resource_gpio[] = { + { + .start =0x40e00000 , + .end =0x40e0ffff , + .flags =IORESOURCE_MEM , + }, { + .start =IRQ_GPIO0 , + .end =IRQ_GPIO0 , + .name ="gpio0" , + .flags =IORESOURCE_IRQ , + }, { + .start =IRQ_GPIO1 , + .end =IRQ_GPIO1 , + .name ="gpio1" , + .flags =IORESOURCE_IRQ , + }, { + .start = IRQ_GPIO_2_x, + .end = IRQ_GPIO_2_x, + .name ="gpio_mux" , + .flags =IORESOURCE_IRQ , + }, +}; + +struct platform_device pxa_device_gpio = { + .name ="pxa-gpio" , + .id =-1 , + .num_resources =ARRAY_SIZE (pxa_resource_gpio), + .resource = pxa_resource_gpio, +}; +/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1. * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */ void __init pxa2xx_set_spi_info (unsigned id,struct pxa2xx_spi_master *info)
arch/arm/mach-pxa/devices.h +1 -0
@@ -16,6 +16,7 @@ extern struct platform_device pxa_device_ficp;extern struct platform_device sa1100_device_rtc;extern struct platform_device pxa_device_rtc;extern struct platform_device pxa_device_ac97; +extern struct platform_device pxa_device_gpio;extern struct platform_device pxa27x_device_i2c_power;extern struct platform_device pxa27x_device_ohci;
arch/arm/mach-pxa/include/mach/gpio-pxa.h deleted +0 -131
131 lines not on this page · raw message
arch/arm/mach-pxa/include/mach/gpio.h +3 -2
@@ -25,7 +25,8 @@#define __ASM_ARCH_PXA_GPIO_H#include <asm-generic/gpio.h> -/* The defines for the driver are needed for the accelerated accessors */ -#include "gpio-pxa.h" + +#include <mach/irqs.h> +#include <mach/hardware.h> #endif
arch/arm/mach-pxa/include/mach/idp.h +0 -2
@@ -131,8 +131,6 @@#define PCC_VS2 (1 << 1)#define PCC_VS1 (1 << 0) -#define PCC_DETECT (x) (GPLR(7 + (x)) & GPIO_bit(7 + (x))) -/* A listing of interrupts used by external hardware devices */ #define TOUCH_PANEL_IRQ PXA_GPIO_TO_IRQ(5)
arch/arm/mach-pxa/include/mach/littleton.h +0 -2
@@ -1,8 +1,6 @@#ifndef __ASM_ARCH_LITTLETON_H#define __ASM_ARCH_LITTLETON_H -#include <mach/gpio-pxa.h> -#define LITTLETON_ETH_PHYS 0x30000000#define LITTLETON_GPIO_LCD_CS (17)
arch/arm/mach-pxa/irq.c +1 -2
@@ -22,7 +22,6 @@#include <mach/hardware.h> #include <mach/irqs.h> -#include <mach/gpio-pxa.h> #include "generic.h"
@@ -122,7 +121,7 @@ asmlinkage void __exception_irq_entry ichp_handle_irq(struct pt_regs *regs) }while (1 ); } -void __init pxa_init_irq (int irq_nr,set_wake_t fn) +void __init pxa_init_irq (int irq_nr,int (*fn)(struct irq_data *,unsigned int )) {int irq, i, n;
arch/arm/mach-pxa/mfp-pxa2xx.c +5 -1
@@ -13,6 +13,7 @@* published by the Free Software Foundation. */ #include <linux/gpio.h> +#include <linux/gpio-pxa.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h>
@@ -20,7 +21,6 @@#include <mach/pxa2xx-regs.h> #include <mach/mfp-pxa2xx.h> -#include <mach/gpio-pxa.h> #include "generic.h"
@@ -29,6 +29,10 @@#define GAFR_L (x) __GAFR(0, x)#define GAFR_U (x) __GAFR(1, x) +#define BANK_OFF (n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) +#define GPLR (x) __REG2(0x40E00000, BANK_OFF((x) >> 5)) +#define GPDR (x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c) +#define PWER_WE35 (1 << 24)struct gpio_desc {
arch/arm/mach-pxa/pxa25x.c +1 -2
@@ -17,6 +17,7 @@* need be. */ #include <linux/gpio.h> +#include <linux/gpio-pxa.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h>
@@ -312,14 +313,12 @@ set_pwer:void __init pxa25x_init_irq (void ) {pxa_init_irq (32 , pxa25x_set_wake); -pxa_init_gpio (IRQ_GPIO_2_x,2 ,84 , pxa25x_set_wake); }#ifdef CONFIG_CPU_PXA26xvoid __init pxa26x_init_irq (void ) {pxa_init_irq (32 , pxa25x_set_wake); -pxa_init_gpio (IRQ_GPIO_2_x,2 ,89 , pxa25x_set_wake); }#endif
arch/arm/mach-pxa/pxa27x.c +2 -1
@@ -12,6 +12,7 @@* published by the Free Software Foundation. */ #include <linux/gpio.h> +#include <linux/gpio-pxa.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h>
@@ -386,7 +387,6 @@ static int pxa27x_set_wake(struct irq_data *d, unsigned int on)void __init pxa27x_init_irq (void ) {pxa_init_irq (34 , pxa27x_set_wake); -pxa_init_gpio (IRQ_GPIO_2_x,2 ,120 , pxa27x_set_wake); }static struct map_desc pxa27x_io_desc[]__initdata = {
@@ -422,6 +422,7 @@ void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info) }static struct platform_device *devices[]__initdata = { + &pxa_device_gpio, &pxa27x_device_udc, &pxa_device_pmu, &pxa_device_i2s,
arch/arm/mach-pxa/pxa3xx.c +3 -3
@@ -25,7 +25,6 @@#include <asm/mach/map.h> #include <asm/suspend.h> #include <mach/hardware.h> -#include <mach/gpio-pxa.h> #include <mach/pxa3xx-regs.h> #include <mach/reset.h> #include <mach/ohci.h>
@@ -365,7 +364,8 @@ static struct irq_chip pxa_ext_wakeup_chip = { .irq_set_type = pxa_set_ext_wakeup_type, }; -static void __init pxa_init_ext_wakeup_irq (set_wake_t fn) +static void __init pxa_init_ext_wakeup_irq (int (*fn)(struct irq_data *, +unsigned int )) {int irq;
@@ -388,7 +388,6 @@ void __init pxa3xx_init_irq(void)pxa_init_irq (56 , pxa3xx_set_wake);pxa_init_ext_wakeup_irq (pxa3xx_set_wake); -pxa_init_gpio (IRQ_GPIO_2_x,2 ,127 ,NULL ); }static struct map_desc pxa3xx_io_desc[]__initdata = {
@@ -417,6 +416,7 @@ void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info) }static struct platform_device *devices[]__initdata = { + &pxa_device_gpio, &pxa27x_device_udc, &pxa_device_pmu, &pxa_device_i2s,
arch/arm/mach-pxa/pxa95x.c +1 -2
@@ -20,7 +20,6 @@#include <linux/syscore_ops.h> #include <mach/hardware.h> -#include <mach/gpio-pxa.h> #include <mach/pxa3xx-regs.h> #include <mach/pxa930.h> #include <mach/reset.h>
@@ -235,7 +234,6 @@ static struct clk_lookup pxa95x_clkregs[] = {void __init pxa95x_init_irq (void ) {pxa_init_irq (96 ,NULL ); -pxa_init_gpio (IRQ_GPIO_2_x,2 ,127 ,NULL ); }/*
@@ -248,6 +246,7 @@ void __init pxa95x_set_i2c_power_info(struct i2c_pxa_platform_data *info) }static struct platform_device *devices[]__initdata = { + &pxa_device_gpio, &sa1100_device_rtc, &pxa_device_rtc, &pxa27x_device_ssp1,
arch/arm/plat-pxa/include/plat/gpio-pxa.h deleted +0 -45
45 lines not on this page · raw message
drivers/gpio/Kconfig +6 -0
@@ -141,6 +141,12 @@ config GPIO_PL061 help Say yes here to support the PrimeCell PL061 GPIO device +config GPIO_PXA + bool "PXA GPIO support" + depends on ARCH_PXA || ARCH_MMP + help + Say yes here to support the PXA GPIO device + config GPIO_XILINX bool "Xilinx GPIO support" depends on PPC_OF || MICROBLAZE
drivers/gpio/Makefile +1 -1
@@ -40,7 +40,7 @@ obj-$(CONFIG_GPIO_PCA953X) += gpio-pca953x.o obj-$(CONFIG_GPIO_PCF857X) += gpio-pcf857x.o obj-$(CONFIG_GPIO_PCH) += gpio-pch.o obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o -obj-$(CONFIG_PLAT_PXA) += gpio-pxa.o +obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o obj-$(CONFIG_PLAT_SAMSUNG) += gpio-samsung.o obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o
drivers/gpio/gpio-pxa.c +125 -10
200 lines not on this page · raw message
include/linux/gpio-pxa.h new file +16 -0
@@ -0,0 +1,16 @@ +#ifndef __GPIO_PXA_H +#define __GPIO_PXA_H + +#define GPIO_bit (x) (1 << ((x) & 0x1f)) + +#define gpio_to_bank (gpio) ((gpio) >> 5) + +/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85). +* Those cases currently cause holes in the GPIO number space, the +* actual number of the last GPIO is recorded by 'pxa_last_gpio'. +*/ +extern int pxa_last_gpio; + +extern int pxa_irq_to_gpio (int irq); + +#endif /* __GPIO_PXA_H */
Signature · 1 line
1.7.4.1
PATCH v7 9/11 ARM: pxa: change gpio to platform device
Hi Haojian,
Quoted 3 lines · Haojian Zhuang
Remove most gpio macros and change gpio driver to platform driver.
Signed-off-by Haojian Zhuang <[email protected]>
Please could you help me understand how this patch (which was merged in 3.2) relates to mach-mmp's use of gpio-pxa? The patch changes pxa_gpio_probe() to check for gpio0/gpio1/gpio_mux in platform data:
[..]
Quoted 8 lines
drivers/gpio/gpio-pxa.c +3
-0+static int __devinit pxa_gpio_probe (struct platform_device *pdev) {struct pxa_gpio_chip *c; +struct resource *res;int gpio, irq; +int irq0 =0 , irq1 =0 , irq_mux, gpio_offset =0 ; pxa_last_gpio =pxa_gpio_nums ();
drivers/gpio/gpio-pxa.c static int pxa_gpio_nums(void) · line 480
Quoted 10 lines
drivers/gpio/gpio-pxa.c +8
-1if (!pxa_last_gpio) -return ; +return -EINVAL ; + + irq0 =platform_get_irq_byname (pdev,"gpio0" ); + irq1 =platform_get_irq_byname (pdev,"gpio1" ); + irq_mux =platform_get_irq_byname (pdev,"gpio_mux" ); +if ((irq0 >0 && irq1 <=0 ) || (irq0 <=0 && irq1 >0 ) + || (irq_mux <=0 )) +return -EINVAL ;
But the patch only adds these resources to arch/arm/mach-pxa/devices.c:
[..]
Quoted 27 lines
arch/arm/mach-pxa/devices.c +19
-0@@ -1051,6 +1051,36 @@ struct platform_device pxa3xx_device_ssp4 = { };#endif /* CONFIG_PXA3xx || CONFIG_PXA95x */ +struct resource pxa_resource_gpio[] = { + { + .start =0x40e00000 , + .end =0x40e0ffff , + .flags =IORESOURCE_MEM , + }, { + .start =IRQ_GPIO0 , + .end =IRQ_GPIO0 , + .name ="gpio0" , + .flags =IORESOURCE_IRQ , + }, { + .start =IRQ_GPIO1 , + .end =IRQ_GPIO1 , + .name ="gpio1" , + .flags =IORESOURCE_IRQ , + }, { + .start = IRQ_GPIO_2_x, + .end = IRQ_GPIO_2_x, + .name ="gpio_mux" ,
arch/arm/mach-pxa/devices.c struct platform_device pxa3xx_device_ssp4 = { · line 1082
Quoted 10 lines
arch/arm/mach-pxa/devices.c +10
-0+ .flags = IORESOURCE_IRQ, + }, +}; + +struct platform_device pxa_device_gpio = { + .name ="pxa-gpio" , + .id =-1 , + .num_resources =ARRAY_SIZE (pxa_resource_gpio), + .resource = pxa_resource_gpio, +};
and not anywhere under arch/arm/mach-mmp, which means that when we look for these names on a mach-mmp device (in my case, OLPC XO-1.75/MMP2), we hit the "return -EINVAL" above due to the missing platform resources. Using gpio-pxa on mach-mmp devices worked fine on kernels before 3.2.
How is this supposed to work for mach-mmp boards?
Thanks,
- Chris.
Signature · 2 lines
Chris Ball <[email protected]> <http://printf.net/> One Laptop Per Child
PATCH v7 9/11 ARM: pxa: change gpio to platform device
Hi Haojian,
Quoted 5 lines · Chris Ball
Quoted 3 lines · Haojian Zhuang
Remove most gpio macros and change gpio driver to platform driver.
Signed-off-by Haojian Zhuang <[email protected]>
Quoted 10 lines
Please could you help me understand how this patch (which was merged in 3.2) relates to mach-mmp's use of gpio-pxa? The patch changes
pxa_gpio_probe()to check for gpio0/gpio1/gpio_mux in platform data:
[..]
But the patch only adds these resources toarch/arm/mach-pxa/devices.c:
[..]
and not anywhere underarch/arm/mach-mmp, which means that when we look for these names on a mach-mmp device (in my case, OLPC XO-1.75/MMP2), we hit the "return-EINVAL" above due to the missing platform resources. Using gpio-pxa on mach-mmp devices worked fine on kernels before 3.2.
Ah, I eventually found your "ARM: mmp: append irq name of gpio device" patch, which was merged in 3.4-rc1 and fixes gpio-pxa on mach-mmp. I think this patch should go to stable@, since the regression is still unfixed in 3.2 and 3.3.
Thanks,
- Chris.
Signature · 2 lines
Chris Ball <[email protected]> <http://printf.net/> One Laptop Per Child
Haojian Zhuang
maintainerPATCH v7 9/11 ARM: pxa: change gpio to platform device
Quoted 19 lines · Chris Ball
Hi Haojian,
Quoted 5 lines · Chris Ball
Quoted 3 lines · Haojian Zhuang
Remove most gpio macros and change gpio driver to platform driver.
Signed-off-by Haojian Zhuang <[email protected]>Quoted 10 lines
Please could you help me understand how this patch (which was merged in 3.2) relates to mach-mmp's use of gpio-pxa? ?The patch changes
pxa_gpio_probe()to check for gpio0/gpio1/gpio_mux in platform data:
[..]
But the patch only adds these resources toarch/arm/mach-pxa/devices.c:
[..]
and not anywhere underarch/arm/mach-mmp, which means that when we look for these names on a mach-mmp device (in my case, OLPC XO-1.75/MMP2), we hit the "return-EINVAL" above due to the missing platform resources. Using gpio-pxa on mach-mmp devices worked fine on kernels before 3.2.
Quoted 5 lines
Ah, I eventually found your "ARM: mmp: append irq name of gpio device" patch, which was merged in 3.4-rc1 and fixes gpio-pxa on mach-mmp. I think this patch should go to stable@, since the regression is still unfixed in 3.2 and 3.3.
Who or which mailing list should I cc for this fix on 3.2 and 3.3?
Best Regards
Haojian
PATCH v7 9/11 ARM: pxa: change gpio to platform device
Hi,
Quoted 6 lines · Haojian Zhuang
Quoted 5 lines
Ah, I eventually found your "ARM: mmp: append irq name of gpio device" patch, which was merged in 3.4-rc1 and fixes gpio-pxa on mach-mmp. I think this patch should go to stable@, since the regression is still unfixed in 3.2 and 3.3.
Who or which mailing list should I cc for this fix on 3.2 and 3.3?
For how to get patches included in stable releases, see Documentation/stable_kernel_rules.txt:
Procedure for submitting patches to the -stable tree:
- Send the patch, after verifying that it follows the above rules, to stable at vger.kernel.org. You must note the upstream commit ID in the changelog of your submission, as well as the kernel version you wish it to be applied to.
Thanks,
- Chris.
Signature · 2 lines
Chris Ball <[email protected]> <http://printf.net/> One Laptop Per Child
PATCH v7 10/11 ARM: mmp: clear gpio edge detect
In reply to Haojian ZhuangAppend code to clear gpio edge detect in gpio-pxa driver.
--- drivers/gpio/gpio-pxa.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)
drivers/gpio/gpio-pxa.c +4 -0
@@ -46,6 +46,7 @@#define GFER_OFFSET 0x3C#define GEDR_OFFSET 0x48#define GAFR_OFFSET 0x54 +#define ED_MASK_OFFSET 0x9C/* GPIO edge detection for AP side */ #define BANK_OFF (n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
@@ -496,6 +497,9 @@ static int __devinit pxa_gpio_probe(struct platform_device *pdev)writel_relaxed (0 , c->regbase +GFER_OFFSET );writel_relaxed (0 , c->regbase +GRER_OFFSET );writel_relaxed (~0 ,c->regbase +GEDR_OFFSET ); +/* unmask GPIO edge detect for AP side */ +if (gpio_is_mmp_type (gpio_type)) +writel_relaxed (~0 , c->regbase +ED_MASK_OFFSET ); }#ifdef CONFIG_ARCH_PXA
Signature · 1 line
1.7.4.1
PATCH v7 11/11 ARM: pxa: add clk support in gpio driver
In reply to Haojian ZhuangSupport clk in gpio driver. There's no gpio clock in PXA25x and PXA27x. So use dummy clk instead. And move the gpio edge initialization into gpio driver for arch-mmp.
--- arch/arm/mach-mmp/mmp2.c | 11 ++--------- arch/arm/mach-mmp/pxa168.c | 11 ++--------- arch/arm/mach-mmp/pxa910.c | 11 ++--------- arch/arm/mach-pxa/pxa25x.c | 1 + arch/arm/mach-pxa/pxa27x.c | 1 + arch/arm/mach-pxa/pxa3xx.c | 2 ++ arch/arm/mach-pxa/pxa95x.c | 2 ++ drivers/gpio/gpio-pxa.c | 26 +++++++++++++++++++++++++- 8 files changed, 37 insertions(+), 28 deletions(-)
arch/arm/mach-mmp/mmp2.c +2 -9
@@ -93,18 +93,9 @@ void mmp2_clear_pmic_int(void)__raw_writel (data, mfpr_pmic); } -static void __init mmp2_init_gpio (void ) -{ -int i; - -/* enable GPIO clock */ -__raw_writel (APBC_APBCLK |APBC_FNCLK ,APBC_MMP2_GPIO ); -} -void __init mmp2_init_irq (void ) {mmp2_init_icu (); -mmp2_init_gpio (); }static void sdhc_clk_enable (struct clk *clk)
@@ -141,6 +132,7 @@ static APBC_CLK(twsi3, MMP2_TWSI3, 0, 26000000); static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000); static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000); static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000); +static APBC_CLK(gpio, MMP2_GPIO, 0, 26000000); static APMU_CLK(nand, NAND, 0xbf, 100000000); static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops);
@@ -160,6 +152,7 @@ static struct clk_lookup mmp2_clkregs[] = {INIT_CLKREG (&clk_twsi5,"pxa2xx-i2c.4" ,NULL ),INIT_CLKREG (&clk_twsi6,"pxa2xx-i2c.5" ,NULL ),INIT_CLKREG (&clk_nand,"pxa3xx-nand" ,NULL ), +INIT_CLKREG (&clk_gpio,"pxa-gpio" ,NULL ),INIT_CLKREG (&clk_sdh0,"sdhci-pxav3.0" ,"PXA-SDHCLK" ),INIT_CLKREG (&clk_sdh1,"sdhci-pxav3.1" ,"PXA-SDHCLK" ), INIT_CLKREG(&clk_sdh2, "sdhci-pxav3.2", "PXA-SDHCLK"),
arch/arm/mach-mmp/pxa168.c +2 -9
@@ -43,18 +43,9 @@ static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata = MFP_ADDR_END, }; -static void __init pxa168_init_gpio (void ) -{ -int i; - -/* enable GPIO clock */ -__raw_writel (APBC_APBCLK |APBC_FNCLK ,APBC_PXA168_GPIO ); -} -void __init pxa168_init_irq (void ) {icu_init_irq (); -pxa168_init_gpio (); }/* APB peripheral clocks */
@@ -72,6 +63,7 @@ static APBC_CLK(ssp2, PXA168_SSP2, 4, 0); static APBC_CLK(ssp3, PXA168_SSP3, 4, 0); static APBC_CLK(ssp4, PXA168_SSP4, 4, 0); static APBC_CLK(ssp5, PXA168_SSP5, 4, 0); +static APBC_CLK(gpio, PXA168_GPIO, 0, 13000000); static APBC_CLK(keypad, PXA168_KPC, 0, 32000); static APMU_CLK(nand, NAND, 0x19b, 156000000);
@@ -97,6 +89,7 @@ static struct clk_lookup pxa168_clkregs[] = {INIT_CLKREG (&clk_ssp5,"pxa168-ssp.4" ,NULL ),INIT_CLKREG (&clk_nand,"pxa3xx-nand" ,NULL ),INIT_CLKREG (&clk_lcd,"pxa168-fb" ,NULL ), +INIT_CLKREG (&clk_gpio,"pxa-gpio" ,NULL ),INIT_CLKREG (&clk_keypad,"pxa27x-keypad" ,NULL ),INIT_CLKREG (&clk_eth,"pxa168-eth" ,"MFUCLK" ), INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"),
arch/arm/mach-mmp/pxa910.c +2 -9
@@ -77,18 +77,9 @@ static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata = MFP_ADDR_END, }; -static void __init pxa910_init_gpio (void ) -{ -int i; - -/* enable GPIO clock */ -__raw_writel (APBC_APBCLK |APBC_FNCLK ,APBC_PXA910_GPIO ); -} -void __init pxa910_init_irq (void ) {icu_init_irq (); -pxa910_init_gpio (); }/* APB peripheral clocks */
@@ -100,6 +91,7 @@ static APBC_CLK(pwm1, PXA910_PWM1, 1, 13000000); static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000); static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000); static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000); +static APBC_CLK(gpio, PXA910_GPIO, 0, 13000000); static APMU_CLK(nand, NAND, 0x19b, 156000000); static APMU_CLK(u2o, USB, 0x1b, 480000000);
@@ -115,6 +107,7 @@ static struct clk_lookup pxa910_clkregs[] = {INIT_CLKREG (&clk_pwm3,"pxa910-pwm.2" ,NULL ),INIT_CLKREG (&clk_pwm4,"pxa910-pwm.3" ,NULL ),INIT_CLKREG (&clk_nand,"pxa3xx-nand" ,NULL ), +INIT_CLKREG (&clk_gpio,"pxa-gpio" ,NULL ), INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"), };
arch/arm/mach-pxa/pxa25x.c +1 -0
@@ -209,6 +209,7 @@ static struct clk_lookup pxa25x_clkregs[] = {INIT_CLKREG (&clk_pxa25x_gpio11,NULL ,"GPIO11_CLK" ),INIT_CLKREG (&clk_pxa25x_gpio12,NULL ,"GPIO12_CLK" ),INIT_CLKREG (&clk_pxa25x_mem,"pxa2xx-pcmcia" ,NULL ), + INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL), }; static struct clk_lookup pxa25x_hwuart_clkreg =
arch/arm/mach-pxa/pxa27x.c +1 -0
@@ -230,6 +230,7 @@ static struct clk_lookup pxa27x_clkregs[] = {INIT_CLKREG (&clk_pxa27x_im,NULL ,"IMCLK" ),INIT_CLKREG (&clk_pxa27x_memc,NULL ,"MEMCLK" ),INIT_CLKREG (&clk_pxa27x_mem,"pxa2xx-pcmcia" ,NULL ), + INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL), };#ifdef CONFIG_PM
arch/arm/mach-pxa/pxa3xx.c +2 -0
@@ -55,6 +55,7 @@ static DEFINE_PXA3_CKEN(pxa3xx_pwm0, PWM0, 13000000, 0); static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0); static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0); static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0); +static DEFINE_PXA3_CKEN(pxa3xx_gpio, GPIO, 13000000, 0); static DEFINE_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops); static DEFINE_CK(pxa3xx_smemc, SMC, &clk_pxa3xx_smemc_ops);
@@ -87,6 +88,7 @@ static struct clk_lookup pxa3xx_clkregs[] = {INIT_CLKREG (&clk_pxa3xx_mmc1,"pxa2xx-mci.0" ,NULL ),INIT_CLKREG (&clk_pxa3xx_mmc2,"pxa2xx-mci.1" ,NULL ),INIT_CLKREG (&clk_pxa3xx_smemc,"pxa2xx-pcmcia" ,NULL ), + INIT_CLKREG(&clk_pxa3xx_gpio, "pxa-gpio", NULL), };#ifdef CONFIG_PM
arch/arm/mach-pxa/pxa95x.c +2 -0
@@ -211,6 +211,7 @@ static DEFINE_PXA3_CKEN(pxa95x_ssp3, SSP3, 13000000, 0); static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0); static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0); static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0); +static DEFINE_PXA3_CKEN(pxa95x_gpio, GPIO, 13000000, 0);static struct clk_lookup pxa95x_clkregs[] = {INIT_CLKREG (&clk_pxa95x_pout,NULL ,"CLK_POUT" ),
@@ -229,6 +230,7 @@ static struct clk_lookup pxa95x_clkregs[] = {INIT_CLKREG (&clk_pxa95x_ssp4,"pxa27x-ssp.3" ,NULL ),INIT_CLKREG (&clk_pxa95x_pwm0,"pxa27x-pwm.0" ,NULL ),INIT_CLKREG (&clk_pxa95x_pwm1,"pxa27x-pwm.1" ,NULL ), + INIT_CLKREG(&clk_pxa95x_gpio, "pxa-gpio", NULL), };void __init pxa95x_init_irq (void )
drivers/gpio/gpio-pxa.c +25 -1
@@ -11,6 +11,8 @@* it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ +#include <linux/clk.h> +#include <linux/err.h> #include <linux/gpio.h> #include <linux/gpio-pxa.h> #include <linux/init.h>
@@ -466,7 +468,8 @@ static int __devinit pxa_gpio_probe(struct platform_device *pdev) {struct pxa_gpio_chip *c;struct resource *res; -int gpio, irq; +struct clk *clk; +int gpio, irq, ret;int irq0 =0 , irq1 =0 , irq_mux, gpio_offset =0 ; pxa_last_gpio =pxa_gpio_nums ();
@@ -489,6 +492,27 @@ static int __devinit pxa_gpio_probe(struct platform_device *pdev)if (irq0 >0 ) gpio_offset =2 ; + clk =clk_get (&pdev->dev,NULL ); +if (IS_ERR (clk)) { +dev_err (&pdev->dev,"Error %ld to get gpio clock\n" , +PTR_ERR (clk)); +iounmap (gpio_reg_base); +return PTR_ERR (clk); + } + ret =clk_prepare (clk); +if (ret) { +clk_put (clk); +iounmap (gpio_reg_base); +return ret; + } + ret =clk_enable (clk); +if (ret) { +clk_unprepare (clk); +clk_put (clk); +iounmap (gpio_reg_base); +return ret; + } +/* Initialize GPIO chips */ pxa_init_gpio_chip (pxa_last_gpio);
Signature · 1 line
1.7.4.1
v7 cover change pxa gpio to platform driver
In reply to Haojian ZhuangQuoted 18 lines · Haojian Zhuang
Changelog
v7:
1. addclk_prepare()support ingpio-pxa.c.
v6:
1. fix build issue in pxa910 since building gpio failure is found in mainline.
2. merge two dependant patches (original v5 0005 and 0006) together.
3. fix gpio bit issue in corgi and spitz.
4. replaceprintk()withdev_errin clk patch.
v5:
1. use generic gpio driver. So cleangpio-pxa.handgpio-pxa.cagain.
v4:
1. append one patch for clean gpio macros and use function instead.
v3:
1. Rebase on Russell's for-next branch.
2. Add clock support.
3. Move gpio edge detection initiliaztion of arch-mmp into gpio driver.
Quoted 8 lines
v2:
1. Removegpio.cfrom mach-pxa & mach-mmp that is introduced from v1.
2. Remove init function ingpio.c. Move theplatfrom_device_register()into platform driver.
3. Initializepxa_gpio_regsingpio-pxa.c
4. Simplify code of identifing pxa gpio series or mmp gpio series.
5. Uselinux/io.hinstead ofasm/io.h.
I think with the comments against patch 4 resolved, this can be merged via Arnd's arm-soc tree - but Arnd will prefer them to be in a git tree which he can pull rather than dealing with individual patches.