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gpio: omap: fix debounce time calculation

PATCH New Felipe Balbi 3 participants 6 messages Nov 12, 2015

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#0 lore raw

PATCH 1/1 gpio: omap: fix debounce time calculation

According to TRM, debounce is measured in periods of the functional clock of the GPIO IP. This means that we should divide by the rate of functional clock.

---
 drivers/gpio/gpio-omap.c | 24 +++++++++++++++++-------
 1 file changed, 17 insertions(+), 7 deletions(-)
drivers/gpio/gpio-omap.c +17 -7
index 56d2d026e62e..2b29fd195521 100644
@@ -217,15 +217,29 @@ static void omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset,
 	u32			val;
 	u32			l;
 	bool			enable = !!debounce;
+	unsigned long		flags;
 
 	if (!bank->dbck_flag)
 		return;
 
 	if (enable) {
-		debounce = DIV_ROUND_UP(debounce, 31) - 1;
+		struct clk	*clk;
+		unsigned long	rate;
+
+		clk = clk_get(bank->dev, "fck");
+		if (IS_ERR(clk)) {
+			dev_err(bank->dev, "can't get clock\n");
+			return;
+		}
+
+		rate = clk_get_rate(clk);
+		clk_put(clk);
+
+		debounce = DIV_ROUND_UP(debounce, rate);
 		debounce &= OMAP4_GPIO_DEBOUNCINGTIME_MASK;
 	}
 
+	raw_spin_lock_irqsave(&bank->lock, flags);
 	l = BIT(offset);
 
 	clk_enable(bank->dbck);
@@ -256,6 +270,7 @@ static void omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset,
 		bank->context.debounce = debounce;
 		bank->context.debounce_en = val;
 	}
+	raw_spin_unlock_irqrestore(&bank->lock, flags);
 }
 
 /**
@@ -1002,14 +1017,9 @@ static int omap_gpio_output(struct gpio_chip *chip, unsigned offset, int value)
 static int omap_gpio_debounce(struct gpio_chip *chip, unsigned offset,
 			      unsigned debounce)
 {
-	struct gpio_bank *bank;
-	unsigned long flags;
-
-	bank = container_of(chip, struct gpio_bank, chip);
+	struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
 
-	raw_spin_lock_irqsave(&bank->lock, flags);
 	omap2_set_gpio_debounce(bank, offset, debounce);
-	raw_spin_unlock_irqrestore(&bank->lock, flags);
 
 	return 0;
 }
Signature · 1 line
2.6.2
#1 lore raw

PATCH 1/1 gpio: omap: fix debounce time calculation

Quoted 2 lines · Felipe Balbi

According to TRM, debounce is measured in periods of the functional clock of the GPIO IP. This means that

What TRM? link pls.

http://www.ti.com/lit/ug/spruhl7d/spruhl7d.pdf

28.4.1.24 GPIO_DEBOUNCINGTIME Register (offset = 154h) [reset = 0h]

The GPIO_DEBOUNCINGTIME register controls debouncing time (the value is global for all ports). The debouncing cell is running with the debouncing clock (32 kHz), this register represents the number of the clock cycle(s) (31 s long) to be used.

Debouncing Value in 31 microsecond steps. Debouncing Value = (DEBOUNCETIME + 1) * 31 microseconds.

Quoted 67 lines

we should divide by the rate of functional clock.

---
  drivers/gpio/gpio-omap.c | 24 +++++++++++++++++-------
  1 file changed, 17 insertions(+), 7 deletions(-)
drivers/gpio/gpio-omap.c +17 -7
index 56d2d026e62e..2b29fd195521 100644
@@ -217,15 +217,29 @@ static void omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset,
  	u32			val;
  	u32			l;
  	bool			enable = !!debounce;
+	unsigned long		flags;
 
  	if (!bank->dbck_flag)
  		return;
 
  	if (enable) {
-		debounce = DIV_ROUND_UP(debounce, 31) - 1;
+		struct clk	*clk;
+		unsigned long	rate;
+
+		clk = clk_get(bank->dev, "fck");
+		if (IS_ERR(clk)) {
+			dev_err(bank->dev, "can't get clock\n");
+			return;
+		}
+
+		rate = clk_get_rate(clk);
+		clk_put(clk);
+
+		debounce = DIV_ROUND_UP(debounce, rate);
  		debounce &= OMAP4_GPIO_DEBOUNCINGTIME_MASK;
  	}
 
+	raw_spin_lock_irqsave(&bank->lock, flags);
  	l = BIT(offset);
 
  	clk_enable(bank->dbck);
@@ -256,6 +270,7 @@ static void omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset,
  		bank->context.debounce = debounce;
  		bank->context.debounce_en = val;
  	}
+	raw_spin_unlock_irqrestore(&bank->lock, flags);
  }
 
  /**
@@ -1002,14 +1017,9 @@ static int omap_gpio_output(struct gpio_chip *chip, unsigned offset, int value)
  static int omap_gpio_debounce(struct gpio_chip *chip, unsigned offset,
  			      unsigned debounce)
  {
-	struct gpio_bank *bank;
-	unsigned long flags;
-
-	bank = container_of(chip, struct gpio_bank, chip);
+	struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
 
-	raw_spin_lock_irqsave(&bank->lock, flags);
  	omap2_set_gpio_debounce(bank, offset, debounce);
-	raw_spin_unlock_irqrestore(&bank->lock, flags);
 
  	return 0;
  }
Signature · 2 lines
regards,
-grygorii
#2 lore raw

PATCH 1/1 gpio: omap: fix debounce time calculation

Hi,

Quoted 11 lines · Grygorii Strashko
Quoted 2 lines · Felipe Balbi

According to TRM, debounce is measured in periods of the functional clock of the GPIO IP. This means that

What TRM? link pls.

http://www.ti.com/lit/ug/spruhl7d/spruhl7d.pdf

28.4.1.24 GPIO_DEBOUNCINGTIME Register (offset = 154h) [reset = 0h]

Quoted 7 lines

The GPIO_DEBOUNCINGTIME register controls debouncing time (the value is global for all ports). The debouncing cell is running with the debouncing clock (32 kHz), this register represents the number of the clock cycle(s) (31 s long) to be used.

Debouncing Value in 31 microsecond steps. Debouncing Value = (DEBOUNCETIME + 1) * 31 microseconds.

DRA7xx:

"
8-bit values specifying the debouncing time. It is n- periods of the muxed clock, which can come from either a true 32k oscillator/pad of from the system clock. It depends on which boot mode is selected. For more information see Chapter 32, Initialization.
"

Signature · 8 lines
balbi
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#3 lore raw

PATCH 1/1 gpio: omap: fix debounce time calculation

Quoted 25 lines · Felipe Balbi

Hi,

Quoted 11 lines · Grygorii Strashko
Quoted 2 lines · Felipe Balbi

According to TRM, debounce is measured in periods of the functional clock of the GPIO IP. This means that

What TRM? link pls.

http://www.ti.com/lit/ug/spruhl7d/spruhl7d.pdf

28.4.1.24 GPIO_DEBOUNCINGTIME Register (offset = 154h) [reset = 0h]

Quoted 7 lines

The GPIO_DEBOUNCINGTIME register controls debouncing time (the value is global for all ports). The debouncing cell is running with the debouncing clock (32 kHz), this register represents the number of the clock cycle(s) (31 s long) to be used.

Debouncing Value in 31 microsecond steps. Debouncing Value = (DEBOUNCETIME + 1) * 31 microseconds.

DRA7xx:

Quoted 8 lines

"
8-bit values specifying the debouncing time. It is n- periods of the muxed clock, which can come from either a true 32k oscillator/pad of from the system clock. It depends on which boot mode is selected. For more information see Chapter 32, Initialization.
"

See
http://www.ti.com/lit/ug/spruhz6d/spruhz6d.pdf
27.4.3 General-Purpose Interface Clock Configuration 27.4.3.1 Clocking

This completely unclear. Sry, I think this patch can't be used as is, first of all because of backward compatibility issues.

Signature · 2 lines
regards,
-grygorii
#4 lore raw

PATCH 1/1 gpio: omap: fix debounce time calculation

Hi,

Quoted 35 lines · Grygorii Strashko
Quoted 25 lines · Felipe Balbi

Hi,

Quoted 11 lines · Grygorii Strashko
Quoted 2 lines · Felipe Balbi

According to TRM, debounce is measured in periods of the functional clock of the GPIO IP. This means that

What TRM? link pls.

http://www.ti.com/lit/ug/spruhl7d/spruhl7d.pdf

28.4.1.24 GPIO_DEBOUNCINGTIME Register (offset = 154h) [reset = 0h]

Quoted 7 lines

The GPIO_DEBOUNCINGTIME register controls debouncing time (the value is global for all ports). The debouncing cell is running with the debouncing clock (32 kHz), this register represents the number of the clock cycle(s) (31 s long) to be used.

Debouncing Value in 31 microsecond steps. Debouncing Value = (DEBOUNCETIME + 1) * 31 microseconds.

DRA7xx:

Quoted 8 lines

"
8-bit values specifying the debouncing time. It is n- periods of the muxed clock, which can come from either a true 32k oscillator/pad of from the system clock. It depends on which boot mode is selected. For more information see Chapter 32, Initialization.
"

Quoted 7 lines

See
http://www.ti.com/lit/ug/spruhz6d/spruhz6d.pdf
27.4.3 General-Purpose Interface Clock Configuration 27.4.3.1 Clocking

This completely unclear. Sry, I think this patch can't be used as is, first of all because of backward compatibility issues.

yeah, might be. No issues, I'll just go dig older TRMs and trying to figure this one out. Meanwhile, let's let's keep it as is.

Signature · 8 lines
balbi
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#5 lore raw

PATCH 1/1 gpio: omap: fix debounce time calculation

Quoted 44 lines · Felipe Balbi

Hi,

Quoted 40 lines · Grygorii Strashko
Quoted 25 lines · Felipe Balbi

Hi,

Quoted 11 lines · Grygorii Strashko
Quoted 2 lines · Felipe Balbi

According to TRM, debounce is measured in periods of the functional clock of the GPIO IP. This means that

What TRM? link pls.

http://www.ti.com/lit/ug/spruhl7d/spruhl7d.pdf

28.4.1.24 GPIO_DEBOUNCINGTIME Register (offset = 154h) [reset = 0h]

Quoted 7 lines

The GPIO_DEBOUNCINGTIME register controls debouncing time (the value is global for all ports). The debouncing cell is running with the debouncing clock (32 kHz), this register represents the number of the clock cycle(s) (31 s long) to be used.

Debouncing Value in 31 microsecond steps. Debouncing Value = (DEBOUNCETIME + 1) * 31 microseconds.

DRA7xx:

Quoted 8 lines

"
8-bit values specifying the debouncing time. It is n- periods of the muxed clock, which can come from either a true 32k oscillator/pad of from the system clock. It depends on which boot mode is selected. For more information see Chapter 32, Initialization.
"

See
http://www.ti.com/lit/ug/spruhz6d/spruhz6d.pdf
27.4.3 General-Purpose Interface Clock Configuration 27.4.3.1 Clocking

Quoted 6 lines
Quoted 2 lines

This completely unclear. Sry, I think this patch can't be used as is, first of all because of backward compatibility issues.

yeah, might be. No issues, I'll just go dig older TRMs and trying to figure this one out. Meanwhile, let's let's keep it as is.

Just to be clear, being a common GPIO driver, it can't break backward compatibility. So NAK for current patch. If needed, please setup different debounce functions based on GPIO IP numbers if it makes is efficient/accurate.

Regards,
Santosh