GPIO: OMAP: first round of cleanup
Subsystems (5)
cover GPIO: OMAP: first round of cleanup
Start moving SoC-specific register handling out of the driver by passing in register offsets in via platform data.
Also, move OMAP1 MPUIO IRQ handling over to genric IRQ chip.
Applies on top of Tony's for-next branch (which include's the generic IRQ chip work from tglx) and the OMAP GPIO driver move to drivers/gpio.
Charulatha V (1):
GPIO: OMAP: remove get_gpio_bank()
Kevin Hilman (13):
GPIO: OMAP: _clear_gpio_irqbank: fix flushing of posted write
GPIO: OMAP: remove MPUIO handling from _clear_gpio_irqbank()
GPIO: OMAP: move bank width into struct gpio_bank
GPIO: OMAP: _get_gpio_irqbank_mask: replace hard-coded mask with
bank->width
GPIO: OMAP: replace get_gpio_index() by using bank width
GPIO: OMAP: consolidate direction, input, output, remove #ifdefs
GPIO: OMAP: consolidate IRQ status handling, remove #ifdefs
GPIO: OMAP: conslidate enable/disable of GPIO IRQs, remove ifdefs
GPIO: OMAP: convert MPUIO IRQ over to generic irq_chip
GPIO: OMAP: remove useless gpio_valid() & check_gpio() checks
GPIO: OMAP: cleanup _set_gpio_wakeup(), remove ifdefs
GPIO: OMAP: debounce remove SoC specific registers, use pdata
GPIO: OMAP: cleanup show revision, remove cpu_is checks, display only
once
arch/arm/mach-omap1/gpio15xx.c | 22 + arch/arm/mach-omap1/gpio16xx.c | 28 ++ arch/arm/mach-omap1/gpio7xx.c | 27 ++ arch/arm/mach-omap2/gpio.c | 32 ++ arch/arm/plat-omap/include/plat/gpio.h | 20 + drivers/gpio/gpio_omap.c | 723 +++++++------------------------- 6 files changed, 282 insertions(+), 570 deletions(-)
Signature · 1 line
1.7.3.4
PATCH 1/14 GPIO: OMAP: _clear_gpio_irqbank: fix flushing of posted write
In commit 78a1a6d3411de1a8b0dc1cb92754b5f12f251912 (ARM: OMAP4: Update the GPIO support) braces were mistakenly added to included the register read-back inside the cpu_is_* checking.
Remove the braces, ensuring that a register read-back is done, even when the IRQSTATUS2 register is not written.
Note that the register read-back might be IRQSTATUS1 or IRQSTATUS2 depending on the CPU, but a read-back of any register in that region will cause a flush of the posted writes.
--- drivers/gpio/gpio_omap.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-)
drivers/gpio/gpio_omap.c +1 -2
@@ -708,12 +708,11 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)else if (cpu_is_omap44xx ()) reg = bank->base +OMAP4_GPIO_IRQSTATUS1 ; -if (cpu_is_omap24xx () ||cpu_is_omap34xx () ||cpu_is_omap44xx ()) { +if (cpu_is_omap24xx () ||cpu_is_omap34xx () ||cpu_is_omap44xx ())__raw_writel (gpio_mask, reg);/* Flush posted write for the irq status to avoid spurious interrupts */ __raw_readl (reg); - } }static inline void _clear_gpio_irqstatus (struct gpio_bank *bank,int gpio)
Signature · 1 line
1.7.3.4
PATCH 2/14 GPIO: OMAP: remove MPUIO handling from _clear_gpio_irqbank()
In reply to Kevin HilmanRemove the OMAP1 #ifdef and MPUIO special case for _clear_gpio_irqbank()
The MPUIOs do not need a register access to ack/clear the IRQ status, since reading the IRQ status clears it. In addition, the MPUIO irq_chip has an empty ack method, so _clear_gpio_irqbank() is never used for MPUIOs.
--- drivers/gpio/gpio_omap.c | 6 ------ 1 files changed, 0 insertions(+), 6 deletions(-)
drivers/gpio/gpio_omap.c +0 -6
@@ -665,12 +665,6 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)void __iomem *reg = bank->base;switch (bank->method) { -#ifdef CONFIG_ARCH_OMAP1 -case METHOD_MPUIO : -/* MPUIO irqstatus is reset by reading the status register, -* so do nothing here */ -return ; -#endif #ifdef CONFIG_ARCH_OMAP15XX case METHOD_GPIO_1510 : reg +=OMAP1510_GPIO_INT_STATUS ;
Signature · 1 line
1.7.3.4
PATCH 3/14 GPIO: OMAP: move bank width into struct gpio_bank
In reply to Kevin HilmanRather than having a file-global bank_width variable, move it into
struct gpio_bank so it can be bank-specific. Note the bank width
is already passed per-bank via platform_data, so current code would be incorrect if any banks had different width.
--- drivers/gpio/gpio_omap.c | 13 ++++++------- 1 files changed, 6 insertions(+), 7 deletions(-)
drivers/gpio/gpio_omap.c +6 -7
@@ -54,6 +54,7 @@ struct gpio_bank {struct device *dev;bool dbck_flag;int stride; +u32 width; };#ifdef CONFIG_ARCH_OMAP3
@@ -79,8 +80,6 @@ static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];*/ static struct gpio_bank *gpio_bank; -static int bank_width; -/* TODO: Analyze removing gpio_bank_count usage from driver code */ int gpio_bank_count;
@@ -878,7 +877,7 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)if (bank->non_wakeup_gpios & (1 << gpio)) {printk (KERN_ERR "Unable to modify wakeup on " "non-wakeup GPIO%d\n" , - (bank - gpio_bank) *32 + gpio); + (bank - gpio_bank) * bank->width + gpio);return -EINVAL ; }spin_lock_irqsave (&bank->lock, flags);
@@ -1545,14 +1544,14 @@ static void __init omap_gpio_chip_init(struct gpio_bank *bank) }else { bank->chip.label ="gpio" ; bank->chip.base = gpio; - gpio += bank_width; + gpio += bank->width; } - bank->chip.ngpio = bank_width; + bank->chip.ngpio = bank->width;gpiochip_add (&bank->chip);for (j = bank->virtual_irq_start; - j < bank->virtual_irq_start + bank_width; j++) { + j < bank->virtual_irq_start + bank->width; j++) {irq_set_lockdep_class (j, &gpio_lock_class);irq_set_chip_data (j, bank);if (bank_is_mpuio (bank))
@@ -1602,7 +1601,7 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev) bank->dev = &pdev->dev; bank->dbck_flag = pdata->dbck_flag; bank->stride = pdata->bank_stride; - bank_width = pdata->bank_width; + bank->width = pdata->bank_width;spin_lock_init (&bank->lock);
Signature · 1 line
1.7.3.4
PATCH 4/14 GPIO: OMAP: _get_gpio_irqbank_mask: replace hard-coded mask with bank->width
In reply to Kevin HilmanReplace hard-coded mask values with bank->width which is already coming from platform_data.
--- drivers/gpio/gpio_omap.c | 8 +------- 1 files changed, 1 insertions(+), 7 deletions(-)
drivers/gpio/gpio_omap.c +1 -7
@@ -718,46 +718,40 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)void __iomem *reg = bank->base;int inv =0 ;u32 l; -u32 mask; +u32 mask = (1 << bank->width) -1 ;switch (bank->method) {#ifdef CONFIG_ARCH_OMAP1 case METHOD_MPUIO : reg +=OMAP_MPUIO_GPIO_MASKIT / bank->stride; - mask =0xffff ; inv =1 ;break ;#endif #ifdef CONFIG_ARCH_OMAP15XX case METHOD_GPIO_1510 : reg +=OMAP1510_GPIO_INT_MASK ; - mask =0xffff ; inv =1 ;break ;#endif #ifdef CONFIG_ARCH_OMAP16XX case METHOD_GPIO_1610 : reg +=OMAP1610_GPIO_IRQENABLE1 ; - mask =0xffff ;break ;#endif #if defined(CONFIG_ARCH_OMAP730 ) || defined(CONFIG_ARCH_OMAP850 )case METHOD_GPIO_7XX : reg +=OMAP7XX_GPIO_INT_MASK ; - mask =0xffffffff ; inv =1 ;break ;#endif #if defined(CONFIG_ARCH_OMAP2 ) || defined(CONFIG_ARCH_OMAP3 )case METHOD_GPIO_24XX : reg +=OMAP24XX_GPIO_IRQENABLE1 ; - mask =0xffffffff ;break ;#endif #if defined(CONFIG_ARCH_OMAP4 )case METHOD_GPIO_44XX : reg +=OMAP4_GPIO_IRQSTATUSSET0 ; - mask =0xffffffff ;break ;#endif default :
Signature · 1 line
1.7.3.4
PATCH 5/14 GPIO: OMAP: replace get_gpio_index() by using bank width
In reply to Kevin HilmanThe get_gpio_index() function, littered with cpu_is_* checks can be easily replaced by using bitops based on the GPIO bank width. Do so.
--- drivers/gpio/gpio_omap.c | 42 +++++++++++++++++------------------------- 1 files changed, 17 insertions(+), 25 deletions(-)
drivers/gpio/gpio_omap.c +17 -25
@@ -83,6 +83,9 @@ static struct gpio_bank *gpio_bank;/* TODO: Analyze removing gpio_bank_count usage from driver code */ int gpio_bank_count; +#define GPIO_INDEX (bank, gpio) (gpio % bank->width) +#define GPIO_BIT (bank, gpio) (1 << GPIO_INDEX(bank, gpio)) +static inline struct gpio_bank *get_gpio_bank (int gpio) {if (cpu_is_omap15xx ()) {
@@ -108,17 +111,6 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)return NULL ; } -static inline int get_gpio_index (int gpio) -{ -if (cpu_is_omap7xx ()) -return gpio &0x1f ; -if (cpu_is_omap24xx ()) -return gpio &0x1f ; -if (cpu_is_omap34xx () ||cpu_is_omap44xx ()) -return gpio &0x1f ; -return gpio &0x0f ; -} -static inline int gpio_valid (int gpio) {if (gpio <0 )
@@ -313,7 +305,7 @@ static int _get_gpio_datain(struct gpio_bank *bank, int gpio)return -EINVAL ; }return (__raw_readl (reg) - & (1 <<get_gpio_index (gpio))) !=0 ; + & (GPIO_BIT (bank, gpio))) !=0 ; }static int _get_gpio_dataout (struct gpio_bank *bank,int gpio)
@@ -359,7 +351,7 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)return -EINVAL ; } -return (__raw_readl (reg) & (1 <<get_gpio_index (gpio))) !=0 ; +return (__raw_readl (reg) &GPIO_BIT (bank, gpio)) !=0 ; }#define MOD_REG_BIT (reg, bit_mask, set) \
@@ -396,7 +388,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,else debounce = (debounce /0x1f ) -1 ; - l =1 <<get_gpio_index (gpio); + l =GPIO_BIT (bank, gpio);if (bank->method ==METHOD_GPIO_44XX ) reg +=OMAP4_GPIO_DEBOUNCINGTIME ;
@@ -648,7 +640,7 @@ static int gpio_irq_type(struct irq_data *d, unsigned type) bank =irq_data_get_irq_chip_data (d);spin_lock_irqsave (&bank->lock, flags); - retval =_set_gpio_triggering (bank,get_gpio_index (gpio), type); + retval =_set_gpio_triggering (bank,GPIO_INDEX (bank, gpio), type);spin_unlock_irqrestore (&bank->lock, flags);if (type & (IRQ_TYPE_LEVEL_LOW |IRQ_TYPE_LEVEL_HIGH ))
@@ -710,7 +702,7 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)static inline void _clear_gpio_irqstatus (struct gpio_bank *bank,int gpio) { -_clear_gpio_irqbank (bank,1 <<get_gpio_index (gpio)); +_clear_gpio_irqbank (bank,GPIO_BIT (bank, gpio)); }static u32 _get_gpio_irqbank_mask (struct gpio_bank *bank)
@@ -838,7 +830,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enabstatic inline void _set_gpio_irqenable (struct gpio_bank *bank,int gpio,int enable) { -_enable_gpio_irqbank (bank,1 <<get_gpio_index (gpio), enable); +_enable_gpio_irqbank (bank,GPIO_BIT (bank, gpio), enable); }/*
@@ -891,10 +883,10 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)static void _reset_gpio (struct gpio_bank *bank,int gpio) { -_set_gpio_direction (bank,get_gpio_index (gpio),1 ); +_set_gpio_direction (bank,GPIO_INDEX (bank, gpio),1 );_set_gpio_irqenable (bank, gpio,0 );_clear_gpio_irqstatus (bank, gpio); -_set_gpio_triggering (bank,get_gpio_index (gpio),IRQ_TYPE_NONE ); +_set_gpio_triggering (bank,GPIO_INDEX (bank, gpio),IRQ_TYPE_NONE ); }/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
@@ -907,7 +899,7 @@ static int gpio_wake_enable(struct irq_data *d, unsigned int enable)if (check_gpio (gpio) <0 )return -ENODEV ; bank =irq_data_get_irq_chip_data (d); - retval =_set_gpio_wakeup (bank,get_gpio_index (gpio), enable); + retval =_set_gpio_wakeup (bank,GPIO_INDEX (bank, gpio), enable);return retval; }
@@ -1086,7 +1078,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) gpio_irq = bank->virtual_irq_start;for (; isr !=0 ; isr >>=1 , gpio_irq++) { - gpio_index =get_gpio_index (irq_to_gpio (gpio_irq)); + gpio_index =GPIO_INDEX (bank,irq_to_gpio (gpio_irq));if (!(isr &1 ))continue ;
@@ -1137,18 +1129,18 @@ static void gpio_mask_irq(struct irq_data *d)struct gpio_bank *bank =irq_data_get_irq_chip_data (d);_set_gpio_irqenable (bank, gpio,0 ); -_set_gpio_triggering (bank,get_gpio_index (gpio),IRQ_TYPE_NONE ); +_set_gpio_triggering (bank,GPIO_INDEX (bank, gpio),IRQ_TYPE_NONE ); }static void gpio_unmask_irq (struct irq_data *d) {unsigned int gpio = d->irq -IH_GPIO_BASE ;struct gpio_bank *bank =irq_data_get_irq_chip_data (d); -unsigned int irq_mask =1 <<get_gpio_index (gpio); +unsigned int irq_mask =GPIO_BIT (bank, gpio);u32 trigger =irqd_get_trigger_type (d);if (trigger) -_set_gpio_triggering (bank,get_gpio_index (gpio), trigger); +_set_gpio_triggering (bank,GPIO_INDEX (bank, gpio), trigger);/* For level-triggered GPIOs, the clearing must be done after * the HW source is cleared, thus after the handler has run */
@@ -1352,7 +1344,7 @@ static int gpio_get(struct gpio_chip *chip, unsigned offset) gpio = chip->base + offset; bank =get_gpio_bank (gpio); reg = bank->base; - mask =1 <<get_gpio_index (gpio); + mask =GPIO_BIT (bank, gpio);if (gpio_is_input (bank, mask))return _get_gpio_datain (bank, gpio);
Signature · 1 line
1.7.3.4
PATCH 6/14 GPIO: OMAP: remove get_gpio_bank()
In reply to Kevin HilmanFrom: Charulatha V <[email protected]>
use chip info to get the pointer to the struct gpio_bank for a given GPIO bank and remove get_gpio_bank().
--- drivers/gpio/gpio_omap.c | 29 ++--------------------------- 1 files changed, 2 insertions(+), 27 deletions(-)
drivers/gpio/gpio_omap.c +2 -27
@@ -86,31 +86,6 @@ int gpio_bank_count;#define GPIO_INDEX (bank, gpio) (gpio % bank->width)#define GPIO_BIT (bank, gpio) (1 << GPIO_INDEX(bank, gpio)) -static inline struct gpio_bank *get_gpio_bank (int gpio) -{ -if (cpu_is_omap15xx ()) { -if (OMAP_GPIO_IS_MPUIO (gpio)) -return &gpio_bank[0 ]; -return &gpio_bank[1 ]; - } -if (cpu_is_omap16xx ()) { -if (OMAP_GPIO_IS_MPUIO (gpio)) -return &gpio_bank[0 ]; -return &gpio_bank[1 + (gpio >>4 )]; - } -if (cpu_is_omap7xx ()) { -if (OMAP_GPIO_IS_MPUIO (gpio)) -return &gpio_bank[0 ]; -return &gpio_bank[1 + (gpio >>5 )]; - } -if (cpu_is_omap24xx ()) -return &gpio_bank[gpio >>5 ]; -if (cpu_is_omap34xx () ||cpu_is_omap44xx ()) -return &gpio_bank[gpio >>5 ]; -BUG (); -return NULL ; -} -static inline int gpio_valid (int gpio) {if (gpio <0 )
@@ -1266,7 +1241,7 @@ static struct platform_device omap_mpuio_device = {static inline void mpuio_init (void ) { -struct gpio_bank *bank =get_gpio_bank (OMAP_MPUIO (0 )); +struct gpio_bank *bank = &gpio_bank[0 ];platform_set_drvdata (&omap_mpuio_device, bank);if (platform_driver_register (&omap_mpuio_driver) ==0 )
@@ -1342,7 +1317,7 @@ static int gpio_get(struct gpio_chip *chip, unsigned offset)u32 mask; gpio = chip->base + offset; - bank =get_gpio_bank (gpio); + bank = container_of(chip, struct gpio_bank, chip); reg = bank->base; mask =GPIO_BIT (bank, gpio);
Signature · 1 line
1.7.3.4
PATCH 7/14 GPIO: OMAP: consolidate direction, input, output, remove #ifdefs
In reply to Kevin HilmanAdd register offset fields to GPIO platform_data for registers.
This patch adds registers that control direction, input and output data. Using these register offsets in the common driver allows removal of #ifdefs and greatly improves readability.
Also create dedicated data out functions: one for banks with dedicated set/clear registers, and another for banks with a single mask register.
--- arch/arm/mach-omap1/gpio15xx.c | 14 ++ arch/arm/mach-omap1/gpio16xx.c | 19 +++ arch/arm/mach-omap1/gpio7xx.c | 19 +++ arch/arm/mach-omap2/gpio.c | 16 ++ arch/arm/plat-omap/include/plat/gpio.h | 10 ++ drivers/gpio/gpio_omap.c | 243 ++++++-------------------------- 6 files changed, 121 insertions(+), 200 deletions(-)
arch/arm/mach-omap1/gpio15xx.c +14 -0
@@ -34,11 +34,18 @@ static struct __initdata resource omap15xx_mpu_gpio_resources[] = { }, }; +static struct omap_gpio_reg_offs omap15xx_mpuio_regs = { + .direction =OMAP_MPUIO_IO_CNTL , + .datain =OMAP_MPUIO_INPUT_LATCH , + .dataout =OMAP_MPUIO_OUTPUT , +}; +static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = { .virtual_irq_start =IH_MPUIO_BASE , .bank_type =METHOD_MPUIO , .bank_width =16 , .bank_stride =1 , + .regs = &omap15xx_mpuio_regs, };static struct __initdata platform_device omap15xx_mpu_gpio = {
@@ -64,10 +71,17 @@ static struct __initdata resource omap15xx_gpio_resources[] = { }, }; +static struct omap_gpio_reg_offs omap15xx_gpio_regs = { + .direction =OMAP1510_GPIO_DIR_CONTROL , + .datain =OMAP1510_GPIO_DATA_INPUT , + .dataout =OMAP1510_GPIO_DATA_OUTPUT , +}; +static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = { .virtual_irq_start =IH_GPIO_BASE , .bank_type =METHOD_GPIO_1510 , .bank_width =16 , + .regs = &omap15xx_gpio_regs, };static struct __initdata platform_device omap15xx_gpio = {
arch/arm/mach-omap1/gpio16xx.c +19 -0
@@ -37,11 +37,18 @@ static struct __initdata resource omap16xx_mpu_gpio_resources[] = { }, }; +static struct omap_gpio_reg_offs omap16xx_mpuio_regs = { + .direction =OMAP_MPUIO_IO_CNTL , + .datain =OMAP_MPUIO_INPUT_LATCH , + .dataout =OMAP_MPUIO_OUTPUT , +}; +static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = { .virtual_irq_start =IH_MPUIO_BASE , .bank_type =METHOD_MPUIO , .bank_width =16 , .bank_stride =1 , + .regs = &omap16xx_mpuio_regs, };static struct __initdata platform_device omap16xx_mpu_gpio = {
@@ -67,10 +74,19 @@ static struct __initdata resource omap16xx_gpio1_resources[] = { }, }; +static struct omap_gpio_reg_offs omap16xx_gpio_regs = { + .direction =OMAP1610_GPIO_DIRECTION , + .set_dataout =OMAP1610_GPIO_SET_DATAOUT , + .clr_dataout =OMAP1610_GPIO_CLEAR_DATAOUT , + .datain =OMAP1610_GPIO_DATAIN , + .dataout =OMAP1610_GPIO_DATAOUT , +}; +static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = { .virtual_irq_start =IH_GPIO_BASE , .bank_type =METHOD_GPIO_1610 , .bank_width =16 , + .regs = &omap16xx_gpio_regs, };static struct __initdata platform_device omap16xx_gpio1 = {
@@ -100,6 +116,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = { .virtual_irq_start = IH_GPIO_BASE + 16, .bank_type = METHOD_GPIO_1610, .bank_width = 16, + .regs = &omap16xx_gpio_regs, };static struct __initdata platform_device omap16xx_gpio2 = {
@@ -129,6 +146,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = { .virtual_irq_start = IH_GPIO_BASE + 32, .bank_type = METHOD_GPIO_1610, .bank_width = 16, + .regs = &omap16xx_gpio_regs, };static struct __initdata platform_device omap16xx_gpio3 = {
@@ -158,6 +176,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = { .virtual_irq_start = IH_GPIO_BASE + 48, .bank_type = METHOD_GPIO_1610, .bank_width = 16, + .regs = &omap16xx_gpio_regs, };static struct __initdata platform_device omap16xx_gpio4 = {
arch/arm/mach-omap1/gpio7xx.c +19 -0
@@ -39,11 +39,18 @@ static struct __initdata resource omap7xx_mpu_gpio_resources[] = { }, }; +static struct omap_gpio_reg_offs omap7xx_mpuio_regs = { + .direction =OMAP_MPUIO_IO_CNTL /2 , + .datain =OMAP_MPUIO_INPUT_LATCH /2 , + .dataout =OMAP_MPUIO_OUTPUT /2 , +}; +static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = { .virtual_irq_start =IH_MPUIO_BASE , .bank_type =METHOD_MPUIO , .bank_width =32 , .bank_stride =2 , + .regs = &omap7xx_mpuio_regs, };static struct __initdata platform_device omap7xx_mpu_gpio = {
@@ -69,10 +76,17 @@ static struct __initdata resource omap7xx_gpio1_resources[] = { }, }; +static struct omap_gpio_reg_offs omap7xx_gpio_regs = { + .direction =OMAP7XX_GPIO_DIR_CONTROL , + .datain =OMAP7XX_GPIO_DATA_INPUT , + .dataout =OMAP7XX_GPIO_DATA_OUTPUT , +}; +static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = { .virtual_irq_start =IH_GPIO_BASE , .bank_type =METHOD_GPIO_7XX , .bank_width =32 , + .regs = &omap7xx_gpio_regs, };static struct __initdata platform_device omap7xx_gpio1 = {
@@ -102,6 +116,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio2_config = { .virtual_irq_start = IH_GPIO_BASE + 32, .bank_type = METHOD_GPIO_7XX, .bank_width = 32, + .regs = &omap7xx_gpio_regs, };static struct __initdata platform_device omap7xx_gpio2 = {
@@ -131,6 +146,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio3_config = { .virtual_irq_start = IH_GPIO_BASE + 64, .bank_type = METHOD_GPIO_7XX, .bank_width = 32, + .regs = &omap7xx_gpio_regs, };static struct __initdata platform_device omap7xx_gpio3 = {
@@ -160,6 +176,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio4_config = { .virtual_irq_start = IH_GPIO_BASE + 96, .bank_type = METHOD_GPIO_7XX, .bank_width = 32, + .regs = &omap7xx_gpio_regs, };static struct __initdata platform_device omap7xx_gpio4 = {
@@ -189,6 +206,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio5_config = { .virtual_irq_start = IH_GPIO_BASE + 128, .bank_type = METHOD_GPIO_7XX, .bank_width = 32, + .regs = &omap7xx_gpio_regs, };static struct __initdata platform_device omap7xx_gpio5 = {
@@ -218,6 +236,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio6_config = { .virtual_irq_start = IH_GPIO_BASE + 160, .bank_type = METHOD_GPIO_7XX, .bank_width = 32, + .regs = &omap7xx_gpio_regs, };static struct __initdata platform_device omap7xx_gpio6 = {
arch/arm/mach-omap2/gpio.c +16 -0
@@ -61,13 +61,29 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) pdata->dbck_flag = dev_attr->dbck_flag; pdata->virtual_irq_start =IH_GPIO_BASE +32 * (id -1 ); + pdata->regs =kzalloc (sizeof (struct omap_gpio_reg_offs ),GFP_KERNEL ); +if (!pdata) { +pr_err ("gpio%d: Memory allocation failed\n" , id); +return -ENOMEM ; + } +switch (oh->class->rev) {case 0 :case 1 : pdata->bank_type =METHOD_GPIO_24XX ; + pdata->regs->direction =OMAP24XX_GPIO_OE ; + pdata->regs->datain =OMAP24XX_GPIO_DATAIN ; + pdata->regs->dataout =OMAP24XX_GPIO_DATAOUT ; + pdata->regs->set_dataout =OMAP24XX_GPIO_SETDATAOUT ; + pdata->regs->clr_dataout =OMAP24XX_GPIO_CLEARDATAOUT ;break ;case 2 : pdata->bank_type =METHOD_GPIO_44XX ; + pdata->regs->direction =OMAP4_GPIO_OE ; + pdata->regs->datain =OMAP4_GPIO_DATAIN ; + pdata->regs->dataout =OMAP4_GPIO_DATAOUT ; + pdata->regs->set_dataout =OMAP4_GPIO_SETDATAOUT ; + pdata->regs->clr_dataout =OMAP4_GPIO_CLEARDATAOUT ;break ;default :WARN (1 ,"Invalid gpio bank_type\n" );
arch/arm/plat-omap/include/plat/gpio.h +10 -0
@@ -174,12 +174,22 @@ struct omap_gpio_dev_attr {bool dbck_flag;/* dbck required or not - True for OMAP3&4 */ }; +struct omap_gpio_reg_offs { +u16 direction; +u16 datain; +u16 dataout; +u16 set_dataout; +u16 clr_dataout; +}; +struct omap_gpio_platform_data {u16 virtual_irq_start;int bank_type;int bank_width;/* GPIO bank width */ int bank_stride;/* Only needed for omap1 MPUIO */ bool dbck_flag;/* dbck required or not - True for OMAP3&4 */ + +struct omap_gpio_reg_offs *regs; };/* TODO: Analyze removing gpio_bank_count usage from driver code */
drivers/gpio/gpio_omap.c +43 -200
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Signature · 1 line
1.7.3.4
PATCH 8/14 GPIO: OMAP: consolidate IRQ status handling, remove #ifdefs
In reply to Kevin HilmanCleanup IRQ status handling by passing IRQ status register offsets via platform data.
Cleans up clearing of GPIO IRQ status and GPIO ISR handler.
--- arch/arm/mach-omap1/gpio15xx.c | 2 + arch/arm/mach-omap1/gpio16xx.c | 2 + arch/arm/mach-omap1/gpio7xx.c | 2 + arch/arm/mach-omap2/gpio.c | 4 ++ arch/arm/plat-omap/include/plat/gpio.h | 2 + drivers/gpio/gpio_omap.c | 66 ++----------------------------- 6 files changed, 17 insertions(+), 61 deletions(-)
arch/arm/mach-omap1/gpio15xx.c +2 -0
@@ -38,6 +38,7 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = { .direction = OMAP_MPUIO_IO_CNTL, .datain = OMAP_MPUIO_INPUT_LATCH, .dataout = OMAP_MPUIO_OUTPUT, + .irqstatus = OMAP_MPUIO_GPIO_INT, };static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
@@ -75,6 +76,7 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = { .direction = OMAP1510_GPIO_DIR_CONTROL, .datain = OMAP1510_GPIO_DATA_INPUT, .dataout = OMAP1510_GPIO_DATA_OUTPUT, + .irqstatus = OMAP1510_GPIO_INT_STATUS, };static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
arch/arm/mach-omap1/gpio16xx.c +2 -0
@@ -41,6 +41,7 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = { .direction = OMAP_MPUIO_IO_CNTL, .datain = OMAP_MPUIO_INPUT_LATCH, .dataout = OMAP_MPUIO_OUTPUT, + .irqstatus = OMAP_MPUIO_GPIO_INT, };static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
@@ -80,6 +81,7 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = { .clr_dataout = OMAP1610_GPIO_CLEAR_DATAOUT, .datain = OMAP1610_GPIO_DATAIN, .dataout = OMAP1610_GPIO_DATAOUT, + .irqstatus = OMAP1610_GPIO_IRQSTATUS1, };static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
arch/arm/mach-omap1/gpio7xx.c +2 -0
@@ -43,6 +43,7 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = { .direction = OMAP_MPUIO_IO_CNTL / 2, .datain = OMAP_MPUIO_INPUT_LATCH / 2, .dataout = OMAP_MPUIO_OUTPUT / 2, + .irqstatus = OMAP_MPUIO_GPIO_INT / 2, };static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
@@ -80,6 +81,7 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = { .direction = OMAP7XX_GPIO_DIR_CONTROL, .datain = OMAP7XX_GPIO_DATA_INPUT, .dataout = OMAP7XX_GPIO_DATA_OUTPUT, + .irqstatus = OMAP7XX_GPIO_INT_STATUS, };static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
arch/arm/mach-omap2/gpio.c +4 -0
@@ -76,6 +76,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) pdata->regs->dataout =OMAP24XX_GPIO_DATAOUT ; pdata->regs->set_dataout =OMAP24XX_GPIO_SETDATAOUT ; pdata->regs->clr_dataout =OMAP24XX_GPIO_CLEARDATAOUT ; + pdata->regs->irqstatus =OMAP24XX_GPIO_IRQSTATUS1 ; + pdata->regs->irqstatus2 =OMAP24XX_GPIO_IRQSTATUS2 ;break ;case 2 : pdata->bank_type =METHOD_GPIO_44XX ;
@@ -84,6 +86,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) pdata->regs->dataout =OMAP4_GPIO_DATAOUT ; pdata->regs->set_dataout =OMAP4_GPIO_SETDATAOUT ; pdata->regs->clr_dataout =OMAP4_GPIO_CLEARDATAOUT ; + pdata->regs->irqstatus =OMAP4_GPIO_IRQSTATUS0 ; + pdata->regs->irqstatus2 =OMAP4_GPIO_IRQSTATUS1 ;break ;default :WARN (1 ,"Invalid gpio bank_type\n" );
arch/arm/plat-omap/include/plat/gpio.h +2 -0
@@ -180,6 +180,8 @@ struct omap_gpio_reg_offs {u16 dataout;u16 set_dataout;u16 clr_dataout; +u16 irqstatus; +u16 irqstatus2; };struct omap_gpio_platform_data {
drivers/gpio/gpio_omap.c +5 -61
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Signature · 1 line
1.7.3.4
PATCH 9/14 GPIO: OMAP: conslidate enable/disable of GPIO IRQs, remove ifdefs
In reply to Kevin HilmanCleanup GPIO IRQ enable/disable handling by removing SoC-specific
Also split enable/disable IRQ into separate functions for better readability and also facilitate potentially moving to generic irq_chip in the future.
--- arch/arm/mach-omap1/gpio15xx.c | 4 + arch/arm/mach-omap1/gpio16xx.c | 5 + arch/arm/mach-omap1/gpio7xx.c | 4 + arch/arm/mach-omap2/gpio.c | 6 ++ arch/arm/plat-omap/include/plat/gpio.h | 5 + drivers/gpio/gpio_omap.c | 129 ++++++++------------------------ 6 files changed, 54 insertions(+), 99 deletions(-)
arch/arm/mach-omap1/gpio15xx.c +4 -0
@@ -39,6 +39,8 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = { .datain = OMAP_MPUIO_INPUT_LATCH, .dataout = OMAP_MPUIO_OUTPUT, .irqstatus = OMAP_MPUIO_GPIO_INT, + .irqenable = OMAP_MPUIO_GPIO_MASKIT, + .irqenable_inv = true, };static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
@@ -77,6 +79,8 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = { .datain = OMAP1510_GPIO_DATA_INPUT, .dataout = OMAP1510_GPIO_DATA_OUTPUT, .irqstatus = OMAP1510_GPIO_INT_STATUS, + .irqenable = OMAP1510_GPIO_INT_MASK, + .irqenable_inv = true, };static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
arch/arm/mach-omap1/gpio16xx.c +5 -0
@@ -42,6 +42,8 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = { .datain = OMAP_MPUIO_INPUT_LATCH, .dataout = OMAP_MPUIO_OUTPUT, .irqstatus = OMAP_MPUIO_GPIO_INT, + .irqenable = OMAP_MPUIO_GPIO_MASKIT, + .irqenable_inv = true, };static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
@@ -82,6 +84,9 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = { .datain = OMAP1610_GPIO_DATAIN, .dataout = OMAP1610_GPIO_DATAOUT, .irqstatus = OMAP1610_GPIO_IRQSTATUS1, + .irqenable = OMAP1610_GPIO_IRQENABLE1, + .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1, + .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1, };static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
arch/arm/mach-omap1/gpio7xx.c +4 -0
@@ -44,6 +44,8 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = { .datain = OMAP_MPUIO_INPUT_LATCH / 2, .dataout = OMAP_MPUIO_OUTPUT / 2, .irqstatus = OMAP_MPUIO_GPIO_INT / 2, + .irqenable = OMAP_MPUIO_GPIO_MASKIT / 2, + .irqenable_inv = true, };static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
@@ -82,6 +84,8 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = { .datain = OMAP7XX_GPIO_DATA_INPUT, .dataout = OMAP7XX_GPIO_DATA_OUTPUT, .irqstatus = OMAP7XX_GPIO_INT_STATUS, + .irqenable = OMAP7XX_GPIO_INT_MASK, + .irqenable_inv = true, };static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
arch/arm/mach-omap2/gpio.c +6 -0
@@ -78,6 +78,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) pdata->regs->clr_dataout =OMAP24XX_GPIO_CLEARDATAOUT ; pdata->regs->irqstatus =OMAP24XX_GPIO_IRQSTATUS1 ; pdata->regs->irqstatus2 =OMAP24XX_GPIO_IRQSTATUS2 ; + pdata->regs->irqenable =OMAP24XX_GPIO_IRQENABLE1 ; + pdata->regs->set_irqenable =OMAP24XX_GPIO_SETIRQENABLE1 ; + pdata->regs->clr_irqenable =OMAP24XX_GPIO_CLEARIRQENABLE1 ;break ;case 2 : pdata->bank_type =METHOD_GPIO_44XX ;
@@ -88,6 +91,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) pdata->regs->clr_dataout =OMAP4_GPIO_CLEARDATAOUT ; pdata->regs->irqstatus =OMAP4_GPIO_IRQSTATUS0 ; pdata->regs->irqstatus2 =OMAP4_GPIO_IRQSTATUS1 ; + pdata->regs->irqenable =OMAP4_GPIO_IRQSTATUSSET0 ; + pdata->regs->set_irqenable =OMAP4_GPIO_IRQSTATUSSET0 ; + pdata->regs->clr_irqenable =OMAP4_GPIO_IRQSTATUSCLR0 ;break ;default :WARN (1 ,"Invalid gpio bank_type\n" );
arch/arm/plat-omap/include/plat/gpio.h +5 -0
@@ -182,6 +182,11 @@ struct omap_gpio_reg_offs {u16 clr_dataout;u16 irqstatus;u16 irqstatus2; +u16 irqenable; +u16 set_irqenable; +u16 clr_irqenable; + +bool irqenable_inv; };struct omap_gpio_platform_data {
drivers/gpio/gpio_omap.c +30 -99
168 lines not on this page · raw message
Signature · 1 line
1.7.3.4
PATCH 10/14 GPIO: OMAP: convert MPUIO IRQ over to generic irq_chip
In reply to Kevin HilmanMPUIO banks have their own dedicated IRQ chip interface, separate from
the "normal" GPIO banks. Convert the MPUIO IRQ chip over to using
the new generic IRQ chip interface.
--- drivers/gpio/gpio_omap.c | 74 ++++++++++++++++++--------------------------- 1 files changed, 30 insertions(+), 44 deletions(-)
drivers/gpio/gpio_omap.c +30 -44
@@ -875,45 +875,8 @@ static struct irq_chip gpio_irq_chip = {#ifdef CONFIG_ARCH_OMAP1 -/* MPUIO uses the always-on 32k clock */ - -static void mpuio_ack_irq (struct irq_data *d) -{ -/* The ISR is reset automatically, so do nothing here. */ -} - -static void mpuio_mask_irq (struct irq_data *d) -{ -unsigned int gpio =OMAP_MPUIO (d->irq -IH_MPUIO_BASE ); -struct gpio_bank *bank =irq_data_get_irq_chip_data (d); - -_set_gpio_irqenable (bank, gpio,0 ); -} - -static void mpuio_unmask_irq (struct irq_data *d) -{ -unsigned int gpio =OMAP_MPUIO (d->irq -IH_MPUIO_BASE ); -struct gpio_bank *bank =irq_data_get_irq_chip_data (d); - -_set_gpio_irqenable (bank, gpio,1 ); -} - -static struct irq_chip mpuio_irq_chip = { - .name ="MPUIO" , - .irq_ack = mpuio_ack_irq, - .irq_mask = mpuio_mask_irq, - .irq_unmask = mpuio_unmask_irq, - .irq_set_type = gpio_irq_type, -#ifdef CONFIG_ARCH_OMAP16XX -/* REVISIT: assuming only 16xx supports MPUIO wake events */ - .irq_set_wake = gpio_wake_enable, -#endif -}; - -#define bank_is_mpuio (bank) ((bank)->method == METHOD_MPUIO) -#ifdef CONFIG_ARCH_OMAP16XX #include <linux/platform_device.h>
@@ -988,8 +951,6 @@ static inline void mpuio_init(void) {}#else -extern struct irq_chip mpuio_irq_chip; -#define bank_is_mpuio (bank) 0static inline void mpuio_init (void ) {}
@@ -1189,6 +1150,30 @@ static void omap_gpio_mod_init(struct gpio_bank *bank, int id) } } +static __init void +omap_mpuio_alloc_gc (struct gpio_bank *bank,unsigned int irq_start, +unsigned int num) +{ +struct irq_chip_generic *gc; +struct irq_chip_type *ct; + + gc =irq_alloc_generic_chip ("MPUIO" ,1 , irq_start, bank->base, + handle_simple_irq); + ct = gc->chip_types; + +/* NOTE: No ack required, reading IRQ status clears it. */ + ct->chip.irq_mask = irq_gc_mask_set_bit; + ct->chip.irq_unmask = irq_gc_mask_clr_bit; + ct->chip.irq_set_type = gpio_irq_type; +/* REVISIT: assuming only 16xx supports MPUIO wake events */ +if (cpu_is_omap16xx ()) + ct->chip.irq_set_wake = gpio_wake_enable, + + ct->regs.mask =OMAP_MPUIO_GPIO_INT / bank->stride; +irq_setup_generic_chip (gc,IRQ_MSK (num),IRQ_GC_INIT_MASK_CACHE , +IRQ_NOREQUEST |IRQ_NOPROBE ,0 ); +} +static void __init omap_gpio_chip_init (struct gpio_bank *bank) {int j;
@@ -1226,12 +1211,13 @@ static void __init omap_gpio_chip_init(struct gpio_bank *bank) j < bank->virtual_irq_start + bank->width; j++) {irq_set_lockdep_class (j, &gpio_lock_class);irq_set_chip_data (j, bank); -if (bank_is_mpuio (bank)) -irq_set_chip (j, &mpuio_irq_chip); -else +if (bank_is_mpuio (bank)) { +omap_mpuio_alloc_gc (bank, j, bank->width); + }else {irq_set_chip (j, &gpio_irq_chip); -irq_set_handler (j, handle_simple_irq); -set_irq_flags (j,IRQF_VALID ); +irq_set_handler (j, handle_simple_irq); +set_irq_flags (j,IRQF_VALID ); + } }irq_set_chained_handler (bank->irq, gpio_irq_handler);irq_set_handler_data (bank->irq, bank);
Signature · 1 line
1.7.3.4
PATCH 11/14 GPIO: OMAP: remove useless gpio_valid() & check_gpio() checks
In reply to Kevin HilmanThese functions are useless. They are only called in a few places, and where they are called, the GPIO has already been converted from an IRQ or masked, so these functions will never fail.
--- drivers/gpio/gpio_omap.c | 45 --------------------------------------------- 1 files changed, 0 insertions(+), 45 deletions(-)
drivers/gpio/gpio_omap.c +0 -45
@@ -90,40 +90,6 @@ int gpio_bank_count;#define GPIO_INDEX (bank, gpio) (gpio % bank->width)#define GPIO_BIT (bank, gpio) (1 << GPIO_INDEX(bank, gpio)) -static inline int gpio_valid (int gpio) -{ -if (gpio <0 ) -return -1 ; -if (cpu_class_is_omap1 () &&OMAP_GPIO_IS_MPUIO (gpio)) { -if (gpio >=OMAP_MAX_GPIO_LINES +16 ) -return -1 ; -return 0 ; - } -if (cpu_is_omap15xx () && gpio <16 ) -return 0 ; -if ((cpu_is_omap16xx ()) && gpio <64 ) -return 0 ; -if (cpu_is_omap7xx () && gpio <192 ) -return 0 ; -if (cpu_is_omap2420 () && gpio <128 ) -return 0 ; -if (cpu_is_omap2430 () && gpio <160 ) -return 0 ; -if ((cpu_is_omap34xx () ||cpu_is_omap44xx ()) && gpio <192 ) -return 0 ; -return -1 ; -} - -static int check_gpio (int gpio) -{ -if (unlikely (gpio_valid (gpio) <0 )) { -printk (KERN_ERR "omap-gpio: invalid GPIO %d\n" , gpio); -dump_stack (); -return -1 ; - } -return 0 ; -} -static void _set_gpio_direction (struct gpio_bank *bank,int gpio,int is_input) {void __iomem *reg = bank->base;
@@ -172,9 +138,6 @@ static int _get_gpio_datain(struct gpio_bank *bank, int gpio) {void __iomem *reg = bank->base + bank->regs->datain; -if (check_gpio (gpio) <0 ) -return -EINVAL ; -return (__raw_readl (reg) &GPIO_BIT (bank, gpio)) !=0 ; }
@@ -182,9 +145,6 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio) {void __iomem *reg = bank->base + bank->regs->dataout; -if (check_gpio (gpio) <0 ) -return -EINVAL ; -return (__raw_readl (reg) &GPIO_BIT (bank, gpio)) !=0 ; }
@@ -461,9 +421,6 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)else gpio = d->irq -IH_GPIO_BASE ; -if (check_gpio (gpio) <0 ) -return -EINVAL ; -if (type & ~IRQ_TYPE_SENSE_MASK )return -EINVAL ;
@@ -629,8 +586,6 @@ static int gpio_wake_enable(struct irq_data *d, unsigned int enable)struct gpio_bank *bank;int retval; -if (check_gpio (gpio) <0 ) -return -ENODEV ; bank =irq_data_get_irq_chip_data (d); retval =_set_gpio_wakeup (bank,GPIO_INDEX (bank, gpio), enable);
Signature · 1 line
1.7.3.4
PATCH 12/14 GPIO: OMAP: cleanup _set_gpio_wakeup(), remove ifdefs
In reply to Kevin HilmanMake _set_gpio_wakeup() generic by removing ifdefs. Code for the various SoCs/bank-methods was already the same, except for the non-wakeup GPIO checking. But that flag is set on a per-SoC basis, so can be used for all SoCs.
While here, use dev_err() and remove GPIO bank calculation assumption based on subtracting bank pointers.
--- drivers/gpio/gpio_omap.c | 50 ++++++++++++++------------------------------- 1 files changed, 16 insertions(+), 34 deletions(-)
drivers/gpio/gpio_omap.c +16 -34
@@ -533,42 +533,24 @@ static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int ena*/ static int _set_gpio_wakeup (struct gpio_bank *bank,int gpio,int enable) { -unsigned long uninitialized_var (flags ); +u32 gpio_bit =GPIO_BIT (bank, gpio); +unsigned long flags; -switch (bank->method) { -#ifdef CONFIG_ARCH_OMAP16XX -case METHOD_MPUIO : -case METHOD_GPIO_1610 : -spin_lock_irqsave (&bank->lock, flags); -if (enable) - bank->suspend_wakeup |= (1 << gpio); -else - bank->suspend_wakeup &= ~(1 << gpio); -spin_unlock_irqrestore (&bank->lock, flags); -return 0 ; -#endif -#ifdef CONFIG_ARCH_OMAP2PLUS -case METHOD_GPIO_24XX : -case METHOD_GPIO_44XX : -if (bank->non_wakeup_gpios & (1 << gpio)) { -printk (KERN_ERR "Unable to modify wakeup on " -"non-wakeup GPIO%d\n" , - (bank - gpio_bank) * bank->width + gpio); -return -EINVAL ; - } -spin_lock_irqsave (&bank->lock, flags); -if (enable) - bank->suspend_wakeup |= (1 << gpio); -else - bank->suspend_wakeup &= ~(1 << gpio); -spin_unlock_irqrestore (&bank->lock, flags); -return 0 ; -#endif -default : -printk (KERN_ERR "Can't enable GPIO wakeup for method %i\n" , - bank->method); +if (bank->non_wakeup_gpios & gpio_bit) { +dev_err (bank->dev, +"Unable to modify wakeup on non-wakeup GPIO%d\n" , gpio);return -EINVAL ; } + +spin_lock_irqsave (&bank->lock, flags); +if (enable) + bank->suspend_wakeup |= gpio_bit; +else + bank->suspend_wakeup &= ~gpio_bit; + +spin_unlock_irqrestore (&bank->lock, flags); + +return 0 ; }static void _reset_gpio (struct gpio_bank *bank,int gpio)
@@ -587,7 +569,7 @@ static int gpio_wake_enable(struct irq_data *d, unsigned int enable)int retval; bank =irq_data_get_irq_chip_data (d); - retval =_set_gpio_wakeup (bank,GPIO_INDEX (bank, gpio), enable); + retval =_set_gpio_wakeup (bank, gpio, enable);return retval; }
Signature · 1 line
1.7.3.4
PATCH 13/14 GPIO: OMAP: debounce remove SoC specific registers, use pdata
In reply to Kevin HilmanUse register offsets passed in from pdata for accessing debounce registers.
--- arch/arm/mach-omap2/gpio.c | 4 ++++ arch/arm/plat-omap/include/plat/gpio.h | 2 ++ drivers/gpio/gpio_omap.c | 15 +++------------ 3 files changed, 9 insertions(+), 12 deletions(-)
arch/arm/mach-omap2/gpio.c +4 -0
@@ -81,6 +81,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) pdata->regs->irqenable =OMAP24XX_GPIO_IRQENABLE1 ; pdata->regs->set_irqenable =OMAP24XX_GPIO_SETIRQENABLE1 ; pdata->regs->clr_irqenable =OMAP24XX_GPIO_CLEARIRQENABLE1 ; + pdata->regs->debounce =OMAP24XX_GPIO_DEBOUNCE_VAL ; + pdata->regs->debounce_en =OMAP24XX_GPIO_DEBOUNCE_EN ;break ;case 2 : pdata->bank_type =METHOD_GPIO_44XX ;
@@ -94,6 +96,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) pdata->regs->irqenable =OMAP4_GPIO_IRQSTATUSSET0 ; pdata->regs->set_irqenable =OMAP4_GPIO_IRQSTATUSSET0 ; pdata->regs->clr_irqenable =OMAP4_GPIO_IRQSTATUSCLR0 ; + pdata->regs->debounce =OMAP4_GPIO_DEBOUNCINGTIME ; + pdata->regs->debounce_en =OMAP4_GPIO_DEBOUNCENABLE ;break ;default :WARN (1 ,"Invalid gpio bank_type\n" );
arch/arm/plat-omap/include/plat/gpio.h +2 -0
@@ -185,6 +185,8 @@ struct omap_gpio_reg_offs {u16 irqenable;u16 set_irqenable;u16 clr_irqenable; +u16 debounce; +u16 debounce_en;bool irqenable_inv; };
drivers/gpio/gpio_omap.c +3 -12
@@ -168,7 +168,7 @@ do { \static void _set_gpio_debounce (struct gpio_bank *bank,unsigned gpio,unsigned debounce) { -void __iomem *reg = bank->base; +void __iomem *reg;u32 val;u32 l;
@@ -184,19 +184,10 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio, l =GPIO_BIT (bank, gpio); -if (bank->method ==METHOD_GPIO_44XX ) - reg +=OMAP4_GPIO_DEBOUNCINGTIME ; -else - reg +=OMAP24XX_GPIO_DEBOUNCE_VAL ; - + reg = bank->base + bank->regs->debounce;__raw_writel (debounce, reg); - reg = bank->base; -if (bank->method ==METHOD_GPIO_44XX ) - reg +=OMAP4_GPIO_DEBOUNCENABLE ; -else - reg +=OMAP24XX_GPIO_DEBOUNCE_EN ; - + reg = bank->base + bank->regs->debounce_en; val =__raw_readl (reg);if (debounce) {
Signature · 1 line
1.7.3.4
PATCH 14/14 GPIO: OMAP: cleanup show revision, remove cpu_is checks, display only once
In reply to Kevin HilmanRemove cpu_is_* checks from gpio_show_revision() by passing in the revision address offset from platform data. SoCs with no revision register (15xx, 7xx, and all MPUIOs) use -1 (actually, USHRT_MAX) to signify no register.
While here, all GPIO banks are assumed to be the same revision, so fix show_revision() to only show the revision for the first bank it finds. This removes duplicate GPIO revision prints during boot.
Thanks to Charulatha V <[email protected]> for finding/fixing a few -1s that were missed in the original patch.
--- arch/arm/mach-omap1/gpio15xx.c | 2 ++ arch/arm/mach-omap1/gpio16xx.c | 2 ++ arch/arm/mach-omap1/gpio7xx.c | 2 ++ arch/arm/mach-omap2/gpio.c | 2 ++ arch/arm/plat-omap/include/plat/gpio.h | 1 + drivers/gpio/gpio_omap.c | 14 ++++++-------- 6 files changed, 15 insertions(+), 8 deletions(-)
arch/arm/mach-omap1/gpio15xx.c +2 -0
@@ -35,6 +35,7 @@ static struct __initdata resource omap15xx_mpu_gpio_resources[] = { };static struct omap_gpio_reg_offs omap15xx_mpuio_regs = { + .revision =USHRT_MAX , .direction =OMAP_MPUIO_IO_CNTL , .datain =OMAP_MPUIO_INPUT_LATCH , .dataout =OMAP_MPUIO_OUTPUT ,
@@ -75,6 +76,7 @@ static struct __initdata resource omap15xx_gpio_resources[] = { };static struct omap_gpio_reg_offs omap15xx_gpio_regs = { + .revision =USHRT_MAX , .direction =OMAP1510_GPIO_DIR_CONTROL , .datain =OMAP1510_GPIO_DATA_INPUT , .dataout =OMAP1510_GPIO_DATA_OUTPUT ,
arch/arm/mach-omap1/gpio16xx.c +2 -0
@@ -38,6 +38,7 @@ static struct __initdata resource omap16xx_mpu_gpio_resources[] = { };static struct omap_gpio_reg_offs omap16xx_mpuio_regs = { + .revision =USHRT_MAX , .direction =OMAP_MPUIO_IO_CNTL , .datain =OMAP_MPUIO_INPUT_LATCH , .dataout =OMAP_MPUIO_OUTPUT ,
@@ -78,6 +79,7 @@ static struct __initdata resource omap16xx_gpio1_resources[] = { };static struct omap_gpio_reg_offs omap16xx_gpio_regs = { + .revision =OMAP1610_GPIO_REVISION , .direction =OMAP1610_GPIO_DIRECTION , .set_dataout =OMAP1610_GPIO_SET_DATAOUT , .clr_dataout =OMAP1610_GPIO_CLEAR_DATAOUT ,
arch/arm/mach-omap1/gpio7xx.c +2 -0
@@ -40,6 +40,7 @@ static struct __initdata resource omap7xx_mpu_gpio_resources[] = { };static struct omap_gpio_reg_offs omap7xx_mpuio_regs = { + .revision =USHRT_MAX , .direction =OMAP_MPUIO_IO_CNTL /2 , .datain =OMAP_MPUIO_INPUT_LATCH /2 , .dataout =OMAP_MPUIO_OUTPUT /2 ,
@@ -80,6 +81,7 @@ static struct __initdata resource omap7xx_gpio1_resources[] = { };static struct omap_gpio_reg_offs omap7xx_gpio_regs = { + .revision =USHRT_MAX , .direction =OMAP7XX_GPIO_DIR_CONTROL , .datain =OMAP7XX_GPIO_DATA_INPUT , .dataout =OMAP7XX_GPIO_DATA_OUTPUT ,
arch/arm/mach-omap2/gpio.c +2 -0
@@ -71,6 +71,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)case 0 :case 1 : pdata->bank_type =METHOD_GPIO_24XX ; + pdata->regs->revision =OMAP24XX_GPIO_REVISION ; pdata->regs->direction =OMAP24XX_GPIO_OE ; pdata->regs->datain =OMAP24XX_GPIO_DATAIN ; pdata->regs->dataout =OMAP24XX_GPIO_DATAOUT ;
@@ -86,6 +87,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)break ;case 2 : pdata->bank_type =METHOD_GPIO_44XX ; + pdata->regs->revision =OMAP4_GPIO_REVISION ; pdata->regs->direction =OMAP4_GPIO_OE ; pdata->regs->datain =OMAP4_GPIO_DATAIN ; pdata->regs->dataout =OMAP4_GPIO_DATAOUT ;
arch/arm/plat-omap/include/plat/gpio.h +1 -0
@@ -175,6 +175,7 @@ struct omap_gpio_dev_attr { };struct omap_gpio_reg_offs { +u16 revision;u16 direction;u16 datain;u16 dataout;
drivers/gpio/gpio_omap.c +6 -8
@@ -984,19 +984,17 @@ static int gpio_2irq(struct gpio_chip *chip, unsigned offset)static void __init omap_gpio_show_rev (struct gpio_bank *bank) { +static bool called;u32 rev; -if (cpu_is_omap16xx () && !(bank->method !=METHOD_MPUIO )) - rev =__raw_readw (bank->base +OMAP1610_GPIO_REVISION ); -else if (cpu_is_omap24xx () ||cpu_is_omap34xx ()) - rev =__raw_readl (bank->base +OMAP24XX_GPIO_REVISION ); -else if (cpu_is_omap44xx ()) - rev =__raw_readl (bank->base +OMAP4_GPIO_REVISION ); -else +if (called || bank->regs->revision ==USHRT_MAX )return ; -printk (KERN_INFO "OMAP GPIO hardware version %d.%d\n" , + rev =__raw_readw (bank->base + bank->regs->revision); +pr_info ("OMAP GPIO hardware version %d.%d\n" , (rev >>4 ) &0x0f , rev &0x0f ); + + called = true; }/* This lock class tells lockdep that GPIO irqs are in a different
Signature · 1 line
1.7.3.4
cover GPIO: OMAP: first round of cleanup
In reply to Kevin HilmanQuoted 18 lines · Kevin Hilman
Start moving SoC-specific register handling out of the driver by passing in register offsets in via platform data.
Also, move OMAP1 MPUIO IRQ handling over to genric IRQ chip.
Applies on top of Tony's for-next branch (which include's the generic IRQ chip work from tglx) and the OMAP GPIO driver move to
drivers/gpio.Charulatha V (1):
GPIO: OMAP: removeget_gpio_bank()Kevin Hilman (13):
GPIO: OMAP:_clear_gpio_irqbank: fix flushing of posted write
GPIO: OMAP: remove MPUIO handling from_clear_gpio_irqbank()
GPIO: OMAP: move bank width into structgpio_bank
GPIO: OMAP:_get_gpio_irqbank_mask: replace hard-coded mask withbank->width
Quoted 10 lines
GPIO: OMAP: replace
get_gpio_index()by using bank width
GPIO: OMAP: consolidate direction, input, output, remove #ifdefs
GPIO: OMAP: consolidate IRQ status handling, remove #ifdefs
GPIO: OMAP: conslidate enable/disable of GPIO IRQs, remove ifdefs
GPIO: OMAP: convert MPUIO IRQ over to genericirq_chip
GPIO: OMAP: remove uselessgpio_valid()&check_gpio()checks
GPIO: OMAP: cleanup_set_gpio_wakeup(), remove ifdefs
GPIO: OMAP: debounce remove SoC specific registers, use pdata
GPIO: OMAP: cleanup show revision, removecpu_ischecks, display only
once
looks good
Best Regards,
J.
cover GPIO: OMAP: first round of cleanup
In reply to Kevin HilmanQuoted 8 lines · Kevin Hilman
Start moving SoC-specific register handling out of the driver by passing in register offsets in via platform data.
Also, move OMAP1 MPUIO IRQ handling over to genric IRQ chip.
Applies on top of Tony's for-next branch (which include's the generic IRQ chip work from tglx) and the OMAP GPIO driver move to
drivers/gpio.
Hey Kevin,
If you've got a branch with this series in it and tested, then I'd be happy to pull that instead of applying the patches myself.
g.
Quoted 32 lines
Charulatha V (1):
GPIO: OMAP: removeget_gpio_bank()Kevin Hilman (13):
GPIO: OMAP:_clear_gpio_irqbank: fix flushing of posted write
GPIO: OMAP: remove MPUIO handling from_clear_gpio_irqbank()
GPIO: OMAP: move bank width into structgpio_bank
GPIO: OMAP:_get_gpio_irqbank_mask: replace hard-coded mask withbank->widthGPIO: OMAP: replace
get_gpio_index()by using bank width
GPIO: OMAP: consolidate direction, input, output, remove #ifdefs
GPIO: OMAP: consolidate IRQ status handling, remove #ifdefs
GPIO: OMAP: conslidate enable/disable of GPIO IRQs, remove ifdefs
GPIO: OMAP: convert MPUIO IRQ over to genericirq_chip
GPIO: OMAP: remove uselessgpio_valid()&check_gpio()checks
GPIO: OMAP: cleanup_set_gpio_wakeup(), remove ifdefs
GPIO: OMAP: debounce remove SoC specific registers, use pdata
GPIO: OMAP: cleanup show revision, removecpu_ischecks, display only
oncearch/arm/mach-omap1/gpio15xx.c | 22 + arch/arm/mach-omap1/gpio16xx.c | 28 ++ arch/arm/mach-omap1/gpio7xx.c | 27 ++ arch/arm/mach-omap2/gpio.c | 32 ++ arch/arm/plat-omap/include/plat/gpio.h | 20 + drivers/gpio/gpio_omap.c | 723 +++++++------------------------- 6 files changed, 282 insertions(+), 570 deletions(-)Signature · 1 line
1.7.3.4
cover GPIO: OMAP: first round of cleanup
Hi Grant,
Quoted 6 lines · Grant Likely
Quoted 5 lines · Kevin Hilman
Start moving SoC-specific register handling out of the driver by passing in register offsets in via platform data.
Also, move OMAP1 MPUIO IRQ handling over to genric IRQ chip.
Quoted 9 lines
Quoted 3 lines
Applies on top of Tony's for-next branch (which include's the generic IRQ chip work from tglx) and the OMAP GPIO driver move to
drivers/gpio.Hey Kevin,
If you've got a branch with this series in it and tested, then I'd be happy to pull that instead of applying the patches myself.
Being very late in the cycle, I'd prefer to save this for 2.6.41. Let's just do the move for 2.6.40, and I'll (re)submit this early in the 2.6.41 cycle.
Thanks,
Kevin
cover GPIO: OMAP: first round of cleanup
In reply to Grant LikelyQuoted 6 lines · Grant Likely
Quoted 5 lines · Kevin Hilman
Start moving SoC-specific register handling out of the driver by passing in register offsets in via platform data.
Also, move OMAP1 MPUIO IRQ handling over to genric IRQ chip.
Quoted 9 lines
Quoted 3 lines
Applies on top of Tony's for-next branch (which include's the generic IRQ chip work from tglx) and the OMAP GPIO driver move to
drivers/gpio.Hey Kevin,
If you've got a branch with this series in it and tested, then I'd be happy to pull that instead of applying the patches myself.
OK, I rebased this on v3.0-rc2 and now it's been through quite a bit more testing.
Here's a branch for you.
Also FYI, we'll probably have 2nd round of GPIO cleanups/updates and runtime PM conversion for the upcoming merge window too.
Kevin
The following changes since commit 2c53b436a30867eb6b47dd7bab23ba638d1fb0d2:
Linux 3.0-rc3 (2011-06-13 15:29:59 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.git for_3.1/gpio-cleanup
Charulatha V (1):
GPIO: OMAP: remove get_gpio_bank()
Kevin Hilman (13):
GPIO: OMAP: _clear_gpio_irqbank: fix flushing of posted write
GPIO: OMAP: remove MPUIO handling from _clear_gpio_irqbank()
GPIO: OMAP: move bank width into struct gpio_bank
GPIO: OMAP: _get_gpio_irqbank_mask: replace hard-coded mask with bank->width
GPIO: OMAP: replace get_gpio_index() by using bank width
GPIO: OMAP: consolidate direction, input, output, remove #ifdefs
GPIO: OMAP: consolidate IRQ status handling, remove #ifdefs
GPIO: OMAP: conslidate enable/disable of GPIO IRQs, remove ifdefs
GPIO: OMAP: convert MPUIO IRQ over to generic irq_chip
GPIO: OMAP: remove useless gpio_valid() & check_gpio() checks
GPIO: OMAP: cleanup _set_gpio_wakeup(), remove ifdefs
GPIO: OMAP: debounce remove SoC specific registers, use pdata
GPIO: OMAP: cleanup show revision, remove cpu_is checks, display only once
arch/arm/mach-omap1/gpio15xx.c | 22 + arch/arm/mach-omap1/gpio16xx.c | 28 ++ arch/arm/mach-omap1/gpio7xx.c | 27 ++ arch/arm/mach-omap2/gpio.c | 32 ++ arch/arm/plat-omap/include/plat/gpio.h | 20 + drivers/gpio/gpio-omap.c | 723 +++++++------------------------- 6 files changed, 282 insertions(+), 570 deletions(-)
cover GPIO: OMAP: first round of cleanup
Quoted 14 lines · Kevin Hilman
Quoted 12 lines · Grant Likely
Quoted 8 lines · Kevin Hilman
Start moving SoC-specific register handling out of the driver by passing in register offsets in via platform data.
Also, move OMAP1 MPUIO IRQ handling over to genric IRQ chip.
Applies on top of Tony's for-next branch (which include's the generic IRQ chip work from tglx) and the OMAP GPIO driver move to
drivers/gpio.Hey Kevin,
Quoted 8 lines
Quoted 3 lines
If you've got a branch with this series in it and tested, then I'd be happy to pull that instead of applying the patches myself.
OK, I rebased this on v3.0-rc2 and now it's been through quite a bit more testing.
Here's a branch for you.
Thanks. A minor comment though...
Quoted 3 lines
Also FYI, we'll probably have 2nd round of GPIO cleanups/updates and runtime PM conversion for the upcoming merge window too.
Okay.
Quoted 13 lines
Kevin
The following changes since commit
2c53b436a30867eb6b47dd7bab23ba638d1fb0d2:Linux 3.0-rc3 (2011-06-13 15:29:59 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.gitfor_3.1/gpio-cleanupCharulatha V (1):
GPIO: OMAP: removeget_gpio_bank()
Quoted 14 lines
Kevin Hilman (13):
GPIO: OMAP:_clear_gpio_irqbank: fix flushing of posted write
GPIO: OMAP: remove MPUIO handling from_clear_gpio_irqbank()
GPIO: OMAP: move bank width into structgpio_bank
GPIO: OMAP:_get_gpio_irqbank_mask: replace hard-coded mask withbank->width
GPIO: OMAP: replaceget_gpio_index()by using bank width
GPIO: OMAP: consolidate direction, input, output, remove #ifdefs
GPIO: OMAP: consolidate IRQ status handling, remove #ifdefs
GPIO: OMAP: conslidate enable/disable of GPIO IRQs, remove ifdefs
GPIO: OMAP: convert MPUIO IRQ over to genericirq_chip
GPIO: OMAP: remove uselessgpio_valid()&check_gpio()checks
GPIO: OMAP: cleanup_set_gpio_wakeup(), remove ifdefs
GPIO: OMAP: debounce remove SoC specific registers, use pdata
GPIO: OMAP: cleanup show revision, removecpu_ischecks, display only once
Use this form for the patch summaries please: "gpio/omap: ...."
It's better for the pull req to Linus when all the gpio patches look the same.
Thanks,
g.
cover GPIO: OMAP: first round of cleanup
Quoted 60 lines · Grant Likely
Quoted 14 lines · Kevin Hilman
Quoted 12 lines · Grant Likely
Quoted 8 lines · Kevin Hilman
Start moving SoC-specific register handling out of the driver by passing in register offsets in via platform data.
Also, move OMAP1 MPUIO IRQ handling over to genric IRQ chip.
Applies on top of Tony's for-next branch (which include's the generic IRQ chip work from tglx) and the OMAP GPIO driver move to
drivers/gpio.Hey Kevin,
Quoted 8 lines
Quoted 3 lines
If you've got a branch with this series in it and tested, then I'd be happy to pull that instead of applying the patches myself.
OK, I rebased this on v3.0-rc2 and now it's been through quite a bit more testing.
Here's a branch for you.
Thanks. A minor comment though...
Quoted 3 lines
Also FYI, we'll probably have 2nd round of GPIO cleanups/updates and runtime PM conversion for the upcoming merge window too.
Okay.
Quoted 13 lines
Kevin
The following changes since commit
2c53b436a30867eb6b47dd7bab23ba638d1fb0d2:Linux 3.0-rc3 (2011-06-13 15:29:59 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.gitfor_3.1/gpio-cleanupCharulatha V (1):
GPIO: OMAP: removeget_gpio_bank()Quoted 14 lines
Kevin Hilman (13):
GPIO: OMAP:_clear_gpio_irqbank: fix flushing of posted write
GPIO: OMAP: remove MPUIO handling from_clear_gpio_irqbank()
GPIO: OMAP: move bank width into structgpio_bank
GPIO: OMAP:_get_gpio_irqbank_mask: replace hard-coded mask withbank->width
GPIO: OMAP: replaceget_gpio_index()by using bank width
GPIO: OMAP: consolidate direction, input, output, remove #ifdefs
GPIO: OMAP: consolidate IRQ status handling, remove #ifdefs
GPIO: OMAP: conslidate enable/disable of GPIO IRQs, remove ifdefs
GPIO: OMAP: convert MPUIO IRQ over to genericirq_chip
GPIO: OMAP: remove uselessgpio_valid()&check_gpio()checks
GPIO: OMAP: cleanup_set_gpio_wakeup(), remove ifdefs
GPIO: OMAP: debounce remove SoC specific registers, use pdata
GPIO: OMAP: cleanup show revision, removecpu_ischecks, display only once
Quoted 3 lines
Use this form for the patch summaries please: "gpio/omap: ...."
It's better for the pull req to Linus when all the gpio patches look the same.
heh, every subsystem has it's own conventions.
OK, reworded the shortlogs, re-spun it and re-pushed to the same branch name. It might not be to all the mirrors yet, so you might want to pull using ssh://master.kernel.org/...
The following changes since commit 2c53b436a30867eb6b47dd7bab23ba638d1fb0d2:
Linux 3.0-rc3 (2011-06-13 15:29:59 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.git for_3.1/gpio-cleanup
Charulatha V (1):
gpio/omap: remove get_gpio_bank()
Kevin Hilman (13):
gpio/omap: _clear_gpio_irqbank: fix flushing of posted write gpio/omap: remove MPUIO handling from _clear_gpio_irqbank() gpio/omap: move bank width into struct gpio_bank
gpio/omap: _get_gpio_irqbank_mask: replace hard-coded mask with bank->width gpio/omap: replace get_gpio_index() by using bank width gpio/omap: consolidate direction, input, output, remove #ifdefs gpio/omap: consolidate IRQ status handling, remove #ifdefs gpio/omap: conslidate enable/disable of GPIO IRQs, remove ifdefs gpio/omap: convert MPUIO IRQ over to generic irq_chip gpio/omap: remove useless gpio_valid() & check_gpio() checks gpio/omap: cleanup _set_gpio_wakeup(), remove ifdefs gpio/omap: debounce remove SoC specific registers, use pdata gpio/omap: cleanup show revision, remove cpu_is checks, display only once
arch/arm/mach-omap1/gpio15xx.c | 22 + arch/arm/mach-omap1/gpio16xx.c | 28 ++ arch/arm/mach-omap1/gpio7xx.c | 27 ++ arch/arm/mach-omap2/gpio.c | 32 ++ arch/arm/plat-omap/include/plat/gpio.h | 20 + drivers/gpio/gpio-omap.c | 723 +++++++------------------------- 6 files changed, 282 insertions(+), 570 deletions(-)
Grant Likely
Appliedcover GPIO: OMAP: first round of cleanup
Quoted 64 lines · Kevin Hilman
Quoted 62 lines · Grant Likely
Quoted 14 lines · Kevin Hilman
Quoted 12 lines · Grant Likely
Quoted 8 lines · Kevin Hilman
Start moving SoC-specific register handling out of the driver by passing in register offsets in via platform data.
Also, move OMAP1 MPUIO IRQ handling over to genric IRQ chip.
Applies on top of Tony's for-next branch (which include's the generic IRQ chip work from tglx) and the OMAP GPIO driver move to
drivers/gpio.Hey Kevin,
Quoted 8 lines
Quoted 3 lines
If you've got a branch with this series in it and tested, then I'd be happy to pull that instead of applying the patches myself.
OK, I rebased this on v3.0-rc2 and now it's been through quite a bit more testing.
Here's a branch for you.
Thanks. A minor comment though...
Quoted 3 lines
Also FYI, we'll probably have 2nd round of GPIO cleanups/updates and runtime PM conversion for the upcoming merge window too.
Okay.
Quoted 13 lines
Kevin
The following changes since commit
2c53b436a30867eb6b47dd7bab23ba638d1fb0d2:Linux 3.0-rc3 (2011-06-13 15:29:59 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.gitfor_3.1/gpio-cleanupCharulatha V (1):
GPIO: OMAP: removeget_gpio_bank()Quoted 14 lines
Kevin Hilman (13):
GPIO: OMAP:_clear_gpio_irqbank: fix flushing of posted write
GPIO: OMAP: remove MPUIO handling from_clear_gpio_irqbank()
GPIO: OMAP: move bank width into structgpio_bank
GPIO: OMAP:_get_gpio_irqbank_mask: replace hard-coded mask withbank->width
GPIO: OMAP: replaceget_gpio_index()by using bank width
GPIO: OMAP: consolidate direction, input, output, remove #ifdefs
GPIO: OMAP: consolidate IRQ status handling, remove #ifdefs
GPIO: OMAP: conslidate enable/disable of GPIO IRQs, remove ifdefs
GPIO: OMAP: convert MPUIO IRQ over to genericirq_chip
GPIO: OMAP: remove uselessgpio_valid()&check_gpio()checks
GPIO: OMAP: cleanup_set_gpio_wakeup(), remove ifdefs
GPIO: OMAP: debounce remove SoC specific registers, use pdata
GPIO: OMAP: cleanup show revision, removecpu_ischecks, display only onceUse this form for the patch summaries please: "gpio/omap: ...."
Quoted 7 lines
Quoted 1 line
It's better for the pull req to Linus when all the gpio patches look the same.
heh, every subsystem has it's own conventions.
OK, reworded the shortlogs, re-spun it and re-pushed to the same branch name. It might not be to all the mirrors yet, so you might want to pull using ssh://master.kernel.org/...
Merged, thanks.
g.