arm64: dts: marvell: add generic-ahci compatibles for CP110 ahci
Subsystems (2)
PATCH 1/1 arm64: dts: marvell: add generic-ahci compatibles for CP110 ahci
Testing with an Armada 8040 board shows that adding the generic-ahci compatible to the CP110 AHCI nodes gets us working AHCI on the board. A previous patch series posted by Thomas Petazzoni was retracted when it was realised that the IP was supposed to be, and is, compatible with the standard register layout.
Add this compatible.
--- arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 3 ++- arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi +2 -1
@@ -128,7 +128,8 @@ }; cpm_sata0: sata at 540000 { - compatible = "marvell,armada-8k-ahci"; + compatible = "marvell,armada-8k-ahci", + "generic-ahci"; reg = <0x540000 0x30000>; interrupts = <ICU_GRP_NSR 107 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpm_syscon0 1 15>;
arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi +2 -1
@@ -128,7 +128,8 @@ }; cps_sata0: sata at 540000 { - compatible = "marvell,armada-8k-ahci"; + compatible = "marvell,armada-8k-ahci", + "generic-ahci"; reg = <0x540000 0x30000>; interrupts = <ICU_GRP_NSR 107 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cps_syscon0 1 15>;
Signature · 1 line
2.7.4
PATCH 1/1 arm64: dts: marvell: add generic-ahci compatibles for CP110 ahci
Quoted 9 lines · Russell King
Testing with an Armada 8040 board shows that adding the generic-ahci compatible to the CP110 AHCI nodes gets us working AHCI on the board. A previous patch series posted by Thomas Petazzoni was retracted when it was realised that the IP was supposed to be, and is, compatible with the standard register layout.
Add this compatible.
Signed-off-by Russell King <[email protected]>
Assuming the above is correct this looks sane to me. FWIW:
Mark.
Quoted 36 lines
--- arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 3 ++- arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-)arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi +2
-1@@ -128,7 +128,8 @@ }; cpm_sata0: sata at 540000 { - compatible = "marvell,armada-8k-ahci"; + compatible = "marvell,armada-8k-ahci", + "generic-ahci"; reg = <0x540000 0x30000>; interrupts = <ICU_GRP_NSR 107 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpm_syscon0 1 15>;arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi +2
-1@@ -128,7 +128,8 @@ }; cps_sata0: sata at 540000 { - compatible = "marvell,armada-8k-ahci"; + compatible = "marvell,armada-8k-ahci", + "generic-ahci"; reg = <0x540000 0x30000>; interrupts = <ICU_GRP_NSR 107 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cps_syscon0 1 15>;Signature · 1 line
2.7.4
PATCH 1/1 arm64: dts: marvell: add generic-ahci compatibles for CP110 ahci
In reply to Russell KingHi Russell,
Quoted 7 lines · Russell King
Testing with an Armada 8040 board shows that adding the generic-ahci compatible to the CP110 AHCI nodes gets us working AHCI on the board. A previous patch series posted by Thomas Petazzoni was retracted when it was realised that the IP was supposed to be, and is, compatible with the standard register layout.
Add this compatible.
Applied on mvebu/dt64
(not that it didn't apply cleanly on the mainline because in mainline we don't use yet the ICU for the interrupt)
Thanks,
Gregory
Quoted 38 lines
Signed-off-by Russell King <[email protected]>--- arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 3 ++- arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-)arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi +2
-1@@ -128,7 +128,8 @@ }; cpm_sata0: sata at 540000 { - compatible = "marvell,armada-8k-ahci"; + compatible = "marvell,armada-8k-ahci", + "generic-ahci"; reg = <0x540000 0x30000>; interrupts = <ICU_GRP_NSR 107 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpm_syscon0 1 15>;arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi +2
-1@@ -128,7 +128,8 @@ }; cps_sata0: sata at 540000 { - compatible = "marvell,armada-8k-ahci"; + compatible = "marvell,armada-8k-ahci", + "generic-ahci"; reg = <0x540000 0x30000>; interrupts = <ICU_GRP_NSR 107 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cps_syscon0 1 15>;Signature · 1 line
2.7.4
Signature · 4 lines
Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com