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Introducing TI's New SoC/board AM335XEVM

PATCH Superseded Vaibhav Hiremath 3 participants 13 messages Nov 10, 2011 – Dec 20, 2011

Subsystems (4)

v4 of 5 Superseded Latest is v5 →

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#0 lore raw

v4 cover Introducing TI's New SoC/board AM335XEVM

This patch set adds support for AM335x device having Cortex-A8 MPU.

Official website - http://www.ti.com/product/am3359

AM335X is treated as another OMAP3 variant, where,
along with existing cpu class OMAP34XX, new cpu class AM33XX is created and the respective type is AM335X, which is newly added device in the family.
This means, cpu_is_omap34xx(), cpu_is_am33xx() and cpu_is_am335x() checks return success for AM335X.

Also, I have validated OMAP3 boot test with this patch-series on OMAP3EVM.

Changes from V3:
- Common platform patch has already been accepted and available under linux-omap/soc and linux-omap/master branch.
- Clean-up where cpu_is_xxxx instances are being used and patches has been submitted to the list.
- These patches have been created on top of cleanup patches -
http://www.mail-archive.com/linux-omap at vger.kernel.org/msg58276.html
http://www.mail-archive.com/linux-omap at vger.kernel.org/msg58277.html
- Based on Tony's request, rebased patches against linux-omap/fixes (+ common platform patch).

Changes from V2(RFC):

	- Rebased against Paul's OMAP_CHIP* cleanup patches
		git://git.pwsan.com/linux-2.6_omap_chip_remove_cleanup_3.2

Changes from V1(RFC):
- Created separate cpu/SoC class for AM33XX family of devices, due to all known facts. This is been mentioned in main-chain
https://patchwork.kernel.org/patch/1056312/
- BUG Fix in debug-macro.S, which was leading to build failure.
https://patchwork.kernel.org/patch/1056302/

Afzal Mohammed (3):
arm:omap:am33xx: Update common OMAP machine specific sources arm:omap:am33xx: Add AM335XEVM machine support arm:omap:am33xx: Add low level debugging support

 arch/arm/mach-omap2/Kconfig                    |    5 ++++
 arch/arm/mach-omap2/Makefile                   |    1 +
 arch/arm/mach-omap2/board-am3517evm.c          |   21 ++++++++++++++++
 arch/arm/mach-omap2/clock3xxx_data.c           |    3 ++
 arch/arm/mach-omap2/common.c                   |   21 ++++++++++++++++
 arch/arm/mach-omap2/id.c                       |    6 ++++
 arch/arm/mach-omap2/include/mach/debug-macro.S |   17 ++++++++++++-
 arch/arm/mach-omap2/io.c                       |   31 ++++++++++++++++++++++++
 arch/arm/mach-omap2/serial.c                   |    4 +-
 arch/arm/mach-omap2/timer.c                    |    2 +
 arch/arm/plat-omap/include/plat/am33xx.h       |   25 +++++++++++++++++++
 arch/arm/plat-omap/include/plat/common.h       |    4 +++
 arch/arm/plat-omap/include/plat/hardware.h     |    1 +
 arch/arm/plat-omap/include/plat/io.h           |   20 +++++++++++++++
 arch/arm/plat-omap/include/plat/omap34xx.h     |    2 +
 arch/arm/plat-omap/include/plat/serial.h       |    4 +++
 arch/arm/plat-omap/include/plat/uncompress.h   |    6 ++++
 arch/arm/plat-omap/io.c                        |    5 ++++
 18 files changed, 175 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/plat-omap/include/plat/am33xx.h
#1 lore raw

PATCH v4 1/3 arm:omap:am33xx: Update common OMAP machine specific sources

From: Afzal Mohammed <[email protected]>

This patch updates the common machine specific source files for support for AM33XX/AM335x with cpu type, macros for identification of AM33XX/AM335X device.

---
DPLL5 related comment (from KevinH) has been handled by removing the check for cpu_is_am33xx, as mentioned in thread, for am33xx dpll5 doesn't come into execution path.

And Soon I will be submitting clock/power/voltage/hwmod related patches for review.

 arch/arm/mach-omap2/clock3xxx_data.c       |    3 +++
 arch/arm/mach-omap2/common.c               |   21 +++++++++++++++++++++
 arch/arm/mach-omap2/id.c                   |    6 ++++++
 arch/arm/mach-omap2/io.c                   |   24 ++++++++++++++++++++++++
 arch/arm/mach-omap2/serial.c               |    4 ++--
 arch/arm/plat-omap/include/plat/am33xx.h   |   25 +++++++++++++++++++++++++
 arch/arm/plat-omap/include/plat/common.h   |    2 ++
 arch/arm/plat-omap/include/plat/hardware.h |    1 +
 arch/arm/plat-omap/include/plat/io.h       |   20 ++++++++++++++++++++
 arch/arm/plat-omap/include/plat/omap34xx.h |    2 ++
 arch/arm/plat-omap/io.c                    |    5 +++++
 11 files changed, 111 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/plat-omap/include/plat/am33xx.h
arch/arm/mach-omap2/clock3xxx_data.c +3 -0
index 5d0064a..c1ab6bc 100644
@@ -3517,6 +3517,9 @@ int __init omap3xxx_clk_init(void)
 	} else if (cpu_is_ti816x()) {
 		cpu_mask = RATE_IN_TI816X;
 		cpu_clkflg = CK_TI816X;
+	} else if (cpu_is_am33xx()) {
+		cpu_mask = RATE_IN_AM33XX;
+		cpu_clkflg = CK_AM33XX;
 	} else if (cpu_is_omap34xx()) {
 		if (omap_rev() == OMAP3430_REV_ES1_0) {
 			cpu_mask = RATE_IN_3430ES1;
arch/arm/mach-omap2/common.c +21 -0
index 110e5b9..16bac26 100644
@@ -128,6 +128,27 @@ void __init omap2_set_globals_ti816x(void)
 {
 	__omap2_set_globals(&ti816x_globals);
 }
+
+#define AM33XX_TAP_BASE		(AM33XX_CTRL_BASE + \
+				TI816X_CONTROL_DEVICE_ID - 0x204)
+
+static struct omap_globals am33xx_globals = {
+	.class  = AM335X_CLASS,
+	.tap    = AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE),
+	.ctrl   = AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
+	.prm    = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
+	.cm     = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
+};
+
+void __init omap2_set_globals_am33xx(void)
+{
+	__omap2_set_globals(&am33xx_globals);
+}
+
+void __init am33xx_map_io(void)
+{
+	omapam33xx_map_common_io();
+}
 #endif
 
 #if defined(CONFIG_ARCH_OMAP4)
arch/arm/mach-omap2/id.c +6 -0
index f1784ee..37fe42f 100644
@@ -340,6 +340,10 @@ static void __init omap3_check_revision(const char **cpu_rev)
 			break;
 		}
 		break;
+	case 0xb944:
+		omap_revision = AM335X_REV_ES1_0;
+		*cpu_rev = "1.0";
+		break;
 	default:
 		/* Unknown default to latest silicon rev as default */
 		omap_revision = OMAP3630_REV_ES1_2;
@@ -432,6 +436,8 @@ static void __init omap3_cpuinfo(const char *cpu_rev)
 		cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
 	} else if (cpu_is_ti816x()) {
 		cpu_name = "TI816X";
+	} else if (cpu_is_am335x()) {
+		cpu_name =  "AM335X";
 	} else if (omap3_has_iva() && omap3_has_sgx()) {
 		/* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
 		cpu_name = "OMAP3430/3530";
arch/arm/mach-omap2/io.c +24 -0
index da9bc4a..74e84c6 100644
@@ -183,7 +183,24 @@ static struct map_desc omapti816x_io_desc[] __initdata = {
 		.pfn		= __phys_to_pfn(L4_34XX_PHYS),
 		.length		= L4_34XX_SIZE,
 		.type		= MT_DEVICE
+	}
+};
+#endif
+
+#ifdef CONFIG_SOC_OMAPAM33XX
+static struct map_desc omapam33xx_io_desc[] __initdata = {
+	{
+		.virtual	= L4_34XX_VIRT,
+		.pfn		= __phys_to_pfn(L4_34XX_PHYS),
+		.length		= L4_34XX_SIZE,
+		.type		= MT_DEVICE
 	},
+	{
+		.virtual	= L4_WK_AM33XX_VIRT,
+		.pfn		= __phys_to_pfn(L4_WK_AM33XX_PHYS),
+		.length		= L4_WK_AM33XX_SIZE,
+		.type		= MT_DEVICE
+	}
 };
 #endif
 
@@ -270,6 +287,13 @@ void __init omapti816x_map_common_io(void)
 }
 #endif
 
+#ifdef CONFIG_SOC_OMAPAM33XX
+void __init omapam33xx_map_common_io(void)
+{
+	iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
+}
+#endif
+
 #ifdef CONFIG_ARCH_OMAP4
 void __init omap44xx_map_common_io(void)
 {
arch/arm/mach-omap2/serial.c +2 -2
index 0dbd5a2..03fc153 100644
@@ -464,7 +464,7 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
 		mod_timer(&uart->timer, jiffies + uart->timeout);
 	omap_uart_smart_idle_enable(uart, 0);
 
-	if (cpu_is_omap34xx() && !cpu_is_ti816x()) {
+	if (cpu_is_omap34xx() && !(cpu_is_ti816x() || cpu_is_am33xx())) {
 		u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD;
 		u32 wk_mask = 0;
 		u32 padconf = 0;
@@ -828,7 +828,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
 	}
 
 	/* Enable the MDR1 errata for OMAP3 */
-	if (cpu_is_omap34xx() && !cpu_is_ti816x())
+	if (cpu_is_omap34xx() && !(cpu_is_ti816x() || cpu_is_am33xx()))
 		uart->errata |= UART_ERRATA_i202_MDR1_ACCESS;
 }
 
arch/arm/plat-omap/include/plat/am33xx.h new file +25 -0
new file mode 100644
index 0000000..06c19bb
@@ -0,0 +1,25 @@
+/*
+ * This file contains the address info for various AM33XX modules.
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_AM33XX_H
+#define __ASM_ARCH_AM33XX_H
+
+#define L4_SLOW_AM33XX_BASE	0x48000000
+
+#define AM33XX_SCM_BASE		0x44E10000
+#define AM33XX_CTRL_BASE	AM33XX_SCM_BASE
+#define AM33XX_PRCM_BASE	0x44E00000
+
+#endif /* __ASM_ARCH_AM33XX_H */
arch/arm/plat-omap/include/plat/common.h +2 -0
index c50df48..b83818d 100644
@@ -79,6 +79,7 @@ void omap2_set_globals_243x(void);
 void omap2_set_globals_3xxx(void);
 void omap2_set_globals_443x(void);
 void omap2_set_globals_ti816x(void);
+void omap2_set_globals_am33xx(void);
 
 /* These get called from omap2_set_globals_xxxx(), do not call these */
 void omap2_set_globals_tap(struct omap_globals *);
@@ -89,6 +90,7 @@ void omap2_set_globals_prcm(struct omap_globals *);
 void omap242x_map_io(void);
 void omap243x_map_io(void);
 void omap3_map_io(void);
+void am33xx_map_io(void);
 void omap4_map_io(void);
 
 
arch/arm/plat-omap/include/plat/hardware.h +1 -0
index e87efe1..e6521e1 100644
@@ -287,5 +287,6 @@
 #include <plat/omap34xx.h>
 #include <plat/omap44xx.h>
 #include <plat/ti816x.h>
+#include <plat/am33xx.h>
 
 #endif	/* __ASM_ARCH_OMAP_HARDWARE_H */
arch/arm/plat-omap/include/plat/io.h +20 -0
index 7f2969e..d58fb9c 100644
@@ -73,6 +73,9 @@
 #define OMAP4_L3_IO_OFFSET	0xb4000000
 #define OMAP4_L3_IO_ADDRESS(pa)	IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */
 
+#define AM33XX_L4_WK_IO_OFFSET	0xb5000000
+#define AM33XX_L4_WK_IO_ADDRESS(pa)	IOMEM((pa) + AM33XX_L4_WK_IO_OFFSET)
+
 #define OMAP4_L3_PER_IO_OFFSET	0xb1100000
 #define OMAP4_L3_PER_IO_ADDRESS(pa)	IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET)
 
@@ -154,6 +157,15 @@
 #define L4_34XX_SIZE		SZ_4M   /* 1MB of 128MB used, want 1MB sect */
 
 /*
+ * ----------------------------------------------------------------------------
+ * AM33XX specific IO mapping
+ * ----------------------------------------------------------------------------
+ */
+#define L4_WK_AM33XX_PHYS		L4_WK_AM33XX_BASE
+#define L4_WK_AM33XX_VIRT		(L4_WK_AM33XX_PHYS + AM33XX_L4_WK_IO_OFFSET)
+#define L4_WK_AM33XX_SIZE		SZ_4M   /* 1MB of 128MB used, want 1MB sect */
+
+/*
  * Need to look at the Size 4M for L4.
  * VPOM3430 was not working for Int controller
  */
@@ -316,6 +328,14 @@ static inline void omapti816x_map_common_io(void)
 }
 #endif
 
+#ifdef CONFIG_SOC_OMAPAM33XX
+extern void omapam33xx_map_common_io(void);
+#else
+static inline void omapam33xx_map_common_io(void)
+{
+}
+#endif
+
 #ifdef CONFIG_ARCH_OMAP4
 extern void omap44xx_map_common_io(void);
 #else
arch/arm/plat-omap/include/plat/omap34xx.h +2 -0
index b9e8588..0d818ac 100644
@@ -35,6 +35,8 @@
 #define L4_EMU_34XX_BASE	0x54000000
 #define L3_34XX_BASE		0x68000000
 
+#define L4_WK_AM33XX_BASE	0x44C00000
+
 #define OMAP3430_32KSYNCT_BASE	0x48320000
 #define OMAP3430_CM_BASE	0x48004800
 #define OMAP3430_PRM_BASE	0x48306800
arch/arm/plat-omap/io.c +5 -0
index 333871f..14c421a 100644
@@ -94,6 +94,11 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
 	if (cpu_is_ti816x()) {
 		if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
 			return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
+	} else if (cpu_is_am33xx()) {
+		if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
+			return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
+		if (BETWEEN(p, L4_WK_AM33XX_PHYS, L4_WK_AM33XX_SIZE))
+			return XLATE(p, L4_WK_AM33XX_PHYS, L4_WK_AM33XX_VIRT);
 	} else if (cpu_is_omap34xx()) {
 		if (BETWEEN(p, L3_34XX_PHYS, L3_34XX_SIZE))
 			return XLATE(p, L3_34XX_PHYS, L3_34XX_VIRT);

--
1.7.0.4

#2 lore raw

PATCH v4 2/3 arm:omap:am33xx: Add AM335XEVM machine support

In reply to Vaibhav Hiremath

From: Afzal Mohammed <[email protected]>

This patch adds minimal support for AM335X EVM. The approach taken here is to add AM335X EVM support to AM3517EVM, considering the fact that with device tree developement we will get rid of board-*.c.

---
 arch/arm/mach-omap2/Kconfig              |    5 +++++
 arch/arm/mach-omap2/Makefile             |    1 +
 arch/arm/mach-omap2/board-am3517evm.c    |   21 +++++++++++++++++++++
 arch/arm/mach-omap2/io.c                 |    7 +++++++
 arch/arm/mach-omap2/timer.c              |    2 ++
 arch/arm/plat-omap/include/plat/common.h |    2 ++
 6 files changed, 38 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/Kconfig +5 -0
index c3d530b..2ef39c2 100644
@@ -326,6 +326,11 @@ config MACH_TI8168EVM
 	depends on SOC_OMAPTI816X
 	default y
 
+config MACH_AM335XEVM
+	bool "AM335X Evaluation Module"
+	depends on SOC_OMAPAM33XX
+	default y
+
 config MACH_OMAP_4430SDP
 	bool "OMAP 4430 SDP board"
 	default y
arch/arm/mach-omap2/Makefile +1 -0
index 14cd2fd..b33a85f 100644
@@ -233,6 +233,7 @@ obj-$(CONFIG_MACH_CRANEBOARD)		+= board-am3517crane.o
 
 obj-$(CONFIG_MACH_SBC3530)		+= board-omap3stalker.o
 obj-$(CONFIG_MACH_TI8168EVM)		+= board-ti8168evm.o
+obj-$(CONFIG_MACH_AM335XEVM)		+= board-am3517evm.o
 
 # Platform specific device init code
 
arch/arm/mach-omap2/board-am3517evm.c +21 -0
index f7df8d3..090457f 100644
@@ -516,3 +516,24 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
 	.init_machine	= am3517_evm_init,
 	.timer		= &omap3_timer,
 MACHINE_END
+
+static struct omap_board_config_kernel am335x_evm_config[] __initdata = {
+};
+
+static void __init am335x_evm_init(void)
+{
+	omap_serial_init();
+	omap_sdrc_init(NULL, NULL);
+	omap_board_config = am335x_evm_config;
+	omap_board_config_size = ARRAY_SIZE(am335x_evm_config);
+}
+
+MACHINE_START(AM335XEVM, "am335xevm")
+	/* Maintainer: Texas Instruments */
+	.atag_offset	= 0x100,
+	.map_io		= am33xx_map_io,
+	.init_early	= am33xx_init_early,
+	.init_irq	= ti816x_init_irq,
+	.timer		= &omap3_am33xx_timer,
+	.init_machine	= am335x_evm_init,
+MACHINE_END
arch/arm/mach-omap2/io.c +7 -0
index 74e84c6..6f03cc1 100644
@@ -477,6 +477,13 @@ void __init omap4430_init_early(void)
 }
 #endif
 
+void __init am33xx_init_early(void)
+{
+	omap2_set_globals_am33xx();
+	omap_common_init_early();
+	omap3xxx_clk_init();
+}
+
 void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
 				      struct omap_sdrc_params *sdrc_cs1)
 {
arch/arm/mach-omap2/timer.c +2 -0
index 037b0d7..7b29197 100644
@@ -333,6 +333,8 @@ OMAP_SYS_TIMER(3)
 OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE,
 			2, OMAP3_MPU_SOURCE)
 OMAP_SYS_TIMER(3_secure)
+OMAP_SYS_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, 2, OMAP4_MPU_SOURCE)
+OMAP_SYS_TIMER(3_am33xx)
 #endif
 
 #ifdef CONFIG_ARCH_OMAP4
arch/arm/plat-omap/include/plat/common.h +2 -0
index b83818d..87bd3e2 100644
@@ -38,6 +38,7 @@ extern struct sys_timer omap1_timer;
 extern struct sys_timer omap2_timer;
 extern struct sys_timer omap3_timer;
 extern struct sys_timer omap3_secure_timer;
+extern struct sys_timer omap3_am33xx_timer;
 extern struct sys_timer omap4_timer;
 extern bool omap_32k_timer_init(void);
 extern int __init omap_init_clocksource_32k(void);
@@ -54,6 +55,7 @@ void omap3_init_early(void);	/* Do not use this one */
 void am35xx_init_early(void);
 void ti816x_init_early(void);
 void omap4430_init_early(void);
+void am33xx_init_early(void);
 
 void omap_sram_init(void);
 

--
1.7.0.4

#3 lore raw

PATCH v4 3/3 arm:omap:am33xx: Add low level debugging support

In reply to Vaibhav Hiremath

From: Afzal Mohammed <[email protected]>

Add support for low level debugging on AM335X EVM (AM33XX family). Currently only support for UART1 console, which is used on AM335X EVM is added.

---
 arch/arm/mach-omap2/include/mach/debug-macro.S |   17 ++++++++++++++++-
 arch/arm/plat-omap/include/plat/serial.h       |    4 ++++
 arch/arm/plat-omap/include/plat/uncompress.h   |    6 ++++++
 3 files changed, 26 insertions(+), 1 deletions(-)
arch/arm/mach-omap2/include/mach/debug-macro.S +16 -1
index 13f98e5..ce543ae 100644
@@ -72,6 +72,8 @@ omap_uart_lsr:	.word	0
 		beq	82f			@ configure UART2
 		cmp	\rp, #TI816XUART3	@ ti816x UART offsets different
 		beq	83f			@ configure UART3
+		cmp	\rp, #AM33XXUART1	@ AM33XX UART offsets different
+		beq	84f			@ configure UART1
 		cmp	\rp, #ZOOM_UART		@ only on zoom2/3
 		beq	95f			@ configure ZOOM_UART
 
@@ -100,7 +102,9 @@ omap_uart_lsr:	.word	0
 		b	98f
 83:		mov	\rp, #UART_OFFSET(TI816X_UART3_BASE)
 		b	98f
-
+84:		ldr	\rp, =AM33XX_UART1_BASE
+		and	\rp, \rp, #0x00ffffff
+		b	97f
 95:		ldr	\rp, =ZOOM_UART_BASE
 		str	\rp, [\tmp, #0]		@ omap_uart_phys
 		ldr	\rp, =ZOOM_UART_VIRT
@@ -110,6 +114,17 @@ omap_uart_lsr:	.word	0
 		b	10b
 
 		/* Store both phys and virt address for the uart */
+97:		add	\rp, \rp, #0x44000000	@ phys base
+		str	\rp, [\tmp, #0]		@ omap_uart_phys
+		sub	\rp, \rp, #0x44000000	@ phys base
+		add	\rp, \rp, #0xf9000000	@ virt base
+		str	\rp, [\tmp, #4]		@ omap_uart_virt
+		mov	\rp, #(UART_LSR << OMAP_PORT_SHIFT)
+		str	\rp, [\tmp, #8]		@ omap_uart_lsr
+
+		b	10b
+
+		/* Store both phys and virt address for the uart */
 98:		add	\rp, \rp, #0x48000000	@ phys base
 		str	\rp, [\tmp, #0]		@ omap_uart_phys
 		sub	\rp, \rp, #0x48000000	@ phys base
arch/arm/plat-omap/include/plat/serial.h +4 -0
index 1ab9fd6..e988c92 100644
@@ -59,6 +59,9 @@
 /* AM3505/3517 UART4 */
 #define AM35XX_UART4_BASE	0x4809E000	/* Only on AM3505/3517 */
 
+/* AM33XX serial port */
+#define AM33XX_UART1_BASE	0x44E09000
+
 /* External port on Zoom2/3 */
 #define ZOOM_UART_BASE		0x10000000
 #define ZOOM_UART_VIRT		0xfa400000
@@ -92,6 +95,7 @@
 #define TI816XUART1		81
 #define TI816XUART2		82
 #define TI816XUART3		83
+#define AM33XXUART1		84
 #define ZOOM_UART		95		/* Only on zoom2/3 */
 
 /* This is only used by 8250.c for omap1510 */
arch/arm/plat-omap/include/plat/uncompress.h +6 -0
index 2d45ea3..ff59570 100644
@@ -103,6 +103,10 @@ static inline void flush(void)
 	_DEBUG_LL_ENTRY(mach, TI816X_UART##p##_BASE, OMAP_PORT_SHIFT,	\
 		TI816XUART##p)
 
+#define DEBUG_LL_AM33XX(p, mach)					\
+	_DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT,	\
+		AM33XXUART##p)
+
 static inline void __arch_decomp_setup(unsigned long arch_id)
 {
 	int port = 0;
@@ -181,6 +185,8 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
 		/* TI8168 base boards using UART3 */
 		DEBUG_LL_TI816X(3, ti8168evm);
 
+		/* AM33XX base boards using UART1 */
+		DEBUG_LL_AM33XX(1, am335xevm);
 	} while (0);
 }
 

--
1.7.0.4

#4 lore raw

PATCH v4 3/3 arm:omap:am33xx: Add low level debugging support

Hi Vaibhav,

Quoted 8 lines · Vaibhav Hiremath

From: Afzal Mohammed <[email protected]>

Add support for low level debugging on AM335X EVM (AM33XX family). Currently only support for UART1 console, which is used on AM335X EVM is added.

One minor comment below...

Quoted 31 lines
---
 arch/arm/mach-omap2/include/mach/debug-macro.S |   17 ++++++++++++++++-
 arch/arm/plat-omap/include/plat/serial.h       |    4 ++++
 arch/arm/plat-omap/include/plat/uncompress.h   |    6 ++++++
 3 files changed, 26 insertions(+), 1 deletions(-)
arch/arm/mach-omap2/include/mach/debug-macro.S +5 -1
index 13f98e5..ce543ae 100644
@@ -72,6 +72,8 @@ omap_uart_lsr:	.word	0
 		beq	82f			@ configure UART2
 		cmp	\rp, #TI816XUART3	@ ti816x UART offsets different
 		beq	83f			@ configure UART3
+		cmp	\rp, #AM33XXUART1	@ AM33XX UART offsets different
+		beq	84f			@ configure UART1
 		cmp	\rp, #ZOOM_UART		@ only on zoom2/3
 		beq	95f			@ configure ZOOM_UART
 
@@ -100,7 +102,9 @@ omap_uart_lsr:	.word	0
 		b	98f
 83:		mov	\rp, #UART_OFFSET(TI816X_UART3_BASE)
 		b	98f
-
+84:		ldr	\rp, =AM33XX_UART1_BASE
+		and	\rp, \rp, #0x00ffffff
+		b	97f
 95:		ldr	\rp, =ZOOM_UART_BASE
 		str	\rp, [\tmp, #0]		@ omap_uart_phys
 		ldr	\rp, =ZOOM_UART_VIRT

arch/arm/mach-omap2/include/mach/debug-macro.S omap_uart_lsr: .word 0 · line 116

Quoted 3 lines
arch/arm/mach-omap2/include/mach/debug-macro.S +0 -0
@@ -110,6 +114,17 @@ omap_uart_lsr:	.word	0
 		b	10b
 
 		/* Store both phys and virt address for the uart */

Please update this comment to clarify that this block is for AM33xx only, and update the following one as the catch all.

arch/arm/mach-omap2/include/mach/debug-macro.S omap_uart_lsr: .word 0 · line 123

Quoted 7 lines
arch/arm/mach-omap2/include/mach/debug-macro.S +7 -0
+97:		add	\rp, \rp, #0x44000000	@ phys base
+		str	\rp, [\tmp, #0]		@ omap_uart_phys
+		sub	\rp, \rp, #0x44000000	@ phys base
+		add	\rp, \rp, #0xf9000000	@ virt base
+		str	\rp, [\tmp, #4]		@ omap_uart_virt
+		mov	\rp, #(UART_LSR << OMAP_PORT_SHIFT)
+		str	\rp, [\tmp, #8]		@ omap_uart_lsr

The last 3 lines are unnecessarily duplicated. They can be shared with the common block that follows. IOW, only the base addresses are different, the rest of the operations are shared.

arch/arm/mach-omap2/include/mach/debug-macro.S omap_uart_lsr: .word 0 · line 130

Quoted 6 lines
arch/arm/mach-omap2/include/mach/debug-macro.S +3 -0
+		b	10b
+
+		/* Store both phys and virt address for the uart */
 98:		add	\rp, \rp, #0x48000000	@ phys base
 		str	\rp, [\tmp, #0]		@ omap_uart_phys
 		sub	\rp, \rp, #0x48000000	@ phys base

Kevin

#5 lore raw

PATCH v4 3/3 arm:omap:am33xx: Add low level debugging support

Quoted 58 lines

-----Original Message-----
From: Hilman, Kevin
Sent: Thursday, December 01, 2011 5:03 AM
To: Hiremath, Vaibhav
Cc: linux-omap at vger.kernel.org; tony at atomide.com; linux-arm- kernel at lists.infradead.org; paul at pwsan.com; Mohammed, Afzal
Subject: Re: [PATCH-V4 3/3] arm:omap:am33xx: Add low level debugging support

Hi Vaibhav,

Quoted 8 lines · Vaibhav Hiremath

From: Afzal Mohammed <[email protected]>

Add support for low level debugging on AM335X EVM (AM33XX family). Currently only support for UART1 console, which is used on AM335X EVM is added.

One minor comment below...

Review

Quoted 7 lines
---
 arch/arm/mach-omap2/include/mach/debug-macro.S |   17 ++++++++++++++++-
 arch/arm/plat-omap/include/plat/serial.h       |    4 ++++
 arch/arm/plat-omap/include/plat/uncompress.h   |    6 ++++++
 3 files changed, 26 insertions(+), 1 deletions(-)
(quoted diff) +0 -0

b/arch/arm/mach-omap2/include/mach/debug-macro.S

Quoted 26 lines

index 13f98e5..ce543ae 100644

arch/arm/mach-omap2/include/mach/debug-macro.S +5 -1
@@ -72,6 +72,8 @@ omap_uart_lsr:	.word	0
 		beq	82f			@ configure UART2
 		cmp	\rp, #TI816XUART3	@ ti816x UART offsets different
 		beq	83f			@ configure UART3
+		cmp	\rp, #AM33XXUART1	@ AM33XX UART offsets different
+		beq	84f			@ configure UART1
 		cmp	\rp, #ZOOM_UART		@ only on zoom2/3
 		beq	95f			@ configure ZOOM_UART
 
@@ -100,7 +102,9 @@ omap_uart_lsr:	.word	0
 		b	98f
 83:		mov	\rp, #UART_OFFSET(TI816X_UART3_BASE)
 		b	98f
-
+84:		ldr	\rp, =AM33XX_UART1_BASE
+		and	\rp, \rp, #0x00ffffff
+		b	97f
 95:		ldr	\rp, =ZOOM_UART_BASE
 		str	\rp, [\tmp, #0]		@ omap_uart_phys
 		ldr	\rp, =ZOOM_UART_VIRT
@@ -110,6 +114,17 @@ omap_uart_lsr:	.word	0
 		b	10b
 
Quoted 5 lines

arch/arm/mach-omap2/include/mach/debug-macro.S omap_uart_lsr: .word 0 · line 116

Quoted 1 line
arch/arm/mach-omap2/include/mach/debug-macro.S +0 -0
 		/* Store both phys and virt address for the uart */

Please update this comment to clarify that this block is for AM33xx only, and update the following one as the catch all.

Ok, will update.

Quoted 12 lines

arch/arm/mach-omap2/include/mach/debug-macro.S omap_uart_lsr: .word 0 · line 123

Quoted 7 lines
arch/arm/mach-omap2/include/mach/debug-macro.S +7 -0
+97:		add	\rp, \rp, #0x44000000	@ phys base
+		str	\rp, [\tmp, #0]		@ omap_uart_phys
+		sub	\rp, \rp, #0x44000000	@ phys base
+		add	\rp, \rp, #0xf9000000	@ virt base
+		str	\rp, [\tmp, #4]		@ omap_uart_virt
+		mov	\rp, #(UART_LSR << OMAP_PORT_SHIFT)
+		str	\rp, [\tmp, #8]		@ omap_uart_lsr

The last 3 lines are unnecessarily duplicated. They can be shared with the common block that follows. IOW, only the base addresses are different, the rest of the operations are shared.

I thought about this, but then code looks complex & ugly, just to save duplication of 3 lines. So I added separate code for AM33xx devices.

If you still think it should be done, then How about below change -

-               /* Store both phys and virt address for the uart */
-98:            add     \rp, \rp, #0x48000000   @ phys base
+               /* AM33XX: Store both phys and virt address for the uart */
+96:            add     \rp, \rp, #0x44000000   @ phys base
                str     \rp, [\tmp, #0]         @ omap_uart_phys
-               sub     \rp, \rp, #0x48000000   @ phys base
-               add     \rp, \rp, #0xfa000000   @ virt base
-               str     \rp, [\tmp, #4]         @ omap_uart_virt
+               sub     \rp, \rp, #0x44000000   @ phys base
+               add     \rp, \rp, #0xf9000000   @ virt base
+97:            str     \rp, [\tmp, #4]         @ omap_uart_virt
                mov     \rp, #(UART_LSR << OMAP_PORT_SHIFT)
                str     \rp, [\tmp, #8]         @ omap_uart_lsr

b 10b

+               /* Store both phys and virt address for the uart */
+98:            add     \rp, \rp, #0x48000000   @ phys base
+               str     \rp, [\tmp, #0]         @ omap_uart_phys
+               sub     \rp, \rp, #0x48000000   @ phys base
+               add     \rp, \rp, #0xfa000000   @ virt base
+               b       97b

+

Thanks,
Vaibhav

Quoted 8 lines

arch/arm/mach-omap2/include/mach/debug-macro.S omap_uart_lsr: .word 0 · line 130

Quoted 6 lines
arch/arm/mach-omap2/include/mach/debug-macro.S +3 -0
+		b	10b
+
+		/* Store both phys and virt address for the uart */
 98:		add	\rp, \rp, #0x48000000	@ phys base
 		str	\rp, [\tmp, #0]		@ omap_uart_phys
 		sub	\rp, \rp, #0x48000000	@ phys base

Kevin

#6 lore raw

PATCH v4 3/3 arm:omap:am33xx: Add low level debugging support

Quoted 66 lines · Vaibhav
Quoted 47 lines
Quoted 8 lines · Vaibhav Hiremath

From: Afzal Mohammed <[email protected]>

Add support for low level debugging on AM335X EVM (AM33XX family). Currently only support for UART1 console, which is used on AM335X EVM is added.

One minor comment below...

Review

Quoted 7 lines
---
 arch/arm/mach-omap2/include/mach/debug-macro.S |   17 ++++++++++++++++-
 arch/arm/plat-omap/include/plat/serial.h       |    4 ++++
 arch/arm/plat-omap/include/plat/uncompress.h   |    6 ++++++
 3 files changed, 26 insertions(+), 1 deletions(-)
(quoted diff) +0 -0

b/arch/arm/mach-omap2/include/mach/debug-macro.S

Quoted 26 lines

index 13f98e5..ce543ae 100644

arch/arm/mach-omap2/include/mach/debug-macro.S +5 -1
@@ -72,6 +72,8 @@ omap_uart_lsr:	.word	0
 		beq	82f			@ configure UART2
 		cmp	\rp, #TI816XUART3	@ ti816x UART offsets different
 		beq	83f			@ configure UART3
+		cmp	\rp, #AM33XXUART1	@ AM33XX UART offsets different
+		beq	84f			@ configure UART1
 		cmp	\rp, #ZOOM_UART		@ only on zoom2/3
 		beq	95f			@ configure ZOOM_UART
 
@@ -100,7 +102,9 @@ omap_uart_lsr:	.word	0
 		b	98f
 83:		mov	\rp, #UART_OFFSET(TI816X_UART3_BASE)
 		b	98f
-
+84:		ldr	\rp, =AM33XX_UART1_BASE
+		and	\rp, \rp, #0x00ffffff
+		b	97f
 95:		ldr	\rp, =ZOOM_UART_BASE
 		str	\rp, [\tmp, #0]		@ omap_uart_phys
 		ldr	\rp, =ZOOM_UART_VIRT
@@ -110,6 +114,17 @@ omap_uart_lsr:	.word	0
 		b	10b
 
Quoted 5 lines

arch/arm/mach-omap2/include/mach/debug-macro.S omap_uart_lsr: .word 0 · line 116

Quoted 1 line
arch/arm/mach-omap2/include/mach/debug-macro.S +0 -0
 		/* Store both phys and virt address for the uart */

Please update this comment to clarify that this block is for AM33xx only, and update the following one as the catch all.

Ok, will update.

Quoted 12 lines

arch/arm/mach-omap2/include/mach/debug-macro.S omap_uart_lsr: .word 0 · line 123

Quoted 7 lines
arch/arm/mach-omap2/include/mach/debug-macro.S +7 -0
+97:		add	\rp, \rp, #0x44000000	@ phys base
+		str	\rp, [\tmp, #0]		@ omap_uart_phys
+		sub	\rp, \rp, #0x44000000	@ phys base
+		add	\rp, \rp, #0xf9000000	@ virt base
+		str	\rp, [\tmp, #4]		@ omap_uart_virt
+		mov	\rp, #(UART_LSR << OMAP_PORT_SHIFT)
+		str	\rp, [\tmp, #8]		@ omap_uart_lsr

The last 3 lines are unnecessarily duplicated. They can be shared with the common block that follows. IOW, only the base addresses are different, the rest of the operations are shared.

Quoted 2 lines

I thought about this, but then code looks complex & ugly, just to save duplication of 3 lines. So I added separate code for AM33xx devices.

Yeah, you're right.

Your original version is better. Please just update the comments
around the 2 blocks then.

Thanks,

Kevin

#7 lore raw

v4 cover Introducing TI's New SoC/board AM335XEVM

In reply to Vaibhav Hiremath
Quoted 5 lines · Vaibhav Hiremath

This patch set adds support for AM335x device having Cortex-A8 MPU.

Official website - http://www.ti.com/product/am3359

Quoted 8 lines

AM335X is treated as another OMAP3 variant, where,
along with existing cpu class OMAP34XX, new cpu class AM33XX is created and the respective type is AM335X, which is newly added device in the family.
This means, cpu_is_omap34xx(), cpu_is_am33xx() and cpu_is_am335x() checks return success for AM335X.

Also, I have validated OMAP3 boot test with this patch-series on OMAP3EVM.

After fixing the minor comment on patch 3/3, feel free to add:

Also, I was surprised to discover that this booted on my (recently arrived) BeagleBone. It seems that u-boot (from Angstrom) is passing the machine ID of the AM335x EVM[1], even though there is another machine ID for the BeagleBone[2]. Is that expected?

I also see that the mach-types for this are in Russell's for-next branch. In order for us to merge this into Tony's master branch, we'll need to see if Russell can pull the mach-types updates into devel-stable. Russell?

Kevin

[1] http://www.arm.linux.org.uk/developer/machines/list.php?id=3589
[2] http://www.arm.linux.org.uk/developer/machines/list.php?id=3808

#8 lore raw

v4 cover Introducing TI's New SoC/board AM335XEVM

Quoted 22 lines

-----Original Message-----
From: Hilman, Kevin
Sent: Thursday, December 01, 2011 5:09 AM
To: Hiremath, Vaibhav; Russell King
Cc: linux-omap at vger.kernel.org; tony at atomide.com; linux-arm- kernel at lists.infradead.org; paul at pwsan.com
Subject: Re: [PATCH-V4 0/3] Introducing TI's New SoC/board AM335XEVM

Quoted 12 lines · Vaibhav Hiremath

This patch set adds support for AM335x device having Cortex-A8 MPU.

Official website - http://www.ti.com/product/am3359

AM335X is treated as another OMAP3 variant, where,
along with existing cpu class OMAP34XX, new cpu class AM33XX is created and the respective type is AM335X, which is newly added device in the family.
This means, cpu_is_omap34xx(), cpu_is_am33xx() and cpu_is_am335x() checks return success for AM335X.

Quoted 7 lines
Quoted 1 line

Also, I have validated OMAP3 boot test with this patch-series on

OMAP3EVM.

After fixing the minor comment on patch 3/3, feel free to add:

Thanks Kevin, for the review.

Quoted 4 lines

Also, I was surprised to discover that this booted on my (recently arrived) BeagleBone. It seems that u-boot (from Angstrom) is passing the machine ID of the AM335x EVM[1], even though there is another machine ID for the BeagleBone[2]. Is that expected?

Kevin,

We can detect the board using on-board EEPROM, so same mach-id should work for both EVM and Beagle.
And also going forward with device tree approach we may not need different id's, right?

But I am surprised to see that beaglebone is booting fine for you, did you get Linux console?
Actually the board won't boot without some patches,
(I have published on arago), especially inside, gpmc_init, omap_sram_init, omap3_pm_init and omap3_twl_init.

Thanks,
Vaibhav

Quoted 10 lines

I also see that the mach-types for this are in Russell's for-next branch. In order for us to merge this into Tony's master branch, we'll need to see if Russell can pull the mach-types updates into devel-stable. Russell?

Kevin

[1] http://www.arm.linux.org.uk/developer/machines/list.php?id=3589
[2] http://www.arm.linux.org.uk/developer/machines/list.php?id=3808

#9 lore raw

v4 cover Introducing TI's New SoC/board AM335XEVM

Quoted 37 lines · Vaibhav
Quoted 22 lines

-----Original Message-----
From: Hilman, Kevin
Sent: Thursday, December 01, 2011 5:09 AM
To: Hiremath, Vaibhav; Russell King
Cc: linux-omap at vger.kernel.org; tony at atomide.com; linux-arm- kernel at lists.infradead.org; paul at pwsan.com
Subject: Re: [PATCH-V4 0/3] Introducing TI's New SoC/board AM335XEVM

Quoted 12 lines · Vaibhav Hiremath

This patch set adds support for AM335x device having Cortex-A8 MPU.

Official website - http://www.ti.com/product/am3359

AM335X is treated as another OMAP3 variant, where,
along with existing cpu class OMAP34XX, new cpu class AM33XX is created and the respective type is AM335X, which is newly added device in the family.
This means, cpu_is_omap34xx(), cpu_is_am33xx() and cpu_is_am335x() checks return success for AM335X.

Quoted 7 lines
Quoted 1 line

Also, I have validated OMAP3 boot test with this patch-series on

OMAP3EVM.

After fixing the minor comment on patch 3/3, feel free to add:

Thanks Kevin, for the review.

Quoted 4 lines

Also, I was surprised to discover that this booted on my (recently arrived) BeagleBone. It seems that u-boot (from Angstrom) is passing the machine ID of the AM335x EVM[1], even though there is another machine ID for the BeagleBone[2]. Is that expected?

Quoted 5 lines

We can detect the board using on-board EEPROM, so same mach-id should work for both EVM and Beagle.

And also going forward with device tree approach we may not need different id's, right?

Right, which is why I'm wondering why are there sevral new AM33x mach-types when only one of them is being used:

3684    TI AM335X IA EVM        am335xiaevm     Afzal Mohammed
3589    TI AM335X EVM           am335xevm       Vaibhav Bedia
3808    Beaglebone Board        beaglebone      Steven Kipisz

Russell has been trying to cleanup athe mach-types, so if these others are not going to be used, I suggest they be deleted.

Quoted 2 lines

But I am surprised to see that beaglebone is booting fine for you, did you get Linux console?

Oh, sorry for the confusion. No, it didn't boot to console. It just booted far enought to see that your this series was working and it was getting started, but it eventually hangs because of missing MPU hwmod:

[...]

[    0.000000] omap_hwmod: timer1: cannot setup_one: MPU initiator hwmod mpu not yet registered                                                               
[    0.000000] ------------[ cut here ]------------                           
[    0.000000] kernel BUG at /work/kernel/omap/dev/arch/arm/mach-omap2/timer.c: 214!

Kevin

#10 lore raw

v4 cover Introducing TI's New SoC/board AM335XEVM

Hi Kevin,

Quoted 1 line · Kevin

"Hiremath, Vaibhav" <[email protected]> writes:

:

Quoted 9 lines
Quoted 5 lines

We can detect the board using on-board EEPROM, so same mach-id should work for both EVM and Beagle.

And also going forward with device tree approach we may not need different id's, right?

Right, which is why I'm wondering why are there sevral new AM33x mach-types when only one of them is being used:

Quoted 6 lines
3684    TI AM335X IA EVM        am335xiaevm     Afzal Mohammed
3589    TI AM335X EVM           am335xevm       Vaibhav Bedia
3808    Beaglebone Board        beaglebone      Steven Kipisz

Russell has been trying to cleanup athe mach-types, so if these others are not going to be used, I suggest they be deleted.

"3684-TI AM335X IA EVM" is required as IA EVM uses a different UART, because of which early prints can't be captured, problem mentioned in http://marc.info/?l=linux-omap&m=131286938723617&w=2

Note: Paul advised to post to linux-arm-kernel at lists.infradead.org, but it never made to LAKML, even though I sent couple of times and got a reply "Is being held until the list moderator can review it for approval. The reason it is being held: Message has a suspicious header"

Regards
Afzal

#11 lore raw

v4 cover Introducing TI's New SoC/board AM335XEVM

Quoted 18 lines · Afzal

Hi Kevin,

Quoted 1 line · Kevin

"Hiremath, Vaibhav" <[email protected]> writes:

:

Quoted 13 lines
Quoted 5 lines

We can detect the board using on-board EEPROM, so same mach-id should work for both EVM and Beagle.

And also going forward with device tree approach we may not need different id's, right?

Right, which is why I'm wondering why are there sevral new AM33x mach-types when only one of them is being used:

3684    TI AM335X IA EVM        am335xiaevm     Afzal Mohammed
3589    TI AM335X EVM           am335xevm       Vaibhav Bedia
3808    Beaglebone Board        beaglebone      Steven Kipisz
Quoted 6 lines
Quoted 2 lines

Russell has been trying to cleanup athe mach-types, so if these others are not going to be used, I suggest they be deleted.

"3684-TI AM335X IA EVM" is required as IA EVM uses a different UART, because of which early prints can't be captured, problem mentioned in http://marc.info/?l=linux-omap&m=131286938723617&w=2

This problem will be solved by using the device tree.

Kevin

#12 lore raw

v4 cover Introducing TI's New SoC/board AM335XEVM

Quoted 29 lines

-----Original Message-----
From: Hilman, Kevin
Sent: Friday, December 02, 2011 11:04 PM
To: Mohammed, Afzal
Cc: Hiremath, Vaibhav; Russell King; linux-omap at vger.kernel.org; tony at atomide.com; linux-arm-kernel at lists.infradead.org; paul at pwsan.com
Subject: Re: [PATCH-V4 0/3] Introducing TI's New SoC/board AM335XEVM

Quoted 18 lines · Afzal

Hi Kevin,

Quoted 1 line · Kevin

"Hiremath, Vaibhav" <[email protected]> writes:

:

Quoted 13 lines
Quoted 5 lines

We can detect the board using on-board EEPROM, so same mach-id should work for both EVM and Beagle.

And also going forward with device tree approach we may not need different id's, right?

Right, which is why I'm wondering why are there sevral new AM33x mach-types when only one of them is being used:

3684    TI AM335X IA EVM        am335xiaevm     Afzal Mohammed
3589    TI AM335X EVM           am335xevm       Vaibhav Bedia
3808    Beaglebone Board        beaglebone      Steven Kipisz
Quoted 9 lines
Quoted 6 lines
Quoted 2 lines

Russell has been trying to cleanup athe mach-types, so if these others are not going to be used, I suggest they be deleted.

"3684-TI AM335X IA EVM" is required as IA EVM uses a different UART, because of which early prints can't be captured, problem mentioned in http://marc.info/?l=linux-omap&m=131286938723617&w=2

This problem will be solved by using the device tree.

Kevin,

Will this solve earlyprintk as well?

Thanks,
Vaibhav

Quoted 1 line

Kevin