gpio: mxc: Locking and direction input fix

PATCH Superseded Marek Vasut 4 participants 10 messages Jul 25, 2022 – Sep 29, 2022

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Marek Vasut

author

2022-07-25 10:35 UTC #0 lore raw

v5 cover gpio: mxc: Locking and direction input fix

The irqchip callbacks in gpio-mxc perform register read-modify-write operations without locking, which may lead to a race condition. Add the missing locking.

In case the GPIO is used as IRQ, make sure it is configured as input.

Marek Vasut (2):
gpio: mxc: Protect GPIO irqchip RMW with bgpio spinlock
gpio: mxc: Always set GPIOs used as interrupt source to INPUT mode

 drivers/gpio/gpio-mxc.c | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

Cc Bartosz Golaszewski <[email protected]>

Cc Linus Walleij <[email protected]>

Cc Loic Poulain <[email protected]>

Cc Marc Zyngier <[email protected]>

Cc NXP Linux Team <[email protected]>

Cc Peng Fan <[email protected]>

Cc Shawn Guo <[email protected]>

Signature · 1 line

2.35.1

Marek Vasut

author

2022-07-25 10:35 UTC #1 lore raw

PATCH v5 1/2 gpio: mxc: Protect GPIO irqchip RMW with bgpio spinlock

The driver currently performs register read-modify-write without locking in its irqchip part, this could lead to a race condition when configuring interrupt mode setting. Add the missing bgpio spinlock lock/unlock around the register read-modify-write.

Fixes 07bd1a6cc7cbb ("MXC arch: Add gpio support for the whole platform")

Signed-off-by Marek Vasut <[email protected]>

Cc Bartosz Golaszewski <[email protected]>

Cc Linus Walleij <[email protected]>

Cc Loic Poulain <[email protected]>

Cc Marc Zyngier <[email protected]>

Cc NXP Linux Team <[email protected]>

Cc Peng Fan <[email protected]>

Cc Shawn Guo <[email protected]>

---
V3: New patch
V4: Include linux/spinlock.h
V5: Use raw_spinlock per 3c938cc5cebcb ("gpio: use raw spinlock for gpio chip shadowed data")

---
 drivers/gpio/gpio-mxc.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

drivers/gpio/gpio-mxc.c +11 -0

index c871602fc5ba9..6cc98a5684ae1 100644
@@ -18,6 +18,7 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
+#include <linux/spinlock.h>
 #include <linux/syscore_ops.h>
 #include <linux/gpio/driver.h>
 #include <linux/of.h>

@@ -147,6 +148,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type)
 {
 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
 	struct mxc_gpio_port *port = gc->private;
+	unsigned long flags;
 	u32 bit, val;
 	u32 gpio_idx = d->hwirq;
 	int edge;

@@ -185,6 +187,8 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type)
 		return -EINVAL;
 	}
 
+	raw_spin_lock_irqsave(&port->gc.bgpio_lock, flags);
+
 	if (GPIO_EDGE_SEL >= 0) {
 		val = readl(port->base + GPIO_EDGE_SEL);
 		if (edge == GPIO_INT_BOTH_EDGES)

@@ -204,15 +208,20 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type)
 
 	writel(1 << gpio_idx, port->base + GPIO_ISR);
 
+	raw_spin_unlock_irqrestore(&port->gc.bgpio_lock, flags);
+
 	return 0;
 }
 
 static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio)
 {
 	void __iomem *reg = port->base;
+	unsigned long flags;
 	u32 bit, val;
 	int edge;
 
+	raw_spin_lock_irqsave(&port->gc.bgpio_lock, flags);
+
 	reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */
 	bit = gpio & 0xf;
 	val = readl(reg);

@@ -230,6 +239,8 @@ static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio)
 		return;
 	}
 	writel(val | (edge << (bit << 1)), reg);
+
+	raw_spin_unlock_irqrestore(&port->gc.bgpio_lock, flags);
 }
 
 /* handle 32 interrupts in one status register */

Signature · 1 line

2.35.1

Linus Walleij

Reviewed-by on v5 1/2

2022-07-25 22:37 UTC #2 lore raw

Re: [PATCH v5 1/2] gpio: mxc: Protect GPIO irqchip RMW with bgpio spinlock

Quoted 14 lines · Marek Vasut

The driver currently performs register read-modify-write without locking in its irqchip part, this could lead to a race condition when configuring interrupt mode setting. Add the missing bgpio spinlock lock/unlock around the register read-modify-write.
Fixes 07bd1a6cc7cbb ("MXC arch: Add gpio support for the whole platform")
Signed-off-by Marek Vasut <[email protected]>
Cc Bartosz Golaszewski <[email protected]>
Cc Linus Walleij <[email protected]>
Cc Loic Poulain <[email protected]>
Cc Marc Zyngier <[email protected]>
Cc NXP Linux Team <[email protected]>
Cc Peng Fan <[email protected]>
Cc Shawn Guo <[email protected]>

Quoted 4 lines

---
V3: New patch
V4: Include linux/spinlock.h
V5: Use raw_spinlock per 3c938cc5cebcb ("gpio: use raw spinlock for gpio chip shadowed data")

OK I was a bit confused this looks good and that spinlock is indeed raw. There is maybe a bit of over-locking with one single lock for all registers but I'm not very picky so:

Reviewed-by Linus Walleij <[email protected]>

Yours,
Linus Walleij

Marek Vasut

author

2022-07-25 10:35 UTC #3 lore raw

PATCH v5 2/2 gpio: mxc: Always set GPIOs used as interrupt source to INPUT mode

In reply to Marek Vasut

Always configure GPIO pins which are used as interrupt source as INPUTs. In case the default pin configuration is OUTPUT, or the prior stage does configure the pins as OUTPUT, then Linux will not reconfigure the pin as INPUT and no interrupts are received.

Always configure interrupt source GPIO pin as input to fix the above case.

Fixes 07bd1a6cc7cbb ("MXC arch: Add gpio support for the whole platform")

Signed-off-by Marek Vasut <[email protected]>

Cc Bartosz Golaszewski <[email protected]>

Cc Linus Walleij <[email protected]>

Cc Loic Poulain <[email protected]>

Cc Marc Zyngier <[email protected]>

Cc NXP Linux Team <[email protected]>

Cc Peng Fan <[email protected]>

Cc Shawn Guo <[email protected]>

---
V2: Actually update and clear bits in GDIR register
V3: Rebase on top of new patch 1/2, expand CC list, add Fixes tag
V4: No change
V5: No change

---
 drivers/gpio/gpio-mxc.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

drivers/gpio/gpio-mxc.c +5 -1

index 6cc98a5684ae1..95327c8963b6c 100644
@@ -149,7 +149,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type)
 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
 	struct mxc_gpio_port *port = gc->private;
 	unsigned long flags;
-	u32 bit, val;
+	u32 bit, val, dir;
 	u32 gpio_idx = d->hwirq;
 	int edge;
 	void __iomem *reg = port->base;

@@ -208,6 +208,10 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type)
 
 	writel(1 << gpio_idx, port->base + GPIO_ISR);
 
+	dir = readl(port->base + GPIO_GDIR);
+	dir &= ~BIT(gpio_idx);
+	writel(dir, port->base + GPIO_GDIR);
+
 	raw_spin_unlock_irqrestore(&port->gc.bgpio_lock, flags);
 
 	return 0;

Signature · 1 line

2.35.1

Andy Shevchenko

2022-07-25 20:40 UTC #4 lore raw

Re: [PATCH v5 2/2] gpio: mxc: Always set GPIOs used as interrupt source to INPUT mode

Quoted 10 lines · Marek Vasut

Always configure GPIO pins which are used as interrupt source as INPUTs. In case the default pin configuration is OUTPUT, or the prior stage does configure the pins as OUTPUT, then Linux will not reconfigure the pin as INPUT and no interrupts are received.
Always configure interrupt source GPIO pin as input to fix the above case.
Fixes 07bd1a6cc7cbb ("MXC arch: Add gpio support for the whole platform")
Signed-off-by Marek Vasut <[email protected]>

Can you move below lines

Quoted 7 lines

Cc Bartosz Golaszewski <[email protected]>
Cc Linus Walleij <[email protected]>
Cc Loic Poulain <[email protected]>
Cc Marc Zyngier <[email protected]>
Cc NXP Linux Team <[email protected]>
Cc Peng Fan <[email protected]>
Cc Shawn Guo <[email protected]>

under '---' cutter line? The LORE archive will have all people you Cc'ed.

...

The comment as per v3 still stays.

Signature · 2 lines

With Best Regards,
Andy Shevchenko

Marc Zyngier

Reviewed-by on the v5 series

2022-07-25 15:50 UTC #5 lore raw

In reply to Marek Vasut

Quoted 13 lines · Marek Vasut

The irqchip callbacks in gpio-mxc perform register read-modify-write operations without locking, which may lead to a race condition. Add the missing locking.
In case the GPIO is used as IRQ, make sure it is configured as input.
Marek Vasut (2):
gpio: mxc: Protect GPIO irqchip RMW with bgpio spinlock
gpio: mxc: Always set GPIOs used as interrupt source to INPUT mode
 drivers/gpio/gpio-mxc.c | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

Quoted 7 lines

Cc Bartosz Golaszewski <[email protected]>
Cc Linus Walleij <[email protected]>
Cc Loic Poulain <[email protected]>
Cc Marc Zyngier <[email protected]>
Cc NXP Linux Team <[email protected]>
Cc Peng Fan <[email protected]>
Cc Shawn Guo <[email protected]>

Reviewed-by Marc Zyngier <[email protected]>

M.

Signature · 1 line

Without deviation from the norm, progress is not possible.

Marek Vasut

author

2022-08-23 15:20 UTC #6 lore raw

Quoted 23 lines · Marc Zyngier

Quoted 13 lines · Marek Vasut
The irqchip callbacks in gpio-mxc perform register read-modify-write operations without locking, which may lead to a race condition. Add the missing locking.
In case the GPIO is used as IRQ, make sure it is configured as input.
Marek Vasut (2):
gpio: mxc: Protect GPIO irqchip RMW with bgpio spinlock
gpio: mxc: Always set GPIOs used as interrupt source to INPUT mode
  drivers/gpio/gpio-mxc.c | 17 ++++++++++++++++-
  1 file changed, 16 insertions(+), 1 deletion(-)
Quoted 7 lines
Cc Bartosz Golaszewski <[email protected]>
Cc Linus Walleij <[email protected]>
Cc Loic Poulain <[email protected]>
Cc Marc Zyngier <[email protected]>
Cc NXP Linux Team <[email protected]>
Cc Peng Fan <[email protected]>
Cc Shawn Guo <[email protected]>

Quoted 1 line

Reviewed-by Marc Zyngier <[email protected]>

Can these two now be applied or is there something more to do ?

Marc Zyngier

2022-08-23 16:48 UTC #7 lore raw

Quoted 24 lines · Marek Vasut

Quoted 23 lines · Marc Zyngier
Quoted 20 lines · Marek Vasut
The irqchip callbacks in gpio-mxc perform register read-modify-write operations without locking, which may lead to a race condition. Add the missing locking.
In case the GPIO is used as IRQ, make sure it is configured as input.
Marek Vasut (2):
gpio: mxc: Protect GPIO irqchip RMW with bgpio spinlock
gpio: mxc: Always set GPIOs used as interrupt source to INPUT mode
  drivers/gpio/gpio-mxc.c | 17 ++++++++++++++++-
  1 file changed, 16 insertions(+), 1 deletion(-)
Cc Bartosz Golaszewski <[email protected]>
Cc Linus Walleij <[email protected]>
Cc Loic Poulain <[email protected]>
Cc Marc Zyngier <[email protected]>
Cc NXP Linux Team <[email protected]>
Cc Peng Fan <[email protected]>
Cc Shawn Guo <[email protected]>

Quoted 3 lines

Quoted 1 line
Reviewed-by Marc Zyngier <[email protected]>
Can these two now be applied or is there something more to do ?

That'd be question for Linus and Bartosz, I guess. From my own PoV, this is good to go.

Thanks,

M.

Signature · 1 line

Jazz is not dead. It just smells funny...

Marek Vasut

author

2022-09-29 17:35 UTC #8 lore raw

Quoted 25 lines · Marc Zyngier

Quoted 24 lines · Marek Vasut
Quoted 23 lines · Marc Zyngier
Quoted 20 lines · Marek Vasut
The irqchip callbacks in gpio-mxc perform register read-modify-write operations without locking, which may lead to a race condition. Add the missing locking.
In case the GPIO is used as IRQ, make sure it is configured as input.
Marek Vasut (2):
gpio: mxc: Protect GPIO irqchip RMW with bgpio spinlock
gpio: mxc: Always set GPIOs used as interrupt source to INPUT mode
drivers/gpio/gpio-mxc.c | 17 ++++++++++++++++-
  1 file changed, 16 insertions(+), 1 deletion(-)
Cc Bartosz Golaszewski <[email protected]>
Cc Linus Walleij <[email protected]>
Cc Loic Poulain <[email protected]>
Cc Marc Zyngier <[email protected]>
Cc NXP Linux Team <[email protected]>
Cc Peng Fan <[email protected]>
Cc Shawn Guo <[email protected]>

Quoted 6 lines

Quoted 3 lines
Quoted 1 line
Reviewed-by Marc Zyngier <[email protected]>
Can these two now be applied or is there something more to do ?
That'd be question for Linus and Bartosz, I guess. From my own PoV, this is good to go.

So uh ... could either of you schedule those for I guess 6.2 please ?

Linus Walleij

Reviewed-by on the v5 series

2022-08-26 08:41 UTC #9 lore raw

In reply to Marek Vasut

Quoted 4 lines · Marek Vasut

The irqchip callbacks in gpio-mxc perform register read-modify-write operations without locking, which may lead to a race condition. Add the missing locking.
In case the GPIO is used as IRQ, make sure it is configured as input.

Changes look good to me:

Reviewed-by Linus Walleij <[email protected]>

Yours,
Linus Walleij