crypto: omap-sham updates

From: "Mark A. Greer" <[email protected]>

Convert the device data for the OMAP2 SHAM crypto IP from explicit platform_data to hwmod.

CC Paul Walmsley <[email protected]>

Signed-off-by Mark A. Greer <[email protected]>

---
 arch/arm/mach-omap2/clock2430_data.c               |  1 +
 arch/arm/mach-omap2/devices.c                      | 34 ++++++++------------
 arch/arm/mach-omap2/omap_hwmod_2420_data.c         |  1 +
 arch/arm/mach-omap2/omap_hwmod_2430_data.c         |  1 +
 .../mach-omap2/omap_hwmod_2xxx_interconnect_data.c | 18 +++++++++++
 arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 37 ++++++++++++++++++++++
 arch/arm/mach-omap2/omap_hwmod_common_data.h       |  2 ++
 7 files changed, 73 insertions(+), 21 deletions(-)

arch/arm/mach-omap2/clock2430_data.c +1 -0

index 22404fe..4d52ec6 100644
@@ -1993,6 +1993,7 @@ static struct omap_clk omap2430_clks[] = {
        CLK(NULL,       "sdrc_ick",     &sdrc_ick,      CK_243X),
        CLK(NULL,       "des_ick",      &des_ick,       CK_243X),
        CLK("omap-sham",        "ick",  &sha_ick,       CK_243X),
+       CLK(NULL,       "sha_ick",      &sha_ick,       CK_242X),
        CLK("omap_rng", "ick",          &rng_ick,       CK_243X),
        CLK(NULL,       "rng_ick",      &rng_ick,       CK_243X),
        CLK("omap-aes", "ick",  &aes_ick,       CK_243X),

arch/arm/mach-omap2/devices.c +6 -20

index cba60e0..f18fa50 100644
@@ -34,6 +34,8 @@
 #include "mux.h"
 #include "control.h"
 #include "devices.h"
+#include "cm2xxx_3xxx.h"
+#include "cm-regbits-24xx.h"
 
 #define L3_MODULES_MAX_LEN 12
 #define L3_MODULES 3

@@ -453,24 +455,6 @@ static void omap_init_rng(void)
 
 #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
 
-#ifdef CONFIG_ARCH_OMAP2
-static struct resource omap2_sham_resources[] = {
-       {
-               .start  = OMAP24XX_SEC_SHA1MD5_BASE,
-               .end    = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
-               .flags  = IORESOURCE_MEM,
-       },
-       {
-               .start  = 51 + OMAP_INTC_START,
-               .flags  = IORESOURCE_IRQ,
-       }
-};
-static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
-#else
-#define omap2_sham_resources           NULL
-#define omap2_sham_resources_sz                0
-#endif
-
 #ifdef CONFIG_ARCH_OMAP3
 static struct resource omap3_sham_resources[] = {
        {

@@ -501,16 +485,24 @@ static struct platform_device sham_device = {
 static void omap_init_sham(void)
 {
        if (cpu_is_omap24xx()) {
-               sham_device.resource = omap2_sham_resources;
-               sham_device.num_resources = omap2_sham_resources_sz;
+               struct omap_hwmod *oh;
+               struct platform_device *pdev;
+
+               oh = omap_hwmod_lookup("sham");

arch/arm/mach-omap2/devices.c +0 -1

        } else {
                pr_err("%s: platform not supported\n", __func__);
                return;
        }
-       platform_device_register(&sham_device);
 }
 #else
 static inline void omap_init_sham(void) { }

arch/arm/mach-omap2/omap_hwmod_2420_data.c +1 -0

index b5db600..b102a53 100644
@@ -603,6 +603,7 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
        &omap2420_l4_core__mcbsp2,
        &omap2420_l4_core__msdi1,
        &omap2xxx_l4_core__rng,
+       &omap2xxx_l4_core__sham,
        &omap2420_l4_core__hdq1w,
        &omap2420_l4_wkup__counter_32k,
        &omap2420_l3__gpmc,

arch/arm/mach-omap2/omap_hwmod_2430_data.c +1 -0

index c455e41..b1ce7b0 100644
@@ -963,6 +963,7 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = {
        &omap2430_l4_core__mcbsp5,
        &omap2430_l4_core__hdq1w,
        &omap2xxx_l4_core__rng,
+       &omap2xxx_l4_core__sham,
        &omap2430_l4_wkup__counter_32k,
        &omap2430_l3__gpmc,
        NULL,

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c +0 -0

index 1a1287d..bb314c5 100644
@@ -138,6 +138,15 @@ static struct omap_hwmod_addr_space omap2_rng_addr_space[] = {
        { }

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c +10 -0

+
 /*
  * Common interconnect data
  */

@@ -389,3 +398,12 @@ struct omap_hwmod_ocp_if omap2xxx_l4_core__rng = {
        .addr           = omap2_rng_addr_space,
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
+
+/* l4 core -> sham interface */
+struct omap_hwmod_ocp_if omap2xxx_l4_core__sham = {
+       .master         = &omap2xxx_l4_core_hwmod,
+       .slave          = &omap2xxx_sham_hwmod,
+       .clk            = "sha_ick",
+       .addr           = omap2xxx_sham_addrs,
+       .user           = OCP_USER_MPU,
+};

arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c +37 -0

index bd9220e..a041670 100644
@@ -851,3 +851,40 @@ struct omap_hwmod omap2xxx_rng_hwmod = {
        .flags          = HWMOD_INIT_NO_RESET,
        .class          = &omap2_rng_hwmod_class,
 };
+
+/* SHAM */
+
+static struct omap_hwmod_class_sysconfig omap2_sham_sysc = {
+       .rev_offs       = 0x5c,
+       .sysc_offs      = 0x60,
+       .syss_offs      = 0x64,
+       .sysc_flags     = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
+                          SYSS_HAS_RESET_STATUS),
+       .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap2xxx_sham_class = {
+       .name   = "sham",
+       .sysc   = &omap2_sham_sysc,
+};
+
+struct omap_hwmod_irq_info omap2_sham_mpu_irqs[] = {
+       { .irq = 51 + OMAP_INTC_START, },
+       { .irq = -1 }
+};
+
+struct omap_hwmod omap2xxx_sham_hwmod = {
+       .name           = "sham",
+       .mpu_irqs       = omap2_sham_mpu_irqs,
+       .main_clk       = "l4_ck",
+       .prcm           = {
+               .omap2 = {
+                       .module_offs = CORE_MOD,
+                       .prcm_reg_id = 4,
+                       .module_bit = OMAP24XX_EN_SHA_SHIFT,
+                       .idlest_reg_id = 4,
+                       .idlest_idle_bit = OMAP24XX_ST_SHA_SHIFT,
+               },
+       },
+       .class          = &omap2xxx_sham_class,
+};

arch/arm/mach-omap2/omap_hwmod_common_data.h +2 -1

index 2bc8f17..74a7b7a 100644
@@ -78,6 +78,7 @@ extern struct omap_hwmod omap2xxx_mcspi2_hwmod;
 extern struct omap_hwmod omap2xxx_counter_32k_hwmod;
 extern struct omap_hwmod omap2xxx_gpmc_hwmod;
 extern struct omap_hwmod omap2xxx_rng_hwmod;
+extern struct omap_hwmod omap2xxx_sham_hwmod;
 
 /* Common interface data across OMAP2xxx */
 extern struct omap_hwmod_ocp_if omap2xxx_l3_main__l4_core;

@@ -105,6 +106,7 @@ extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_dispc;
 extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_rfbi;
 extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_venc;
 extern struct omap_hwmod_ocp_if omap2xxx_l4_core__rng;
+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__sham;
 
 /* Common IP block data */
 extern struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[];
--

1.7.12

Hello,

Quoted 29 lines

From: "Mark A. Greer" <[email protected]>

Convert the device data for the OMAP2 SHAM crypto IP from explicit platform_data to hwmod.

CC Paul Walmsley <[email protected]>

Signed-off-by Mark A. Greer <[email protected]>

---

arch/arm/mach-omap2/devices.c +9 -2

index cba60e0..f18fa50 100644
@@ -501,16 +485,24 @@ static struct platform_device sham_device = {
 static void omap_init_sham(void)
 {
        if (cpu_is_omap24xx()) {
-               sham_device.resource = omap2_sham_resources;
-               sham_device.num_resources = omap2_sham_resources_sz;
+               struct omap_hwmod *oh;
+               struct platform_device *pdev;
+
+               oh = omap_hwmod_lookup("sham");
+               if (!oh)
+                       return;
+
+               pdev = omap_device_build("omap-sham", -1, oh, NULL, 0, NULL,
+                                        0, 0);

arch/arm/mach-omap2/devices.c static struct platform_device sham_device = { · line 501

Quoted 5 lines

arch/arm/mach-omap2/devices.c +2 -0

+               WARN(IS_ERR(pdev), "Can't build omap_device for omap-sham\n");
        } else if (cpu_is_omap34xx()) {
                sham_device.resource = omap3_sham_resources;
                sham_device.num_resources = omap3_sham_resources_sz;
+               platform_device_register(&sham_device);

Why changes are only for OMAP2?
OMAP3 is also the same class.

Quoted 6 lines

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c +0 -0

index 1a1287d..bb314c5 100644
@@ -138,6 +138,15 @@ static struct omap_hwmod_addr_space omap2_rng_addr_space[] = {
        { }

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c static struct omap_hwmod_addr_space omap2_rng_addr_space[] = { · line 148

Quoted 10 lines

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c +8 -0

 };
 
+struct omap_hwmod_addr_space omap2xxx_sham_addrs[] = {
+       {
+               .pa_start       = 0x480a4000,
+               .pa_end         = 0x480a4000 + 0x64 - 1,
+               .flags          = ADDR_TYPE_RT
+       },
+       { }
+};

Why not using macros as it was before?

OMAP24XX_SEC_SHA1MD5_BASE

Quoted 2 lines · Dmitry

Why not using macros as it was before?

Quoted 1 line

OMAP24XX_SEC_SHA1MD5_BASE

I am following the precedent set in the existing code of that file which uses the actual address instead of a macro (except for uart).

I have no preference but I believe that is how Paul prefers it.

Paul?

Quoted 11 lines · Mark A. Greer

Quoted 3 lines · Dmitry

Why not using macros as it was before?

OMAP24XX_SEC_SHA1MD5_BASE

I am following the precedent set in the existing code of that file which uses the actual address instead of a macro (except for uart).

I have no preference but I believe that is how Paul prefers it.

Quoted 1 line

Paul?

My upstream prefers the raw addresses, I believe, under the rationale that it allows the macro definitions to be removed from arch/arm/mach-omap2. This reduces the total number of lines of code in that directory - and this is currently an overriding concern of my upstreams.

So, yes the address format in your patch is fine.

Quoted 20 lines · Paul Walmsley

Quoted 4 lines · Mark A. Greer

Quoted 2 lines · Dmitry

Why not using macros as it was before?

Quoted 8 lines

Quoted 1 line

OMAP24XX_SEC_SHA1MD5_BASE

I am following the precedent set in the existing code of that file which uses the actual address instead of a macro (except for uart).

I have no preference but I believe that is how Paul prefers it.

Paul?

My upstream prefers the raw addresses, I believe, under the rationale that it allows the macro definitions to be removed from arch/arm/mach-omap2. This reduces the total number of lines of code in that directory - and this is currently an overriding concern of my upstreams.

Quoted 1 line

So, yes the address format in your patch is fine.

Yes that should be the only place where that address is defined. If OMAP24XX_SEC_SHA1MD5_BASE is used in multiple locations, then it makes sense to define it in some local header.

From: "Mark A. Greer" <[email protected]>

Convert the device data for the OMAP3 SHAM2 (SHA1/MD5) crypto IP from explicit platform_data to hwmod.

CC Paul Walmsley <[email protected]>

Signed-off-by Mark A. Greer <[email protected]>

---
 arch/arm/mach-omap2/clock3xxx_data.c       |  1 +
 arch/arm/mach-omap2/devices.c              | 42 ++-------------------
 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 60 ++++++++++++++++++++++++++++++
 3 files changed, 64 insertions(+), 39 deletions(-)

arch/arm/mach-omap2/clock3xxx_data.c +1 -0

index 1f42c9d..6f14d9b 100644
@@ -3342,6 +3342,7 @@ static struct omap_clk omap3xxx_clks[] = {
        CLK(NULL,       "icr_ick",      &icr_ick,       CK_34XX | CK_36XX),
        CLK("omap-aes", "ick",  &aes2_ick,      CK_34XX | CK_36XX),
        CLK("omap-sham",        "ick",  &sha12_ick,     CK_34XX | CK_36XX),
+       CLK(NULL,       "sha12_ick",    &sha12_ick,     CK_34XX | CK_36XX),
        CLK(NULL,       "des2_ick",     &des2_ick,      CK_34XX | CK_36XX),
        CLK("omap_hsmmc.1",     "ick",  &mmchs2_ick,    CK_3XXX),
        CLK("omap_hsmmc.0",     "ick",  &mmchs1_ick,    CK_3XXX),

arch/arm/mach-omap2/devices.c +1 -8

index f18fa50..f38ac9d 100644
@@ -36,6 +36,7 @@
 #include "devices.h"
 #include "cm2xxx_3xxx.h"
 #include "cm-regbits-24xx.h"
+#include "cm-regbits-34xx.h"
 
 #define L3_MODULES_MAX_LEN 12
 #define L3_MODULES 3

@@ -453,38 +454,9 @@ static void omap_init_rng(void)
        WARN(IS_ERR(pdev), "Can't build omap_device for omap_rng\n");
 }
 
-#if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
-
-#ifdef CONFIG_ARCH_OMAP3
-static struct resource omap3_sham_resources[] = {
-       {
-               .start  = OMAP34XX_SEC_SHA1MD5_BASE,
-               .end    = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
-               .flags  = IORESOURCE_MEM,

arch/arm/mach-omap2/devices.c +2 -21

-static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
-#else
-#define omap3_sham_resources           NULL
-#define omap3_sham_resources_sz                0
-#endif
-
-static struct platform_device sham_device = {
-       .name           = "omap-sham",
-       .id             = -1,
-};
-
-static void omap_init_sham(void)
+static void __init omap_init_sham(void)
 {
-       if (cpu_is_omap24xx()) {
+       if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
                struct omap_hwmod *oh;
                struct platform_device *pdev;
 

@@ -495,18 +467,10 @@ static void omap_init_sham(void)
                pdev = omap_device_build("omap-sham", -1, oh, NULL, 0, NULL,
                                         0, 0);
                WARN(IS_ERR(pdev), "Can't build omap_device for omap-sham\n");
-       } else if (cpu_is_omap34xx()) {
-               sham_device.resource = omap3_sham_resources;
-               sham_device.num_resources = omap3_sham_resources_sz;
-               platform_device_register(&sham_device);
        } else {
                pr_err("%s: platform not supported\n", __func__);
-               return;
        }
 }
-#else
-static inline void omap_init_sham(void) { }
-#endif
 
 #if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
 

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +60 -1

index f67b7ee..785a0c5 100644
@@ -3543,6 +3543,65 @@ static struct omap_hwmod_ocp_if omap3xxx_l3_main__gpmc = {
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l4_core -> SHAM2 (SHA1/MD5) (similar to omap24xx) */
+static struct omap_hwmod_class_sysconfig omap3_sham_sysc = {
+       .rev_offs       = 0x5c,
+       .sysc_offs      = 0x60,
+       .syss_offs      = 0x64,
+       .sysc_flags     = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
+                          SYSS_HAS_RESET_STATUS),
+       .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap3xxx_sham_class = {
+       .name   = "sham",
+       .sysc   = &omap3_sham_sysc,
+};
+
+struct omap_hwmod_irq_info omap3_sham_mpu_irqs[] = {
+       { .irq = 49 + OMAP_INTC_START, },
+       { .irq = -1 }
+};
+
+struct omap_hwmod_dma_info omap3_sham_sdma_reqs[] = {
+       { .name = "rx", .dma_req = OMAP34XX_DMA_SHA1MD5_RX, },
+       { .dma_req = -1 }
+};
+
+struct omap_hwmod omap3xxx_sham_hwmod = {
+       .name           = "sham",
+       .mpu_irqs       = omap3_sham_mpu_irqs,
+       .sdma_reqs      = omap3_sham_sdma_reqs,
+       .main_clk       = "sha12_ick",
+       .prcm           = {
+               .omap2 = {
+                       .module_offs = CORE_MOD,
+                       .prcm_reg_id = 1,
+                       .module_bit = OMAP3430_EN_SHA12_SHIFT,
+                       .idlest_reg_id = 1,
+                       .idlest_idle_bit = OMAP3430_ST_SHA12_SHIFT,
+               },
+       },
+       .class          = &omap3xxx_sham_class,
+};
+
+static struct omap_hwmod_addr_space omap3xxx_sham_addrs[] = {
+       {
+               .pa_start       = 0x480c3000,
+               .pa_end         = 0x480c3000 + 0x64 - 1,
+               .flags          = ADDR_TYPE_RT
+       },
+       { }
+};
+
+static struct omap_hwmod_ocp_if omap3xxx_l4_core__sham = {
+       .master         = &omap3xxx_l4_core_hwmod,
+       .slave          = &omap3xxx_sham_hwmod,
+       .clk            = "sha12_ick",
+       .addr           = omap3xxx_sham_addrs,
+       .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = {
        &omap3xxx_l3_main__l4_core,
        &omap3xxx_l3_main__l4_per,

@@ -3596,6 +3655,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = {
 /* GP-only hwmod links */
 static struct omap_hwmod_ocp_if *omap3xxx_gp_hwmod_ocp_ifs[] __initdata = {
        &omap3xxx_l4_sec__timer12,
+       &omap3xxx_l4_core__sham,
        NULL
 };
 
--

1.7.12

From: "Mark A. Greer" <[email protected]>

Convert the omap-sham crypto driver to use the pm_runtime API instead of the clk API.

CC Kevin Hilman <[email protected]>

CC Paul Walmsley <[email protected]>

CC Dmitry Kasatkin <[email protected]>

Signed-off-by Mark A. Greer <[email protected]>

---
 drivers/crypto/omap-sham.c | 28 +++++++++++-----------------
 1 file changed, 11 insertions(+), 17 deletions(-)

drivers/crypto/omap-sham.c +11 -17

index a3fd6fc..85d43b2 100644
@@ -22,12 +22,12 @@
 #include <linux/errno.h>
 #include <linux/interrupt.h>
 #include <linux/kernel.h>
-#include <linux/clk.h>
 #include <linux/irq.h>
 #include <linux/io.h>
 #include <linux/platform_device.h>
 #include <linux/scatterlist.h>
 #include <linux/dma-mapping.h>
+#include <linux/pm_runtime.h>
 #include <linux/delay.h>
 #include <linux/crypto.h>
 #include <linux/cryptohash.h>

@@ -141,7 +141,6 @@ struct omap_sham_dev {
 	struct device		*dev;
 	void __iomem		*io_base;
 	int			irq;
-	struct clk		*iclk;
 	spinlock_t		lock;
 	int			err;
 	int			dma;

@@ -238,7 +237,7 @@ static void omap_sham_copy_ready_hash(struct ahash_request *req)
 
 static int omap_sham_hw_init(struct omap_sham_dev *dd)
 {
-	clk_enable(dd->iclk);
+	pm_runtime_get_sync(dd->dev);
 
 	if (!test_bit(FLAGS_INIT, &dd->flags)) {
 		omap_sham_write_mask(dd, SHA_REG_MASK,

@@ -653,7 +652,8 @@ static void omap_sham_finish_req(struct ahash_request *req, int err)
 	/* atomic operation is not needed here */
 	dd->flags &= ~(BIT(FLAGS_BUSY) | BIT(FLAGS_FINAL) | BIT(FLAGS_CPU) |
 			BIT(FLAGS_DMA_READY) | BIT(FLAGS_OUTPUT_READY));
-	clk_disable(dd->iclk);
+
+	pm_runtime_put_sync(dd->dev);
 
 	if (req->base.complete)
 		req->base.complete(&req->base, err);

@@ -1198,14 +1198,6 @@ static int __devinit omap_sham_probe(struct platform_device *pdev)
 	if (err)
 		goto dma_err;
 
-	/* Initializing the clock */
-	dd->iclk = clk_get(dev, "ick");
-	if (IS_ERR(dd->iclk)) {
-		dev_err(dev, "clock intialization failed.\n");
-		err = PTR_ERR(dd->iclk);
-		goto clk_err;
-	}
-
 	dd->io_base = ioremap(dd->phys_base, SZ_4K);
 	if (!dd->io_base) {
 		dev_err(dev, "can't ioremap\n");

@@ -1213,11 +1205,14 @@ static int __devinit omap_sham_probe(struct platform_device *pdev)
 		goto io_err;
 	}
 
-	clk_enable(dd->iclk);
+	pm_runtime_enable(dev);
+	pm_runtime_get_sync(dev);
+
 	dev_info(dev, "hw accel on OMAP rev %u.%u\n",
 		(omap_sham_read(dd, SHA_REG_REV) & SHA_REG_REV_MAJOR) >> 4,
 		omap_sham_read(dd, SHA_REG_REV) & SHA_REG_REV_MINOR);
-	clk_disable(dd->iclk);
+
+	pm_runtime_put_sync(&pdev->dev);
 
 	spin_lock(&sham.lock);
 	list_add_tail(&dd->list, &sham.dev_list);

@@ -1235,9 +1230,8 @@ err_algs:
 	for (j = 0; j < i; j++)
 		crypto_unregister_ahash(&algs[j]);
 	iounmap(dd->io_base);
+	pm_runtime_disable(dev);
 io_err:
-	clk_put(dd->iclk);
-clk_err:
 	omap_sham_dma_cleanup(dd);
 dma_err:
 	if (dd->irq >= 0)

@@ -1266,7 +1260,7 @@ static int __devexit omap_sham_remove(struct platform_device *pdev)
 		crypto_unregister_ahash(&algs[i]);
 	tasklet_kill(&dd->done_task);
 	iounmap(dd->io_base);
-	clk_put(dd->iclk);
+	pm_runtime_disable(&pdev->dev);
 	omap_sham_dma_cleanup(dd);
 	if (dd->irq >= 0)
 		free_irq(dd->irq, dd);

From: "Mark A. Greer" <[email protected]>

Remove usage of the private OMAP DMA API. The dmaengine API will be used instead.

CC Russell King <[email protected]>

CC Dmitry Kasatkin <[email protected]>

Signed-off-by Mark A. Greer <[email protected]>

---
 drivers/crypto/omap-sham.c | 117 ---------------------------------------------
 1 file changed, 117 deletions(-)

drivers/crypto/omap-sham.c +0 -45

index b57277c..ebb5255 100644
@@ -13,8 +13,6 @@
  * Some ideas are from old omap-sha1-md5.c driver.
  */
 
-#define OMAP_SHAM_DMA_PRIVATE
-
 #define pr_fmt(fmt) "%s: " fmt, __func__
 
 #include <linux/err.h>

@@ -29,10 +27,8 @@
 #include <linux/platform_device.h>
 #include <linux/scatterlist.h>
 #include <linux/dma-mapping.h>
-#ifndef OMAP_SHAM_DMA_PRIVATE
 #include <linux/dmaengine.h>
 #include <linux/omap-dma.h>
-#endif
 #include <linux/pm_runtime.h>
 #include <linux/delay.h>
 #include <linux/crypto.h>

@@ -43,12 +39,6 @@
 #include <crypto/hash.h>
 #include <crypto/internal/hash.h>
 
-#ifdef OMAP_SHAM_DMA_PRIVATE
-#include <plat/cpu.h>
-#include <plat/dma.h>
-#include <mach/irqs.h>
-#endif
-
 #define SHA_REG_DIGEST(x)              (0x00 + ((x) * 0x04))
 #define SHA_REG_DIN(x)                 (0x1C + ((x) * 0x04))
 

@@ -120,9 +110,7 @@ struct omap_sham_reqctx {
 
        /* walk state */
        struct scatterlist      *sg;
-#ifndef OMAP_SHAM_DMA_PRIVATE
        struct scatterlist      sgl;
-#endif
        unsigned int            offset; /* offset in current sg */
        unsigned int            total;  /* total request */
 

@@ -156,12 +144,7 @@ struct omap_sham_dev {
        int                     irq;
        spinlock_t              lock;
        int                     err;
-#ifdef OMAP_SHAM_DMA_PRIVATE
-       int                     dma;
-       int                     dma_lch;
-#else
        struct dma_chan         *dma_lch;
-#endif
        struct tasklet_struct   done_task;
 
        unsigned long           flags;

@@ -331,7 +314,6 @@ static int omap_sham_xmit_cpu(struct omap_sham_dev *dd, const u8 *buf,
        return -EINPROGRESS;
 }
 
-#ifndef OMAP_SHAM_DMA_PRIVATE
 static void omap_sham_dma_callback(void *param)
 {
        struct omap_sham_dev *dd = param;

@@ -339,34 +321,18 @@ static void omap_sham_dma_callback(void *param)
        set_bit(FLAGS_DMA_READY, &dd->flags);
        tasklet_schedule(&dd->done_task);
 }
-#endif
 
 static int omap_sham_xmit_dma(struct omap_sham_dev *dd, dma_addr_t dma_addr,
                              size_t length, int final, int is_sg)
 {
        struct omap_sham_reqctx *ctx = ahash_request_ctx(dd->req);
-#ifdef OMAP_SHAM_DMA_PRIVATE
-       int len32;
-#else
        struct dma_async_tx_descriptor *tx;
        struct dma_slave_config cfg;
        int ret;
-#endif
 
        dev_dbg(dd->dev, "xmit_dma: digcnt: %d, length: %d, final: %d\n",
                                                ctx->digcnt, length, final);
 
-#ifdef OMAP_SHAM_DMA_PRIVATE
-       len32 = DIV_ROUND_UP(length, sizeof(u32));
-
-       omap_set_dma_transfer_params(dd->dma_lch, OMAP_DMA_DATA_TYPE_S32, len32,
-                       1, OMAP_DMA_SYNC_PACKET, dd->dma,
-                               OMAP_DMA_DST_SYNC_PREFETCH);
-
-       omap_set_dma_src_params(dd->dma_lch, 0, OMAP_DMA_AMODE_POST_INC,
-                               dma_addr, 0, 0);
-
-#else
        memset(&cfg, 0, sizeof(cfg));
 
        cfg.dst_addr = dd->phys_base + SHA_REG_DIN(0);

@@ -406,7 +372,6 @@ static int omap_sham_xmit_dma(struct omap_sham_dev *dd, dma_addr_t dma_addr,
 
        tx->callback = omap_sham_dma_callback;
        tx->callback_param = dd;
-#endif
 
        omap_sham_write_ctrl(dd, length, final, 1);
 

@@ -417,12 +382,8 @@ static int omap_sham_xmit_dma(struct omap_sham_dev *dd, dma_addr_t dma_addr,
 
        set_bit(FLAGS_DMA_ACTIVE, &dd->flags);
 
-#ifdef OMAP_SHAM_DMA_PRIVATE
-       omap_start_dma(dd->dma_lch);
-#else
        dmaengine_submit(tx);
        dma_async_issue_pending(dd->dma_lch);
-#endif
 
        return -EINPROGRESS;
 }

@@ -528,7 +489,6 @@ static int omap_sham_update_dma_start(struct omap_sham_dev *dd)
        if (ctx->bufcnt || ctx->offset)
                return omap_sham_update_dma_slow(dd);
 
-#ifndef OMAP_SHAM_DMA_PRIVATE
        /*
         * Don't use the sg interface when the transfer size is less
         * than the number of elements in a DMA frame.  Otherwise,

@@ -537,7 +497,6 @@ static int omap_sham_update_dma_start(struct omap_sham_dev *dd)
         */
        if (ctx->total < (DST_MAXBURST * sizeof(u32)))
                return omap_sham_update_dma_slow(dd);
-#endif
 
        dev_dbg(dd->dev, "fast: digcnt: %d, bufcnt: %u, total: %u\n",
                        ctx->digcnt, ctx->bufcnt, ctx->total);

@@ -599,11 +558,7 @@ static int omap_sham_update_dma_stop(struct omap_sham_dev *dd)
 {
        struct omap_sham_reqctx *ctx = ahash_request_ctx(dd->req);
 
-#ifdef OMAP_SHAM_DMA_PRIVATE
-       omap_stop_dma(dd->dma_lch);
-#else
        dmaengine_terminate_all(dd->dma_lch);
-#endif
 
        if (ctx->flags & BIT(FLAGS_SG)) {
                dma_unmap_sg(dd->dev, ctx->sg, 1, DMA_TO_DEVICE);

@@ -807,18 +762,6 @@ static int omap_sham_handle_queue(struct omap_sham_dev *dd,
        if (err)
                goto err1;
 

drivers/crypto/omap-sham.c +0 -63

-#endif
-
        if (ctx->digcnt)
                /* request has changed - restore hash */
                omap_sham_copy_hash(req, 0);

@@ -1209,55 +1152,13 @@ static irqreturn_t omap_sham_irq(int irq, void *dev_id)
        return IRQ_HANDLED;
 }
 
-#ifdef OMAP_SHAM_DMA_PRIVATE
-static void omap_sham_dma_callback(int lch, u16 ch_status, void *data)
-{
-       struct omap_sham_dev *dd = data;
-
-       if (ch_status != OMAP_DMA_BLOCK_IRQ) {
-               pr_err("omap-sham DMA error status: 0x%hx\n", ch_status);
-               dd->err = -EIO;
-               clear_bit(FLAGS_INIT, &dd->flags);/* request to re-initialize */
-       }
-
-       set_bit(FLAGS_DMA_READY, &dd->flags);
-       tasklet_schedule(&dd->done_task);
-}
-
-static int omap_sham_dma_init(struct omap_sham_dev *dd)
-{
-       int err;
-
-       dd->dma_lch = -1;
-
-       err = omap_request_dma(dd->dma, dev_name(dd->dev),
-                       omap_sham_dma_callback, dd, &dd->dma_lch);
-       if (err) {
-               dev_err(dd->dev, "Unable to request DMA channel\n");
-               return err;
-       }
-
-       return 0;
-}
-
-static void omap_sham_dma_cleanup(struct omap_sham_dev *dd)
-{
-       if (dd->dma_lch >= 0) {
-               omap_free_dma(dd->dma_lch);
-               dd->dma_lch = -1;
-       }
-}
-#endif
-
 static int __devinit omap_sham_probe(struct platform_device *pdev)
 {
        struct omap_sham_dev *dd;
        struct device *dev = &pdev->dev;
        struct resource *res;
-#ifndef OMAP_SHAM_DMA_PRIVATE
        dma_cap_mask_t mask;
        unsigned dma_chan;
-#endif
        int err, i, j;
 
        dd = kzalloc(sizeof(struct omap_sham_dev), GFP_KERNEL);

@@ -1292,11 +1193,7 @@ static int __devinit omap_sham_probe(struct platform_device *pdev)
                err = -ENODEV;
                goto res_err;
        }
-#ifdef OMAP_SHAM_DMA_PRIVATE
-       dd->dma = res->start;
-#else
        dma_chan = res->start;
-#endif
 
        /* Get the IRQ */
        dd->irq = platform_get_irq(pdev,  0);

@@ -1313,11 +1210,6 @@ static int __devinit omap_sham_probe(struct platform_device *pdev)
                goto res_err;
        }
 
-#ifdef OMAP_SHAM_DMA_PRIVATE
-       err = omap_sham_dma_init(dd);
-       if (err)
-               goto dma_err;
-#else
        dma_cap_zero(mask);
        dma_cap_set(DMA_SLAVE, mask);
 

@@ -1328,7 +1220,6 @@ static int __devinit omap_sham_probe(struct platform_device *pdev)
                err = -ENXIO;
                goto dma_err;
        }
-#endif
 
        dd->io_base = ioremap(dd->phys_base, SZ_4K);
        if (!dd->io_base) {

@@ -1364,11 +1255,7 @@ err_algs:
        iounmap(dd->io_base);
        pm_runtime_disable(dev);
 io_err:
-#ifdef OMAP_SHAM_DMA_PRIVATE
-       omap_sham_dma_cleanup(dd);
-#else
        dma_release_channel(dd->dma_lch);
-#endif
 dma_err:
        if (dd->irq >= 0)
                free_irq(dd->irq, dd);

@@ -1397,11 +1284,7 @@ static int __devexit omap_sham_remove(struct platform_device *pdev)
        tasklet_kill(&dd->done_task);
        iounmap(dd->io_base);
        pm_runtime_disable(&pdev->dev);
-#ifdef OMAP_SHAM_DMA_PRIVATE
-       omap_sham_dma_cleanup(dd);
-#else
        dma_release_channel(dd->dma_lch);
-#endif
        if (dd->irq >= 0)
                free_irq(dd->irq, dd);
        kfree(dd);
--

1.7.12

Quoted 21 lines · Mark A. Greer

From: "Mark A. Greer" <[email protected]>

Remove usage of the private OMAP DMA API. The dmaengine API will be used instead.

CC Russell King <[email protected]>

CC Dmitry Kasatkin <[email protected]>

Signed-off-by Mark A. Greer <[email protected]>

---
 drivers/crypto/omap-sham.c | 117 ---------------------------------------------
 1 file changed, 117 deletions(-)

drivers/crypto/omap-sham.c +0 -0

index b57277c..ebb5255 100644
@@ -807,18 +762,6 @@ static int omap_sham_handle_queue(struct omap_sham_dev *dd,
        if (err)
                goto err1;
 

drivers/crypto/omap-sham.c static int omap_sham_handle_queue(struct omap_sham_dev *dd, · line 819

Quoted 10 lines

drivers/crypto/omap-sham.c +0 -10

-#ifdef OMAP_SHAM_DMA_PRIVATE
-       omap_set_dma_dest_params(dd->dma_lch, 0,
-                       OMAP_DMA_AMODE_CONSTANT,
-                       dd->phys_base + SHA_REG_DIN(0), 0, 16);
-
-       omap_set_dma_dest_burst_mode(dd->dma_lch,
-                       OMAP_DMA_DATA_BURST_16);
-
-       omap_set_dma_src_burst_mode(dd->dma_lch,
-                       OMAP_DMA_DATA_BURST_4);

Burst mode significantly improves performance.
How do you configure burst mode with new API?

Quoted 22 lines · Dmitry

Quoted 21 lines · Mark A. Greer

From: "Mark A. Greer" <[email protected]>

Remove usage of the private OMAP DMA API. The dmaengine API will be used instead.

CC Russell King <[email protected]>

CC Dmitry Kasatkin <[email protected]>

Signed-off-by Mark A. Greer <[email protected]>

---
 drivers/crypto/omap-sham.c | 117 ---------------------------------------------
 1 file changed, 117 deletions(-)

drivers/crypto/omap-sham.c +0 -0

index b57277c..ebb5255 100644
@@ -807,18 +762,6 @@ static int omap_sham_handle_queue(struct omap_sham_dev *dd,
        if (err)
                goto err1;
 

Quoted 13 lines

drivers/crypto/omap-sham.c static int omap_sham_handle_queue(struct omap_sham_dev *dd, · line 819

Quoted 10 lines

drivers/crypto/omap-sham.c +0 -10

-#ifdef OMAP_SHAM_DMA_PRIVATE
-       omap_set_dma_dest_params(dd->dma_lch, 0,
-                       OMAP_DMA_AMODE_CONSTANT,
-                       dd->phys_base + SHA_REG_DIN(0), 0, 16);
-
-       omap_set_dma_dest_burst_mode(dd->dma_lch,
-                       OMAP_DMA_DATA_BURST_16);
-
-       omap_set_dma_src_burst_mode(dd->dma_lch,
-                       OMAP_DMA_DATA_BURST_4);

Burst mode significantly improves performance.
How do you configure burst mode with new API?

This is (or should be) taken care of by the dmaengine infrastructure. I've noted that there's an issue and there is a discussion about it here:

        http://www.spinics.net/lists/linux-omap/msg79855.html

We probably need to extend the dmaengine API to allow API-users to request specific tweaks/optimizations/whatever but that's MHO.

Mark
--

Quoted 37 lines · Mark A. Greer

Quoted 22 lines · Dmitry

Quoted 21 lines · Mark A. Greer

From: "Mark A. Greer" <[email protected]>

Remove usage of the private OMAP DMA API. The dmaengine API will be used instead.

CC Russell King <[email protected]>

CC Dmitry Kasatkin <[email protected]>

Signed-off-by Mark A. Greer <[email protected]>

---
 drivers/crypto/omap-sham.c | 117 ---------------------------------------------
 1 file changed, 117 deletions(-)

drivers/crypto/omap-sham.c +0 -0

index b57277c..ebb5255 100644
@@ -807,18 +762,6 @@ static int omap_sham_handle_queue(struct omap_sham_dev *dd,
        if (err)
                goto err1;
 

Quoted 13 lines

drivers/crypto/omap-sham.c static int omap_sham_handle_queue(struct omap_sham_dev *dd, · line 819

Quoted 10 lines

drivers/crypto/omap-sham.c +0 -10

-#ifdef OMAP_SHAM_DMA_PRIVATE
-       omap_set_dma_dest_params(dd->dma_lch, 0,
-                       OMAP_DMA_AMODE_CONSTANT,
-                       dd->phys_base + SHA_REG_DIN(0), 0, 16);
-
-       omap_set_dma_dest_burst_mode(dd->dma_lch,
-                       OMAP_DMA_DATA_BURST_16);
-
-       omap_set_dma_src_burst_mode(dd->dma_lch,
-                       OMAP_DMA_DATA_BURST_4);

Burst mode significantly improves performance.
How do you configure burst mode with new API?

Quoted 9 lines

This is (or should be) taken care of by the dmaengine infrastructure. I've noted that there's an issue and there is a discussion about it here:

        http://www.spinics.net/lists/linux-omap/msg79855.html

We probably need to extend the dmaengine API to allow API-users to request specific tweaks/optimizations/whatever but that's MHO.

Hello,

I am in favor of new APIs.
The only my concern is that it performs worse..

Is it possible to keep burst mode setting there?

Quoted 50 lines · Dmitry

Quoted 37 lines · Mark A. Greer

Quoted 22 lines · Dmitry

Quoted 21 lines · Mark A. Greer

From: "Mark A. Greer" <[email protected]>

Remove usage of the private OMAP DMA API. The dmaengine API will be used instead.

CC Russell King <[email protected]>

CC Dmitry Kasatkin <[email protected]>

Signed-off-by Mark A. Greer <[email protected]>

---
 drivers/crypto/omap-sham.c | 117 ---------------------------------------------
 1 file changed, 117 deletions(-)

drivers/crypto/omap-sham.c +0 -0

index b57277c..ebb5255 100644
@@ -807,18 +762,6 @@ static int omap_sham_handle_queue(struct omap_sham_dev *dd,
        if (err)
                goto err1;
 

Quoted 13 lines

drivers/crypto/omap-sham.c static int omap_sham_handle_queue(struct omap_sham_dev *dd, · line 819

Quoted 10 lines

drivers/crypto/omap-sham.c +0 -10

-#ifdef OMAP_SHAM_DMA_PRIVATE
-       omap_set_dma_dest_params(dd->dma_lch, 0,
-                       OMAP_DMA_AMODE_CONSTANT,
-                       dd->phys_base + SHA_REG_DIN(0), 0, 16);
-
-       omap_set_dma_dest_burst_mode(dd->dma_lch,
-                       OMAP_DMA_DATA_BURST_16);
-
-       omap_set_dma_src_burst_mode(dd->dma_lch,
-                       OMAP_DMA_DATA_BURST_4);

Burst mode significantly improves performance.
How do you configure burst mode with new API?

Quoted 9 lines

This is (or should be) taken care of by the dmaengine infrastructure. I've noted that there's an issue and there is a discussion about it here:

        http://www.spinics.net/lists/linux-omap/msg79855.html

We probably need to extend the dmaengine API to allow API-users to request specific tweaks/optimizations/whatever but that's MHO.

Hello,

Quoted 4 lines

I am in favor of new APIs.
The only my concern is that it performs worse..

Is it possible to keep burst mode setting there?

I'm going to respin the patch the I posted in the email thread above to only set bursting for non-cyclic DMAs.