Skip to contentSkip to conversation

ARM: OMAP: SmartReflex: pass device dependent data via platform data

PATCH New jean.pihet at newoldbits.com 3 participants 7 messages Oct 3, 2012 – Oct 4, 2012

Subsystems (7)
lore
Share & tools
lore
#0 lore raw

cover ARM: OMAP: SmartReflex: pass device dependent data via platform data

From: Jean Pihet <[email protected]>

Remove the device dependent code (ex. cpu_is_xxx()) and settings from the driver code and instead pass them via the platform data. This allows a clean separation of the driver code and the platform code, as required by the move of the platform header files to include/linux/platform_data.

Note about the smartreflex functional clocks: the smartreflex fclks are derived from sys_clk and are renamed "smartreflex.%d". Since the smartreflex device names and the functional clock names are identical the device driver code uses them to control the functional clocks.

Based on mainline 3.6.0. Boot tested on OMAP3&4 platforms.

Jean Pihet (2):
ARM: OMAP: hwmod: align the SmartReflex fck names
ARM: OMAP: SmartReflex: pass device dependent data via platform data

 arch/arm/mach-omap2/clock33xx_data.c       |   12 +++----
 arch/arm/mach-omap2/clock3xxx_data.c       |   12 +++----
 arch/arm/mach-omap2/clock44xx_data.c       |    6 ++--
 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |    8 ++---
 arch/arm/mach-omap2/sr_device.c            |   13 +++++++
 drivers/power/avs/smartreflex.c            |   54 +++++++++-------------------
 include/linux/power/smartreflex.h          |   14 ++++++--
 7 files changed, 61 insertions(+), 58 deletions(-)
Signature · 1 line
1.7.10.4
#1 lore raw

PATCH 1/2 ARM: OMAP: hwmod: align the SmartReflex fck names

From: Jean Pihet <[email protected]>

Rename the smartreflex fck names for consistency and better readability; rename the clock aliases for use by the SmartReflex driver, with the "smartreflex.%d" format.

---
 arch/arm/mach-omap2/clock33xx_data.c       |   12 ++++++------
 arch/arm/mach-omap2/clock3xxx_data.c       |   12 ++++++------
 arch/arm/mach-omap2/clock44xx_data.c       |    6 +++---
 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |    8 ++++----
 4 files changed, 19 insertions(+), 19 deletions(-)
arch/arm/mach-omap2/clock33xx_data.c +6 -6
index 2026311..851fc54 100644
@@ -548,16 +548,16 @@ static struct clk mcasp1_fck = {
 	.recalc		= &followparent_recalc,
 };
 
-static struct clk smartreflex0_fck = {
-	.name		= "smartreflex0_fck",
+static struct clk smartreflex_mpu_fck = {
+	.name		= "smartreflex_mpu_fck",
 	.clkdm_name	= "l4_wkup_clkdm",
 	.parent		= &sys_clkin_ck,
 	.ops		= &clkops_null,
 	.recalc		= &followparent_recalc,
 };
 
-static struct clk smartreflex1_fck = {
-	.name		= "smartreflex1_fck",
+static struct clk smartreflex_core_fck = {
+	.name		= "smartreflex_core_fck",
 	.clkdm_name	= "l4_wkup_clkdm",
 	.parent		= &sys_clkin_ck,
 	.ops		= &clkops_null,
@@ -1036,8 +1036,8 @@ static struct omap_clk am33xx_clks[] = {
 	CLK("davinci-mcasp.1",  NULL,           &mcasp1_fck,    CK_AM33XX),
 	CLK("NULL",	"mmc2_fck",		&mmc2_fck,	CK_AM33XX),
 	CLK(NULL,	"mmu_fck",		&mmu_fck,	CK_AM33XX),
-	CLK(NULL,	"smartreflex0_fck",	&smartreflex0_fck,	CK_AM33XX),
-	CLK(NULL,	"smartreflex1_fck",	&smartreflex1_fck,	CK_AM33XX),
+	CLK(NULL,	"smartreflex.0",	&smartreflex_mpu_fck,	CK_AM33XX),
+	CLK(NULL,	"smartreflex.1",	&smartreflex_core_fck,	CK_AM33XX),
 	CLK(NULL,	"timer1_fck",		&timer1_fck,	CK_AM33XX),
 	CLK(NULL,	"timer2_fck",		&timer2_fck,	CK_AM33XX),
 	CLK(NULL,	"timer3_fck",		&timer3_fck,	CK_AM33XX),
arch/arm/mach-omap2/clock3xxx_data.c +6 -6
index 700317a..796a1dc 100644
@@ -3050,8 +3050,8 @@ static struct clk traceclk_fck = {
 /* SR clocks */
 
 /* SmartReflex fclk (VDD1) */
-static struct clk sr1_fck = {
-	.name		= "sr1_fck",
+static struct clk smartreflex_mpu_iva_fck = {
+	.name		= "smartreflex_mpu_iva_fck",
 	.ops		= &clkops_omap2_dflt_wait,
 	.parent		= &sys_ck,
 	.enable_reg	= OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
@@ -3061,8 +3061,8 @@ static struct clk sr1_fck = {
 };
 
 /* SmartReflex fclk (VDD2) */
-static struct clk sr2_fck = {
-	.name		= "sr2_fck",
+static struct clk smartreflex_core_fck = {
+	.name		= "smartreflex_core_fck",
 	.ops		= &clkops_omap2_dflt_wait,
 	.parent		= &sys_ck,
 	.enable_reg	= OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
@@ -3448,8 +3448,8 @@ static struct omap_clk omap3xxx_clks[] = {
 	CLK(NULL,	"atclk_fck",	&atclk_fck,	CK_3XXX),
 	CLK(NULL,	"traceclk_src_fck", &traceclk_src_fck, CK_3XXX),
 	CLK(NULL,	"traceclk_fck",	&traceclk_fck,	CK_3XXX),
-	CLK(NULL,	"sr1_fck",	&sr1_fck,	CK_34XX | CK_36XX),
-	CLK(NULL,	"sr2_fck",	&sr2_fck,	CK_34XX | CK_36XX),
+	CLK(NULL,	"smartreflex.0",	&smartreflex_mpu_iva_fck,	CK_34XX | CK_36XX),
+	CLK(NULL,	"smartreflex.1",	&smartreflex_core_fck,	CK_34XX | CK_36XX),
 	CLK(NULL,	"sr_l4_ick",	&sr_l4_ick,	CK_34XX | CK_36XX),
 	CLK(NULL,	"secure_32k_fck", &secure_32k_fck, CK_3XXX),
 	CLK(NULL,	"gpt12_fck",	&gpt12_fck,	CK_3XXX),
arch/arm/mach-omap2/clock44xx_data.c +3 -3
index 500682c..b9b988a 100644
@@ -3224,9 +3224,9 @@ static struct omap_clk omap44xx_clks[] = {
 	CLK(NULL,	"slimbus2_fclk_0",		&slimbus2_fclk_0,	CK_443X),
 	CLK(NULL,	"slimbus2_slimbus_clk",		&slimbus2_slimbus_clk,	CK_443X),
 	CLK(NULL,	"slimbus2_fck",			&slimbus2_fck,	CK_443X),
-	CLK(NULL,	"smartreflex_core_fck",		&smartreflex_core_fck,	CK_443X),
-	CLK(NULL,	"smartreflex_iva_fck",		&smartreflex_iva_fck,	CK_443X),
-	CLK(NULL,	"smartreflex_mpu_fck",		&smartreflex_mpu_fck,	CK_443X),
+	CLK(NULL,	"smartreflex.0",		&smartreflex_core_fck,	CK_443X),
+	CLK(NULL,	"smartreflex.1",		&smartreflex_iva_fck,	CK_443X),
+	CLK(NULL,	"smartreflex.2",		&smartreflex_mpu_fck,	CK_443X),
 	CLK(NULL,	"timer1_fck",			&timer1_fck,	CK_443X),
 	CLK(NULL,	"timer10_fck",			&timer10_fck,	CK_443X),
 	CLK(NULL,	"timer11_fck",			&timer11_fck,	CK_443X),
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +4 -4
index 94b38af..f1095a6 100644
@@ -1368,7 +1368,7 @@ static struct omap_hwmod_irq_info omap3_smartreflex_mpu_irqs[] = {
 static struct omap_hwmod omap34xx_sr1_hwmod = {
 	.name		= "smartreflex_mpu_iva",
 	.class		= &omap34xx_smartreflex_hwmod_class,
-	.main_clk	= "sr1_fck",
+	.main_clk	= "smartreflex_mpu_iva_fck",
 	.prcm		= {
 		.omap2 = {
 			.prcm_reg_id = 1,
@@ -1386,7 +1386,7 @@ static struct omap_hwmod omap34xx_sr1_hwmod = {
 static struct omap_hwmod omap36xx_sr1_hwmod = {
 	.name		= "smartreflex_mpu_iva",
 	.class		= &omap36xx_smartreflex_hwmod_class,
-	.main_clk	= "sr1_fck",
+	.main_clk	= "smartreflex_mpu_iva_fck",
 	.prcm		= {
 		.omap2 = {
 			.prcm_reg_id = 1,
@@ -1413,7 +1413,7 @@ static struct omap_hwmod_irq_info omap3_smartreflex_core_irqs[] = {
 static struct omap_hwmod omap34xx_sr2_hwmod = {
 	.name		= "smartreflex_core",
 	.class		= &omap34xx_smartreflex_hwmod_class,
-	.main_clk	= "sr2_fck",
+	.main_clk	= "smartreflex_core_fck",
 	.prcm		= {
 		.omap2 = {
 			.prcm_reg_id = 1,
@@ -1431,7 +1431,7 @@ static struct omap_hwmod omap34xx_sr2_hwmod = {
 static struct omap_hwmod omap36xx_sr2_hwmod = {
 	.name		= "smartreflex_core",
 	.class		= &omap36xx_smartreflex_hwmod_class,
-	.main_clk	= "sr2_fck",
+	.main_clk	= "smartreflex_core_fck",
 	.prcm		= {
 		.omap2 = {
 			.prcm_reg_id = 1,
Signature · 1 line
1.7.10.4
maintainer
#2 lore raw

PATCH 1/2 ARM: OMAP: hwmod: align the SmartReflex fck names

arch/arm/mach-omap2/clock33xx_data.c static struct omap_clk am33xx_clks[] = { · line 1043

Quoted 11 lines · jean.pihet at newoldbits.com
arch/arm/mach-omap2/clock33xx_data.c +2 -2
@@ -1036,8 +1036,8 @@ static struct omap_clk am33xx_clks[] = {
 	CLK("davinci-mcasp.1",  NULL,           &mcasp1_fck,    CK_AM33XX),
 	CLK("NULL",	"mmc2_fck",		&mmc2_fck,	CK_AM33XX),
 	CLK(NULL,	"mmu_fck",		&mmu_fck,	CK_AM33XX),
-	CLK(NULL,	"smartreflex0_fck",	&smartreflex0_fck,	CK_AM33XX),
-	CLK(NULL,	"smartreflex1_fck",	&smartreflex1_fck,	CK_AM33XX),
+	CLK(NULL,	"smartreflex.0",	&smartreflex_mpu_fck,	CK_AM33XX),
+	CLK(NULL,	"smartreflex.1",	&smartreflex_core_fck,	CK_AM33XX),
 	CLK(NULL,	"timer1_fck",		&timer1_fck,	CK_AM33XX),
 	CLK(NULL,	"timer2_fck",		&timer2_fck,	CK_AM33XX),
 	CLK(NULL,	"timer3_fck",		&timer3_fck,	CK_AM33XX),

I think this should be something like this instead:

	CLK("smartreflex.0",	"fck",	&smartreflex_mpu_fck,	CK_AM33XX),
	CLK("smartreflex.1",	"fck",	&smartreflex_core_fck,	CK_AM33XX),

Where the first one is the dev name, the second one is the alias you want to use in the client driver?

Regards,

Tony

author
#3 lore raw

PATCH 1/2 ARM: OMAP: hwmod: align the SmartReflex fck names

Hi Tony,

Quoted 15 lines · Tony Lindgren

arch/arm/mach-omap2/clock33xx_data.c static struct omap_clk am33xx_clks[] = { · line 1043

Quoted 11 lines · jean.pihet at newoldbits.com
arch/arm/mach-omap2/clock33xx_data.c +2 -2
@@ -1036,8 +1036,8 @@ static struct omap_clk am33xx_clks[] = {
      CLK("davinci-mcasp.1",  NULL,           &mcasp1_fck,    CK_AM33XX),
      CLK("NULL",     "mmc2_fck",             &mmc2_fck,      CK_AM33XX),
      CLK(NULL,       "mmu_fck",              &mmu_fck,       CK_AM33XX),
-     CLK(NULL,       "smartreflex0_fck",     &smartreflex0_fck,      CK_AM33XX),
-     CLK(NULL,       "smartreflex1_fck",     &smartreflex1_fck,      CK_AM33XX),
+     CLK(NULL,       "smartreflex.0",        &smartreflex_mpu_fck,   CK_AM33XX),
+     CLK(NULL,       "smartreflex.1",        &smartreflex_core_fck,  CK_AM33XX),
      CLK(NULL,       "timer1_fck",           &timer1_fck,    CK_AM33XX),
      CLK(NULL,       "timer2_fck",           &timer2_fck,    CK_AM33XX),
      CLK(NULL,       "timer3_fck",           &timer3_fck,    CK_AM33XX),

I think this should be something like this instead:

Quoted 5 lines
        CLK("smartreflex.0",    "fck",  &smartreflex_mpu_fck,   CK_AM33XX),
        CLK("smartreflex.1",    "fck",  &smartreflex_core_fck,  CK_AM33XX),

Where the first one is the dev name, the second one is the alias you want to use in the client driver?

Ok, thanks for the suggestion.

It works however I get a ' smartreflex.0: alias fck already exists' warning at boot, coming from _add_hwmod_clocks_clkdev (called from omap_device_alloc).
Since an "fck" is implicitly added for every device (in _add_hwmod_clocks_clkdev) I replaced "fck" in the alias definition by NULL but the warning is still present.

What do you think? /me dives into the omap_device code for details...

Quoted 3 lines

Regards,

Tony

Thanks,
Jean

#4 lore raw

PATCH 1/2 ARM: OMAP: hwmod: align the SmartReflex fck names

In reply to Tony Lindgren
Quoted 15 lines · Tony Lindgren

Review static struct omap_clk am33xx_clks[] = { · line 1043

Quoted 11 lines · jean.pihet at newoldbits.com
(quoted diff) +2 -2
@@ -1036,8 +1036,8 @@ static struct omap_clk am33xx_clks[] = {
 	CLK("davinci-mcasp.1",  NULL,           &mcasp1_fck,    CK_AM33XX),
 	CLK("NULL",	"mmc2_fck",		&mmc2_fck,	CK_AM33XX),
 	CLK(NULL,	"mmu_fck",		&mmu_fck,	CK_AM33XX),
-	CLK(NULL,	"smartreflex0_fck",	&smartreflex0_fck,	CK_AM33XX),
-	CLK(NULL,	"smartreflex1_fck",	&smartreflex1_fck,	CK_AM33XX),
+	CLK(NULL,	"smartreflex.0",	&smartreflex_mpu_fck,	CK_AM33XX),
+	CLK(NULL,	"smartreflex.1",	&smartreflex_core_fck,	CK_AM33XX),
 	CLK(NULL,	"timer1_fck",		&timer1_fck,	CK_AM33XX),
 	CLK(NULL,	"timer2_fck",		&timer2_fck,	CK_AM33XX),
 	CLK(NULL,	"timer3_fck",		&timer3_fck,	CK_AM33XX),

I think this should be something like this instead:

Quoted 5 lines
	CLK("smartreflex.0",	"fck",	&smartreflex_mpu_fck,	CK_AM33XX),
	CLK("smartreflex.1",	"fck",	&smartreflex_core_fck,	CK_AM33XX),

Where the first one is the dev name, the second one is the alias you want to use in the client driver?

Actually, the omap_device creation will create this kind of alias for you, with the device name populated etc, so adding device names here isn't necessary.

For omap_devices where drivers are always using clk_get(dev, ...), the name in the initial clkdev table here really doesn't matter.

However, for core code that needs to do a clk_get(NULL, "name"), then this name matters. In chatting with Paul offline, he mentioned part of the CCF conversion will be using clk_get(NULL, ...) on the main_clk listed in each hwmod. For that reason, it's important that this string match the name in the hwmod.

I belive the patch below should make this compatible with any future use.

Jean, can you fold this into $SUBJECT patch?

Thanks,

Kevin

arch/arm/mach-omap2/clock33xx_data.c +2 -2
index 6de3dc7..8a16504 100644
@@ -1034,8 +1034,8 @@ static struct omap_clk am33xx_clks[] = {
 	CLK("davinci-mcasp.1",  NULL,           &mcasp1_fck,    CK_AM33XX),
 	CLK("NULL",	"mmc2_fck",		&mmc2_fck,	CK_AM33XX),
 	CLK(NULL,	"mmu_fck",		&mmu_fck,	CK_AM33XX),
-	CLK(NULL,	"smartreflex.0",	&smartreflex_mpu_fck,	CK_AM33XX),
-	CLK(NULL,	"smartreflex.1",	&smartreflex_core_fck,	CK_AM33XX),
+	CLK(NULL,	"smartreflex_mpu_fck",	&smartreflex_mpu_fck,	CK_AM33XX),
+	CLK(NULL,	"smartreflex_core_fck",	&smartreflex_core_fck,	CK_AM33XX),
 	CLK(NULL,	"timer1_fck",		&timer1_fck,	CK_AM33XX),
 	CLK(NULL,	"timer2_fck",		&timer2_fck,	CK_AM33XX),
 	CLK(NULL,	"timer3_fck",		&timer3_fck,	CK_AM33XX),
arch/arm/mach-omap2/clock3xxx_data.c +2 -2
index a197cf2..191d261 100644
@@ -3447,8 +3447,8 @@ static struct omap_clk omap3xxx_clks[] = {
 	CLK(NULL,	"atclk_fck",	&atclk_fck,	CK_3XXX),
 	CLK(NULL,	"traceclk_src_fck", &traceclk_src_fck, CK_3XXX),
 	CLK(NULL,	"traceclk_fck",	&traceclk_fck,	CK_3XXX),
-	CLK(NULL,	"smartreflex.0",	&smartreflex_mpu_iva_fck,	CK_34XX | CK_36XX),
-	CLK(NULL,	"smartreflex.1",	&smartreflex_core_fck,	CK_34XX | CK_36XX),
+	CLK(NULL,	"smartreflex_mpu_iva_fck", &smartreflex_mpu_iva_fck,	CK_34XX | CK_36XX),
+	CLK(NULL,	"smartreflex_core_fck",	&smartreflex_core_fck,	CK_34XX | CK_36XX),
 	CLK(NULL,	"sr_l4_ick",	&sr_l4_ick,	CK_34XX | CK_36XX),
 	CLK(NULL,	"secure_32k_fck", &secure_32k_fck, CK_3XXX),
 	CLK(NULL,	"gpt12_fck",	&gpt12_fck,	CK_3XXX),
arch/arm/mach-omap2/clock44xx_data.c +2 -2
index 9cc1112..19e0c1e 100644
@@ -3224,8 +3224,8 @@ static struct omap_clk omap44xx_clks[] = {
 	CLK(NULL,	"slimbus2_fclk_0",		&slimbus2_fclk_0,	CK_443X),
 	CLK(NULL,	"slimbus2_slimbus_clk",		&slimbus2_slimbus_clk,	CK_443X),
 	CLK(NULL,	"slimbus2_fck",			&slimbus2_fck,	CK_443X),
-	CLK(NULL,	"smartreflex.0",		&smartreflex_core_fck,	CK_443X),
-	CLK(NULL,	"smartreflex.1",		&smartreflex_iva_fck,	CK_443X),
+	CLK(NULL,	"smartreflex_core_fck",		&smartreflex_core_fck,	CK_443X),
+	CLK(NULL,	"smartreflex_mpu_fck",		&smartreflex_iva_fck,	CK_443X),
 	CLK(NULL,	"smartreflex.2",		&smartreflex_mpu_fck,	CK_443X),
 	CLK(NULL,	"timer1_fck",			&timer1_fck,	CK_443X),
 	CLK(NULL,	"timer10_fck",			&timer10_fck,	CK_443X),
author
#5 lore raw

PATCH 1/2 ARM: OMAP: hwmod: align the SmartReflex fck names

Hi Kevin,

Quoted 27 lines · Kevin Hilman
Quoted 15 lines · Tony Lindgren

arch/arm/mach-omap2/clock33xx_data.c static struct omap_clk am33xx_clks[] = { · line 1043

Quoted 11 lines · jean.pihet at newoldbits.com
arch/arm/mach-omap2/clock33xx_data.c +2 -2
@@ -1036,8 +1036,8 @@ static struct omap_clk am33xx_clks[] = {
     CLK("davinci-mcasp.1",  NULL,           &mcasp1_fck,    CK_AM33XX),
     CLK("NULL",     "mmc2_fck",             &mmc2_fck,      CK_AM33XX),
     CLK(NULL,       "mmu_fck",              &mmu_fck,       CK_AM33XX),
-    CLK(NULL,       "smartreflex0_fck",     &smartreflex0_fck,      CK_AM33XX),
-    CLK(NULL,       "smartreflex1_fck",     &smartreflex1_fck,      CK_AM33XX),
+    CLK(NULL,       "smartreflex.0",        &smartreflex_mpu_fck,   CK_AM33XX),
+    CLK(NULL,       "smartreflex.1",        &smartreflex_core_fck,  CK_AM33XX),
     CLK(NULL,       "timer1_fck",           &timer1_fck,    CK_AM33XX),
     CLK(NULL,       "timer2_fck",           &timer2_fck,    CK_AM33XX),
     CLK(NULL,       "timer3_fck",           &timer3_fck,    CK_AM33XX),

I think this should be something like this instead:

Quoted 5 lines
      CLK("smartreflex.0",    "fck",  &smartreflex_mpu_fck,   CK_AM33XX),
      CLK("smartreflex.1",    "fck",  &smartreflex_core_fck,  CK_AM33XX),

Where the first one is the dev name, the second one is the alias you want to use in the client driver?

Actually, the omap_device creation will create this kind of alias for you, with the device name populated etc, so adding device names here isn't necessary.

Quoted 8 lines

For omap_devices where drivers are always using clk_get(dev, ...), the name in the initial clkdev table here really doesn't matter.

However, for core code that needs to do a clk_get(NULL, "name"), then this name matters. In chatting with Paul offline, he mentioned part of the CCF conversion will be using clk_get(NULL, ...) on the main_clk listed in each hwmod. For that reason, it's important that this string match the name in the hwmod.

That makes it clear. Thanks for looking at it!

Quoted 2 lines

I belive the patch below should make this compatible with any future use.

Sure. The driver uses clk_get(dev, "fck") to request the fcuntional clock of the device.

Quoted 1 line

Jean, can you fold this into $SUBJECT patch?

Sure!

I just re-sent a new version of the 2 patches.

Quoted 4 lines

Thanks,

Kevin

Thanks,
Jean

Quoted 47 lines
arch/arm/mach-omap2/clock33xx_data.c +2 -2
index 6de3dc7..8a16504 100644
@@ -1034,8 +1034,8 @@ static struct omap_clk am33xx_clks[] = {
        CLK("davinci-mcasp.1",  NULL,           &mcasp1_fck,    CK_AM33XX),
        CLK("NULL",     "mmc2_fck",             &mmc2_fck,      CK_AM33XX),
        CLK(NULL,       "mmu_fck",              &mmu_fck,       CK_AM33XX),
-       CLK(NULL,       "smartreflex.0",        &smartreflex_mpu_fck,   CK_AM33XX),
-       CLK(NULL,       "smartreflex.1",        &smartreflex_core_fck,  CK_AM33XX),
+       CLK(NULL,       "smartreflex_mpu_fck",  &smartreflex_mpu_fck,   CK_AM33XX),
+       CLK(NULL,       "smartreflex_core_fck", &smartreflex_core_fck,  CK_AM33XX),
        CLK(NULL,       "timer1_fck",           &timer1_fck,    CK_AM33XX),
        CLK(NULL,       "timer2_fck",           &timer2_fck,    CK_AM33XX),
        CLK(NULL,       "timer3_fck",           &timer3_fck,    CK_AM33XX),
arch/arm/mach-omap2/clock3xxx_data.c +2 -2
index a197cf2..191d261 100644
@@ -3447,8 +3447,8 @@ static struct omap_clk omap3xxx_clks[] = {
        CLK(NULL,       "atclk_fck",    &atclk_fck,     CK_3XXX),
        CLK(NULL,       "traceclk_src_fck", &traceclk_src_fck, CK_3XXX),
        CLK(NULL,       "traceclk_fck", &traceclk_fck,  CK_3XXX),
-       CLK(NULL,       "smartreflex.0",        &smartreflex_mpu_iva_fck,       CK_34XX | CK_36XX),
-       CLK(NULL,       "smartreflex.1",        &smartreflex_core_fck,  CK_34XX | CK_36XX),
+       CLK(NULL,       "smartreflex_mpu_iva_fck", &smartreflex_mpu_iva_fck,    CK_34XX | CK_36XX),
+       CLK(NULL,       "smartreflex_core_fck", &smartreflex_core_fck,  CK_34XX | CK_36XX),
        CLK(NULL,       "sr_l4_ick",    &sr_l4_ick,     CK_34XX | CK_36XX),
        CLK(NULL,       "secure_32k_fck", &secure_32k_fck, CK_3XXX),
        CLK(NULL,       "gpt12_fck",    &gpt12_fck,     CK_3XXX),
arch/arm/mach-omap2/clock44xx_data.c +2 -2
index 9cc1112..19e0c1e 100644
@@ -3224,8 +3224,8 @@ static struct omap_clk omap44xx_clks[] = {
        CLK(NULL,       "slimbus2_fclk_0",              &slimbus2_fclk_0,       CK_443X),
        CLK(NULL,       "slimbus2_slimbus_clk",         &slimbus2_slimbus_clk,  CK_443X),
        CLK(NULL,       "slimbus2_fck",                 &slimbus2_fck,  CK_443X),
-       CLK(NULL,       "smartreflex.0",                &smartreflex_core_fck,  CK_443X),
-       CLK(NULL,       "smartreflex.1",                &smartreflex_iva_fck,   CK_443X),
+       CLK(NULL,       "smartreflex_core_fck",         &smartreflex_core_fck,  CK_443X),
+       CLK(NULL,       "smartreflex_mpu_fck",          &smartreflex_iva_fck,   CK_443X),
        CLK(NULL,       "smartreflex.2",                &smartreflex_mpu_fck,   CK_443X),
        CLK(NULL,       "timer1_fck",                   &timer1_fck,    CK_443X),
        CLK(NULL,       "timer10_fck",                  &timer10_fck,   CK_443X),
#6 lore raw

PATCH 2/2 ARM: OMAP: SmartReflex: pass device dependent data via platform data

In reply to jean.pihet at newoldbits.com

From: Jean Pihet <[email protected]>

Remove the device dependent code (ex. cpu_is_xxx()) and settings from the driver code and instead pass them via the platform data. This allows a clean separation of the driver code and the platform code, as required by the move of the platform header files to include/linux/platform_data.

Note about the smartreflex functional clocks: the smartreflex fclks are derived from sys_clk and are named "smartreflex.%d". Since the smartreflex device names and the functional clock names are identical the device driver code uses them to control the functional clocks.

---
 arch/arm/mach-omap2/sr_device.c   |   13 +++++++++
 drivers/power/avs/smartreflex.c   |   54 ++++++++++++-------------------------
 include/linux/power/smartreflex.h |   14 ++++++++--
 3 files changed, 42 insertions(+), 39 deletions(-)
arch/arm/mach-omap2/sr_device.c +13 -0
index cbeae56..06de443 100644
@@ -121,6 +121,19 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
 	sr_data->senn_mod = 0x1;
 	sr_data->senp_mod = 0x1;
 
+	if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
+		sr_data->err_weight = OMAP3430_SR_ERRWEIGHT;
+		sr_data->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
+		sr_data->accum_data = OMAP3430_SR_ACCUMDATA;
+		if (!(strcmp(sr_data->name, "smartreflex_mpu"))) {
+			sr_data->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
+			sr_data->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
+		} else {
+			sr_data->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
+			sr_data->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
+		}
+	}
+
 	sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name);
 	if (IS_ERR(sr_data->voltdm)) {
 		pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
drivers/power/avs/smartreflex.c +17 -37

90 lines not on this page · raw message

include/linux/power/smartreflex.h +12 -2
index 4a496eb..c0f44c2 100644
@@ -260,8 +260,13 @@ struct omap_sr_nvalue_table {
  *
  * @name:		instance name
  * @ip_type:		Smartreflex IP type.
- * @senp_mod:		SENPENABLE value for the sr
- * @senn_mod:		SENNENABLE value for sr
+ * @senp_mod:		SENPENABLE value of the sr CONFIG register
+ * @senn_mod:		SENNENABLE value for sr CONFIG register
+ * @err_weight		ERRWEIGHT value of the sr ERRCONFIG register
+ * @err_maxlimit	ERRMAXLIMIT value of the sr ERRCONFIG register
+ * @accum_data		ACCUMDATA value of the sr CONFIG register
+ * @senn_avgweight	SENNAVGWEIGHT value of the sr AVGWEIGHT register
+ * @senp_avgweight	SENPAVGWEIGHT value of the sr AVGWEIGHT register
  * @nvalue_count:	Number of distinct nvalues in the nvalue table
  * @enable_on_init:	whether this sr module needs to enabled at
  *			boot up or not.
@@ -274,6 +279,11 @@ struct omap_sr_data {
 	int				ip_type;
 	u32				senp_mod;
 	u32				senn_mod;
+	u32				err_weight;
+	u32				err_maxlimit;
+	u32				accum_data;
+	u32				senn_avgweight;
+	u32				senp_avgweight;
 	int				nvalue_count;
 	bool				enable_on_init;
 	struct omap_sr_nvalue_table	*nvalue_table;
Signature · 1 line
1.7.10.4