ARM: dts: mvebu: pl310-cache disable double-linefill
Subsystems (2)
PATCH 1/1 ARM: dts: mvebu: pl310-cache disable double-linefill
From: Yan Markman <[email protected]>
Under heavy system stress mvebu SoC using Cortex A9 sporadically encountered instability issues.
The "double linefill" feature of L2 cache was identified as causing dependency between read and write which lead to the deadlock.
Especially, it was the cause of deadlock seen under heavy PCIe traffic, as this dependency violates PCIE overtaking rule.
[gregory.clement at free-electrons.com: reformulate commit log, add Armada 375 and add Fixes tag]
--- arch/arm/boot/dts/armada-375.dtsi | 4 ++-- arch/arm/boot/dts/armada-38x.dtsi | 4 ++-- arch/arm/boot/dts/armada-39x.dtsi | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-)
arch/arm/boot/dts/armada-375.dtsi +2 -2
@@ -178,9 +178,9 @@ reg = <0x8000 0x1000>; cache-unified; cache-level = <2>; - arm,double-linefill-incr = <1>; + arm,double-linefill-incr = <0>; arm,double-linefill-wrap = <0>; - arm,double-linefill = <1>; + arm,double-linefill = <0>; prefetch-data = <1>; };
arch/arm/boot/dts/armada-38x.dtsi +2 -2
@@ -143,9 +143,9 @@ reg = <0x8000 0x1000>; cache-unified; cache-level = <2>; - arm,double-linefill-incr = <1>; + arm,double-linefill-incr = <0>; arm,double-linefill-wrap = <0>; - arm,double-linefill = <1>; + arm,double-linefill = <0>; prefetch-data = <1>; };
arch/arm/boot/dts/armada-39x.dtsi +2 -2
@@ -111,9 +111,9 @@ reg = <0x8000 0x1000>; cache-unified; cache-level = <2>; - arm,double-linefill-incr = <1>; + arm,double-linefill-incr = <0>; arm,double-linefill-wrap = <0>; - arm,double-linefill = <1>; + arm,double-linefill = <0>; prefetch-data = <1>; };
Signature · 1 line
2.14.2
PATCH 1/1 ARM: dts: mvebu: pl310-cache disable double-linefill
Hi,
Quoted 11 lines · Gregory CLEMENT
From: Yan Markman <[email protected]>
Under heavy system stress mvebu SoC using Cortex A9 sporadically encountered instability issues.
The "double linefill" feature of L2 cache was identified as causing dependency between read and write which lead to the deadlock.
Especially, it was the cause of deadlock seen under heavy PCIe traffic, as this dependency violates PCIE overtaking rule.
Quoted 8 lines
Fixes c8f5a878e554 ("ARM: mvebu: use DT properties to fine-tune the L2 configuration")Cc stable at vger.kernel.orgSigned-off-by Yan Markman <[email protected]>Signed-off-by Igal Liberman <[email protected]>Signed-off-by Nadav Haklai <[email protected]>[gregory.clement at free-electrons.com: reformulate commit log, add Armada 375 and add Fixes tag]
Signed-off-by Gregory CLEMENT <[email protected]>
Applied on mvebu/fixes
Gregory
Quoted 57 lines
--- arch/arm/boot/dts/armada-375.dtsi | 4 ++-- arch/arm/boot/dts/armada-38x.dtsi | 4 ++-- arch/arm/boot/dts/armada-39x.dtsi | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-)arch/arm/boot/dts/armada-375.dtsi +2
-2@@ -178,9 +178,9 @@ reg = <0x8000 0x1000>; cache-unified; cache-level = <2>; - arm,double-linefill-incr = <1>; + arm,double-linefill-incr = <0>; arm,double-linefill-wrap = <0>; - arm,double-linefill = <1>; + arm,double-linefill = <0>; prefetch-data = <1>; };arch/arm/boot/dts/armada-38x.dtsi +2
-2@@ -143,9 +143,9 @@ reg = <0x8000 0x1000>; cache-unified; cache-level = <2>; - arm,double-linefill-incr = <1>; + arm,double-linefill-incr = <0>; arm,double-linefill-wrap = <0>; - arm,double-linefill = <1>; + arm,double-linefill = <0>; prefetch-data = <1>; };arch/arm/boot/dts/armada-39x.dtsi +2
-2@@ -111,9 +111,9 @@ reg = <0x8000 0x1000>; cache-unified; cache-level = <2>; - arm,double-linefill-incr = <1>; + arm,double-linefill-incr = <0>; arm,double-linefill-wrap = <0>; - arm,double-linefill = <1>; + arm,double-linefill = <0>; prefetch-data = <1>; };Signature · 1 line
2.14.2
Signature · 4 lines
Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com