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ARM: dts: mvebu: pl310-cache disable double-linefill

PATCH New Gregory CLEMENT 1 participant 2 messages Oct 25, 2017 – Oct 26, 2017

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PATCH 1/1 ARM: dts: mvebu: pl310-cache disable double-linefill

From: Yan Markman <[email protected]>

Under heavy system stress mvebu SoC using Cortex A9 sporadically encountered instability issues.

The "double linefill" feature of L2 cache was identified as causing dependency between read and write which lead to the deadlock.

Especially, it was the cause of deadlock seen under heavy PCIe traffic, as this dependency violates PCIE overtaking rule.

Fixes c8f5a878e554 ("ARM: mvebu: use DT properties to fine-tune the L2 configuration")
Cc stable at vger.kernel.org

[gregory.clement at free-electrons.com: reformulate commit log, add Armada 375 and add Fixes tag]

---
 arch/arm/boot/dts/armada-375.dtsi | 4 ++--
 arch/arm/boot/dts/armada-38x.dtsi | 4 ++--
 arch/arm/boot/dts/armada-39x.dtsi | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)
arch/arm/boot/dts/armada-375.dtsi +2 -2
index 7225c7ce9a8d..2cb1bcd30976 100644
@@ -178,9 +178,9 @@
 				reg = <0x8000 0x1000>;
 				cache-unified;
 				cache-level = <2>;
-				arm,double-linefill-incr = <1>;
+				arm,double-linefill-incr = <0>;
 				arm,double-linefill-wrap = <0>;
-				arm,double-linefill = <1>;
+				arm,double-linefill = <0>;
 				prefetch-data = <1>;
 			};
 
arch/arm/boot/dts/armada-38x.dtsi +2 -2
index 7ff0811e61db..05e241fb91ad 100644
@@ -143,9 +143,9 @@
 				reg = <0x8000 0x1000>;
 				cache-unified;
 				cache-level = <2>;
-				arm,double-linefill-incr = <1>;
+				arm,double-linefill-incr = <0>;
 				arm,double-linefill-wrap = <0>;
-				arm,double-linefill = <1>;
+				arm,double-linefill = <0>;
 				prefetch-data = <1>;
 			};
 
arch/arm/boot/dts/armada-39x.dtsi +2 -2
index ea657071e278..5218bd2a248d 100644
@@ -111,9 +111,9 @@
 				reg = <0x8000 0x1000>;
 				cache-unified;
 				cache-level = <2>;
-				arm,double-linefill-incr = <1>;
+				arm,double-linefill-incr = <0>;
 				arm,double-linefill-wrap = <0>;
-				arm,double-linefill = <1>;
+				arm,double-linefill = <0>;
 				prefetch-data = <1>;
 			};
 
Signature · 1 line
2.14.2
#1 lore raw

PATCH 1/1 ARM: dts: mvebu: pl310-cache disable double-linefill

Hi,

Quoted 11 lines · Gregory CLEMENT

From: Yan Markman <[email protected]>

Under heavy system stress mvebu SoC using Cortex A9 sporadically encountered instability issues.

The "double linefill" feature of L2 cache was identified as causing dependency between read and write which lead to the deadlock.

Especially, it was the cause of deadlock seen under heavy PCIe traffic, as this dependency violates PCIE overtaking rule.

Quoted 8 lines
Fixes c8f5a878e554 ("ARM: mvebu: use DT properties to fine-tune the L2 configuration")
Cc stable at vger.kernel.org

[gregory.clement at free-electrons.com: reformulate commit log, add Armada 375 and add Fixes tag]

Applied on mvebu/fixes

Gregory

Quoted 57 lines
---
 arch/arm/boot/dts/armada-375.dtsi | 4 ++--
 arch/arm/boot/dts/armada-38x.dtsi | 4 ++--
 arch/arm/boot/dts/armada-39x.dtsi | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)
arch/arm/boot/dts/armada-375.dtsi +2 -2
index 7225c7ce9a8d..2cb1bcd30976 100644
@@ -178,9 +178,9 @@
 				reg = <0x8000 0x1000>;
 				cache-unified;
 				cache-level = <2>;
-				arm,double-linefill-incr = <1>;
+				arm,double-linefill-incr = <0>;
 				arm,double-linefill-wrap = <0>;
-				arm,double-linefill = <1>;
+				arm,double-linefill = <0>;
 				prefetch-data = <1>;
 			};
 
arch/arm/boot/dts/armada-38x.dtsi +2 -2
index 7ff0811e61db..05e241fb91ad 100644
@@ -143,9 +143,9 @@
 				reg = <0x8000 0x1000>;
 				cache-unified;
 				cache-level = <2>;
-				arm,double-linefill-incr = <1>;
+				arm,double-linefill-incr = <0>;
 				arm,double-linefill-wrap = <0>;
-				arm,double-linefill = <1>;
+				arm,double-linefill = <0>;
 				prefetch-data = <1>;
 			};
 
arch/arm/boot/dts/armada-39x.dtsi +2 -2
index ea657071e278..5218bd2a248d 100644
@@ -111,9 +111,9 @@
 				reg = <0x8000 0x1000>;
 				cache-unified;
 				cache-level = <2>;
-				arm,double-linefill-incr = <1>;
+				arm,double-linefill-incr = <0>;
 				arm,double-linefill-wrap = <0>;
-				arm,double-linefill = <1>;
+				arm,double-linefill = <0>;
 				prefetch-data = <1>;
 			};
 
Signature · 1 line
2.14.2
Signature · 4 lines
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com