Skip to contentSkip to conversation

powerpc: Fix handling of alignment interrupt on dcbz instruction

PATCH In review Paul Mackerras 4 participants 4 messages Sep 13, 2017 PowerPC

lore
Share & tools
lore

Paul Mackerras

author
#0 lore raw

PATCH 1/1 powerpc: Fix handling of alignment interrupt on dcbz instruction

This fixes the emulation of the dcbz instruction in the alignment interrupt handler. The error was that we were comparing just the instruction type field of op.type rather than the whole thing, and therefore the comparison "type != CACHEOP + DCBZ" was always true.

Fixes 31bfdb036f12 ("powerpc: Use instruction emulation infrastructure to handle alignment faults")
Signed-off-by Paul Mackerras <[email protected]>
---
 arch/powerpc/kernel/align.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/powerpc/kernel/align.c +1 -1
index 26b9994d27ee..43ef25156480 100644
@@ -341,7 +341,7 @@ int fix_alignment(struct pt_regs *regs)
 
 	type = op.type & INSTR_TYPE_MASK;
 	if (!OP_IS_LOAD_STORE(type)) {
-		if (type != CACHEOP + DCBZ)
+		if (op.type != CACHEOP + DCBZ)
 			return -EINVAL;
 		PPC_WARN_ALIGNMENT(dcbz, regs);
 		r = emulate_dcbz(op.ea, regs);
Signature · 1 line
2.11.0
#1 lore raw

Michal, Christian, can you please confirm this fixes the problems you were seeing.

cheers

Quoted 28 lines · Paul Mackerras

This fixes the emulation of the dcbz instruction in the alignment interrupt handler. The error was that we were comparing just the instruction type field of op.type rather than the whole thing, and therefore the comparison "type != CACHEOP + DCBZ" was always true.

Fixes 31bfdb036f12 ("powerpc: Use instruction emulation infrastructure

to handle alignment faults")

Signed-off-by Paul Mackerras <[email protected]>

---
arch/powerpc/kernel/align.c | 2 +-

1 file changed, 1 insertion(+), 1 deletion(-)
arch/powerpc/kernel/align.c +1 -1
index 26b9994d27ee..43ef25156480 100644
@@ -341,7 +341,7 @@ int fix_alignment(struct pt_regs *regs)
 
 	type = op.type & INSTR_TYPE_MASK;
 	if (!OP_IS_LOAD_STORE(type)) {
-		if (type != CACHEOP + DCBZ)
+		if (op.type != CACHEOP + DCBZ)
 			return -EINVAL;
 		PPC_WARN_ALIGNMENT(dcbz, regs);
 		r = emulate_dcbz(op.ea, regs);
Signature · 1 line
2.11.0
Signature · 1 line
Sent from my Android phone with K-9 Mail. Please excuse my brevity.
#2 lore raw
Quoted 2 lines · Michael Ellerman

Michal, Christian, can you please confirm this fixes the problems you were seeing.

Yes, it fixes my problem. Thanks.

-Michal

#3 lore raw

PATCH 1/1 powerpc: Fix handling of alignment interrupt on dcbz instruction

Quoted 7 lines · Michal Sojka
Quoted 2 lines · Michael Ellerman

Michal, Christian, can you please confirm this fixes the problems you were seeing.

Yes, it fixes my problem. Thanks.

-Michal

It also fixes my problem. Many thanks!

-- Christian