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mmc: sdhci-pci: identify correct base addresses for slots

PATCH In review Jackey Shen 2 participants 4 messages Jul 1, 2013 – Oct 28, 2013

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#0 lore raw

PATCH 1/1 mmc: sdhci-pci: identify correct base addresses for slots

A PCI Based SD Host Controller can support up to a total of six SD Slots, and the base addresses are specified by Slot Information Register of its PCI header. Please refer to C.3.3 of SD Host Controller Standard Specification Version 3.0.

---
 drivers/mmc/host/sdhci-pci.c |    7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)
drivers/mmc/host/sdhci-pci.c +4 -3
index d7d6bc8..3a84e95 100644
@@ -50,7 +50,8 @@
 #define  PCI_SLOT_INFO_SLOTS(x)		((x >> 4) & 7)
 #define  PCI_SLOT_INFO_FIRST_BAR_MASK	0x07
 
-#define MAX_SLOTS			8
+#define MAX_SLOTS			6
+#define MAX_BARS			6
 
 struct sdhci_pci_chip;
 struct sdhci_pci_slot;
@@ -1282,7 +1283,7 @@ static struct sdhci_pci_slot *sdhci_pci_probe_slot(
 {
 	struct sdhci_pci_slot *slot;
 	struct sdhci_host *host;
-	int ret, bar = first_bar + slotno;
+	int ret, bar = (first_bar + slotno) % MAX_BARS;
 
 	if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
 		dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
@@ -1481,7 +1482,7 @@ static int sdhci_pci_probe(struct pci_dev *pdev,
 
 	first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
 
-	if (first_bar > 5) {
+	if (first_bar > MAX_BARS - 1) {
 		dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
 		return -ENODEV;
 	}
Signature · 1 line
1.7.10.4
#1 lore raw

Hi Chris,

Do you have any comments on this patch?

Thanks,
Jackey

-----Original Message-----
From: Jackey Shen [mailto:[email protected]]
Sent: Monday, July 01, 2013 5:22 PM
To: [email protected]
Cc: Shen, Jackey
Subject: [PATCH] mmc: sdhci-pci: identify correct base addresses for slots

A PCI Based SD Host Controller can support up to a total of six SD Slots, and the base addresses are specified by Slot Information Register of its PCI header. Please refer to C.3.3 of SD Host Controller Standard Specification Version 3.0.

---
 drivers/mmc/host/sdhci-pci.c |    7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)
drivers/mmc/host/sdhci-pci.c +4 -3
index d7d6bc8..3a84e95 100644
@@ -50,7 +50,8 @@
 #define  PCI_SLOT_INFO_SLOTS(x)		((x >> 4) & 7)
 #define  PCI_SLOT_INFO_FIRST_BAR_MASK	0x07
 
-#define MAX_SLOTS			8
+#define MAX_SLOTS			6
+#define MAX_BARS			6
 
 struct sdhci_pci_chip;
 struct sdhci_pci_slot;
@@ -1282,7 +1283,7 @@ static struct sdhci_pci_slot *sdhci_pci_probe_slot(
 {
 	struct sdhci_pci_slot *slot;
 	struct sdhci_host *host;
-	int ret, bar = first_bar + slotno;
+	int ret, bar = (first_bar + slotno) % MAX_BARS;
 
 	if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
 		dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
@@ -1481,7 +1482,7 @@ static int sdhci_pci_probe(struct pci_dev *pdev,
 
 	first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
 
-	if (first_bar > 5) {
+	if (first_bar > MAX_BARS - 1) {
 		dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
 		return -ENODEV;
 	}
Signature · 1 line
1.7.10.4
#2 lore raw
In reply to Jackey Shen

Hi Jackey,

Quoted 3 lines · Jackey Shen

A PCI Based SD Host Controller can support up to a total of six SD Slots, and the base addresses are specified by Slot Information Register of its PCI header. Please refer to C.3.3 of SD Host Controller Standard Specification Version 3.0.

Out of curiosity (and for the patch record), do you have hardware that requires this patch that you've tested it on, or is it just theoretical?

Thanks,

- Chris.

Signature · 1 line
Chris Ball   <[email protected]>   <http://printf.net/>
#3 lore raw

Hi Chris,

Quoted 11 lines

-----Original Message-----
From: Chris Ball [mailto:[email protected]]
Sent: Sunday, October 27, 2013 9:24 AM
To: Shen, Jackey
Cc: [email protected]
Subject: Re: [PATCH] mmc: sdhci-pci: identify correct base addresses for slots

Hi Jackey,

Quoted 1 line · Jackey Shen

A PCI Based SD Host Controller can support up to a total of six SD Slots,

Quoted 8 lines

and

Quoted 1 line

the base addresses are specified by Slot Information Register of its PCI

header.

Quoted 1 line

Please refer to C.3.3 of SD Host Controller Standard Specification Version

3.0.

Out of curiosity (and for the patch record), do you have hardware that requires this patch that you've tested it on, or is it just theoretical?

I just theoretically wrote this patch according to SD spec.

Thanks,
Jackey

Quoted 6 lines

Thanks,

- Chris.
--
Chris Ball <[email protected]> <http://printf.net/>