Add driver support for Data Capture and Compare Engine(DCC) for SM8150

PATCH Superseded Souradeep Chowdhury 3 participants 9 messages Apr 14, 2021 – Apr 20, 2021

Subsystems (3)

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Souradeep Chowdhury

author

2021-04-14 08:37 UTC #0 lore raw

v3 cover Add driver support for Data Capture and Compare Engine(DCC) for SM8150

DCC(Data Capture and Compare) is a DMA engine designed for debugging purposes.In case of a system crash or manual software triggers by the user the DCC hardware stores the value at the register addresses which can be used for debugging purposes.The DCC driver provides the user with sysfs interface to configure the register addresses.The options that the DCC hardware provides include reading from registers,writing to registers,first reading and then writing to registers and looping through the values of the same register.

In certain cases a register write needs to be executed for accessing the rest of the registers, also the user might want to record the changing values of a register with time for which he has the option to use the loop feature.

The options mentioned above are exposed to the user by sysfs files once the driver is probed.The details and usage of this sysfs files are documented in Documentation/ABI/testing/sysfs-driver-dcc.

As an example let us consider a couple of debug scenarios where DCC has been proved to be effective for debugging purposes:-

i)TimeStamp Related Issue

On SC7180, there was a coresight timestamp issue where it would occasionally be all 0 instead of proper timestamp values.

Proper timestamp:
Idx:3373; ID:10; I_TIMESTAMP : Timestamp.; Updated val = 0x13004d8f5b7aa; CC=0x9e

Zero timestamp:
Idx:3387; ID:10; I_TIMESTAMP : Timestamp.; Updated val = 0x0; CC=0xa2

Now this is a non-fatal issue and doesn't need a system reset, but still needs to be rootcaused and fixed for those who do care about coresight etm traces. Since this is a timestamp issue, we would be looking for any timestamp related clocks and such.

o we get all the clk register details from IP documentation and configure it via DCC config syfs node. Before that we set the current linked list.

/* Set the current linked list */
echo 3 > /sys/bus/platform/devices/10a2000.dcc/curr_list

/* Program the linked list with the addresses */ echo 0x10c004 > /sys/bus/platform/devices/10a2000.dcc/config echo 0x10c008 > /sys/bus/platform/devices/10a2000.dcc/config echo 0x10c00c > /sys/bus/platform/devices/10a2000.dcc/config echo 0x10c010 > /sys/bus/platform/devices/10a2000.dcc/config ..... and so on for other timestamp related clk registers

/* Other way of specifying is in "addr len" pair, in below case it specifies to capture 4 words starting 0x10C004 */

echo 0x10C004 4 > /sys/bus/platform/devices/10a2000.dcc/config

/* Enable DCC */
echo 1 > /sys/bus/platform/devices/10a2000.dcc/enable

/* Run the timestamp test for working case */

/* Send SW trigger */
echo 1 > /sys/bus/platform/devices/10a2000.dcc/trigger

/* Read SRAM */
cat /dev/dcc_sram > dcc_sram1.bin

/* Run the timestamp test for non-working case */

/* Send SW trigger */
echo 1 > /sys/bus/platform/devices/10a2000.dcc/trigger

/* Read SRAM */
cat /dev/dcc_sram > dcc_sram2.bin

Get the parser from [1] and checkout the latest branch.

/* Parse the SRAM bin */
python dcc_parser.py -s dcc_sram1.bin --v2 -o output/ python dcc_parser.py -s dcc_sram2.bin --v2 -o output/

Sample parsed output of dcc_sram1.bin:

        <timestamp>03/14/21</timestamp>
            <generator>Linux DCC Parser</generator>
                <chip name="None" version="None">
                <register address="0x0010c004" value="0x80000000" />
                <register address="0x0010c008" value="0x00000008" />
                <register address="0x0010c00c" value="0x80004220" />
                <register address="0x0010c010" value="0x80000000" />
            </chip>
    <next_ll_offset>next_ll_offset : 0x1c </next_ll_offset>

</hwioDump>

ii)NOC register errors

A particular class of registers called NOC which are functional registers was reporting errors while logging the values.To trace these errors the DCC has been used effectively. The steps followed were similar to the ones mentioned above.
In addition to NOC registers a few other dependent registers were configured in DCC to monitor it's values during a crash. A look at the dependent register values revealed that the crash was happening due to a secured access to one of these dependent registers. All these debugging activity and finding the root cause was achieved using DCC.

DCC parser is available at the following open source location

https://source.codeaurora.org/quic/la/platform/vendor/qcom-opensource/tools/tree/dcc_parser

Changes in v3:

*Implement all the comments on V2 of the patch.
*Merged the sysfs documentation along with the driver patch as suggested. *Collect the review tags from V2 of the patch.
*Sorted the entries in drivers/soc/qcom/Makefile based on config name as suggested.

Souradeep Chowdhury (4):
dt-bindings: Added the yaml bindings for DCC
soc: qcom: dcc:Add driver support for Data Capture and Compare
unit(DCC)
MAINTAINERS: Add the entry for DCC(Data Capture and Compare) driver
support
arm64: dts: qcom: sm8150: Add Data Capture and Compare(DCC) support
node

 Documentation/ABI/testing/sysfs-driver-dcc         |  114 ++
 .../devicetree/bindings/arm/msm/qcom,dcc.yaml      |   40 +
 MAINTAINERS                                        |    8 +
 arch/arm64/boot/dts/qcom/sm8150.dtsi               |    6 +
 drivers/soc/qcom/Kconfig                           |    8 +
 drivers/soc/qcom/Makefile                          |   19 +-
 drivers/soc/qcom/dcc.c                             | 1539 ++++++++++++++++++++
 7 files changed, 1725 insertions(+), 9 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-driver-dcc
 create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,dcc.yaml
 create mode 100644 drivers/soc/qcom/dcc.c

--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

Souradeep Chowdhury

author

2021-04-14 08:37 UTC #1 lore raw

PATCH v3 1/4 dt-bindings: Added the yaml bindings for DCC

Documentation for Data Capture and Compare(DCC) device tree bindings in yaml format.

Reviewed-by Rob Herring <[email protected]>

Signed-off-by Souradeep Chowdhury <[email protected]>

---
 .../devicetree/bindings/arm/msm/qcom,dcc.yaml      | 40 ++++++++++++++++++++++
 1 file changed, 40 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,dcc.yaml

Documentation/devicetree/bindings/arm/msm/qcom,dcc.yaml new file +40 -0

new file mode 100644
index 0000000..9714c97
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/msm/qcom,dcc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Data Capture and Compare
+
+maintainers:
+  - Souradeep Chowdhury <[email protected]>
+
+description: |
+    DCC (Data Capture and Compare) is a DMA engine which is used to save
+    configuration data or system memory contents during catastrophic failure
+    or SW trigger. DCC is used to capture and store data for debugging purpose
+properties:
+  compatible:
+    items:
+      - enum:
+          - qcom,sm8150-dcc
+      - const: qcom,dcc
+
+  reg:
+    items:
+      - description: DCC base register region
+      - description: DCC RAM base register region
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    dma@10a2000{
+                compatible = "qcom,sm8150-dcc","qcom,dcc";
+                reg = <0x010a2000  0x1000>,
+                      <0x010ad000  0x2000>;
+    };

Signature · 2 lines

QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

Souradeep Chowdhury

author

2021-04-14 08:38 UTC #2 lore raw

PATCH v3 2/4 soc: qcom: dcc:Add driver support for Data Capture and Compare unit(DCC)

In reply to Souradeep Chowdhury

The DCC is a DMA Engine designed to capture and store data during system crash or software triggers.The DCC operates based on user inputs via the sysfs interface.The user gives addresses as inputs and these addresses are stored in the form of linkedlists.In case of a system crash or a manual software trigger by the user through the sysfs interface, the dcc captures and stores the values at these addresses. This patch contains the driver which has all the methods pertaining to the sysfs interface, auxiliary functions to support all the four fundamental operations of dcc namely read, write, first read then write and loop.The probe method here instantiates all the resources necessary for dcc to operate mainly the dedicated dcc sram where it stores the values.The DCC driver can be used for debugging purposes without going for a reboot since it can perform manual triggers.

Also added the documentation for sysfs entries and explained the functionalities of each sysfs file that has been created for dcc.

The following is the justification of using sysfs interface over the other alternatives like ioctls

i) As can be seen from the sysfs attribute descriptions, most of it does basic hardware manipulations like dcc_enable, dcc_disable, config reset etc. As a result sysfs is preferred over ioctl as we just need to enter a 0 or 1.

ii) Existing similar debug hardwares are there for which drivers have been written using sysfs interface.One such example is the coresight-etm-trace driver.A closer analog can also be the watchdog subsystems though it is ioctls based.

Signed-off-by Souradeep Chowdhury <[email protected]>

---
 Documentation/ABI/testing/sysfs-driver-dcc |  114 +++
 drivers/soc/qcom/Kconfig                   |    8 +
 drivers/soc/qcom/Makefile                  |   19 +-
 drivers/soc/qcom/dcc.c                     | 1539 ++++++++++++++++++++++++++++
 4 files changed, 1671 insertions(+), 9 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-driver-dcc
 create mode 100644 drivers/soc/qcom/dcc.c

Documentation/ABI/testing/sysfs-driver-dcc new file +114 -0

new file mode 100644
index 0000000..05d24f0
@@ -0,0 +1,114 @@
+What:           /sys/bus/platform/devices/.../trigger
+Date:           March 2021
+Contact:        Souradeep Chowdhury <[email protected]>
+Description:
+		This is the sysfs interface for manual software
+		triggers.The user can simply enter a 1 against
+		the sysfs file and enable a manual trigger.
+		Example:
+		echo  1 > /sys/bus/platform/devices/.../trigger
+
+What:           /sys/bus/platform/devices/.../enable
+Date:           March 2021
+Contact:        Souradeep Chowdhury <[email protected]>
+Description:
+		This sysfs interface is used for enabling the
+		the dcc hardware.Without this being set to 1,
+		the dcc hardware ceases to function.
+		Example:
+		echo  0 > /sys/bus/platform/devices/.../enable
+		(disable interface)
+		echo  1 > /sys/bus/platform/devices/.../enable
+		(enable interface)
+
+What:           /sys/bus/platform/devices/.../config
+Date:           March 2021
+Contact:        Souradeep Chowdhury <[email protected]>
+Description:
+		This is the most commonly used sysfs interface
+		file and this basically stores the addresses of
+		the registers which needs to be read in case of
+		a hardware crash or manual software triggers.
+		Example:
+		echo  0x80000010 10 > /sys/bus/platform/devices/../config
+		This specifies that 10 words starting from address
+		0x80000010 is to be read.In case there are no words to be
+		specified we can simply enter the address.
+
+What:           /sys/bus/platform/devices/.../config_write
+Date:           March 2021
+Contact:        Souradeep Chowdhury <[email protected]>
+Description:
+		This file allows user to write a value to the register
+		address given as argument.The values are entered in the
+		form of <register_address> <value>.The reason for this
+		feature of dcc is that for accessing certain registers
+		it is necessary to set some bits of soe other register.
+		That is achievable by giving DCC this privelege.
+		Example:
+		echo 0x80000000 0xFF > /sys/bus/platform/devices/.../config_write
+
+What:           /sys/bus/platform/devices/.../config_reset
+Date:           March 2021
+Contact:        Souradeep Chowdhury <[email protected]>
+Description:
+		This file is used to reset the configuration of
+		a dcc driver to the default configuration.
+		Example:
+		echo  1 > /sys/bus/platform/devices/.../config_reset
+
+What:           /sys/bus/platform/devices/.../loop
+Date:		March 2021
+Contact:        Souradeep Chowdhury <[email protected]>
+Description:
+		This file is used to enter the loop count as dcc
+		driver gives the option to loop multiple times on
+		the same register and store the values for each
+		loop.This is done to capture the changing values
+		of a register with time which comes handy for
+		debugging purposes.
+		Example:
+		echo 10 > /sys/bus/platform/devices/10a2000.dcc/loop
+		(Setting the loop count to 10)
+		echo  0x80000010 10 > /sys/bus/platform/devices/.../config
+                (Read 10 words starting from address 0x80000010O)
+		echo 1 > /sys/bus/platform/devices/.../loop
+		(Terminate the loop by writing a count of 1 to the loop sysfs node)
+
+What:           /sys/bus/platform/devices/.../rd_mod_wr
+Date:           March 2021
+Contact:        Souradeep Chowdhury <[email protected]>
+Description:
+		This file is used to read the value of the register
+		and then write the value given as an argument to the
+		register address in config.The address argument should
+		be given of the form <mask> <value>.For debugging
+		purposes sometimes we need to first read from a register
+		and then set some values to the register.
+		Example:
+		echo 0x80000000 > /sys/bus/platform/devices/.../config
+		(Set the address in config file)
+		echo 0xF 0xA > /sys/bus/platform/devices/.../rd_mod_wr
+		(Provide the mask and the value to write)
+
+What:           /sys/bus/platform/devices/.../ready
+Date:           March 2021
+Contact:        Souradeep Chowdhury <[email protected]>
+Description:
+		This file is used to check the status of the dcc
+		hardware if it's ready to take the inputs.
+		Example:
+		cat /sys/bus/platform/devices/.../ready
+
+What:		/sys/bus/platform/devices/.../curr_list
+Date:		February 2021
+Contact:	Souradeep Chowdhury <[email protected]>
+Description:
+		This attribute is used to enter the linklist to be
+		used while appending addresses.The range of values
+		for this can be from 0 to 3.This feature is given in
+		order to use certain linkedlist for certain debugging
+		purposes.
+		Example:
+		echo 0 > /sys/bus/platform/devices/10a2000.dcc/curr_list
+

drivers/soc/qcom/Kconfig +8 -0

index 79b568f..5101912 100644
@@ -69,6 +69,14 @@ config QCOM_LLCC
 	  SDM845. This provides interfaces to clients that use the LLCC.
 	  Say yes here to enable LLCC slice driver.
 
+config QCOM_DCC
+	tristate "Qualcomm Technologies, Inc. Data Capture and Compare(DCC) engine driver"
+	depends on ARCH_QCOM || COMPILE_TEST
+	help
+	  This option enables driver for Data Capture and Compare engine. DCC
+	  driver provides interface to configure DCC block and read back
+	  captured data from DCC's internal SRAM.
+
 config QCOM_KRYO_L2_ACCESSORS
 	bool
 	depends on ARCH_QCOM && ARM64 || COMPILE_TEST

drivers/soc/qcom/Makefile +10 -9

index ad675a6..e7f0ccb 100644
@@ -1,19 +1,22 @@
 # SPDX-License-Identifier: GPL-2.0
 CFLAGS_rpmh-rsc.o := -I$(src)
 obj-$(CONFIG_QCOM_AOSS_QMP) +=	qcom_aoss.o
-obj-$(CONFIG_QCOM_GENI_SE) +=	qcom-geni-se.o
+obj-$(CONFIG_QCOM_APR) += apr.o
 obj-$(CONFIG_QCOM_COMMAND_DB) += cmd-db.o
 obj-$(CONFIG_QCOM_CPR)		+= cpr.o
+obj-$(CONFIG_QCOM_DCC) += dcc.o
+obj-$(CONFIG_QCOM_GENI_SE) +=   qcom-geni-se.o
 obj-$(CONFIG_QCOM_GSBI)	+=	qcom_gsbi.o
+obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) += kryo-l2-accessors.o
+obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
 obj-$(CONFIG_QCOM_MDT_LOADER)	+= mdt_loader.o
 obj-$(CONFIG_QCOM_OCMEM)	+= ocmem.o
 obj-$(CONFIG_QCOM_PDR_HELPERS)	+= pdr_interface.o
 obj-$(CONFIG_QCOM_QMI_HELPERS)	+= qmi_helpers.o
-qmi_helpers-y	+= qmi_encdec.o qmi_interface.o
 obj-$(CONFIG_QCOM_RMTFS_MEM)	+= rmtfs_mem.o
 obj-$(CONFIG_QCOM_RPMH)		+= qcom_rpmh.o
-qcom_rpmh-y			+= rpmh-rsc.o
-qcom_rpmh-y			+= rpmh.o
+obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
+obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o
 obj-$(CONFIG_QCOM_SMD_RPM)	+= smd-rpm.o
 obj-$(CONFIG_QCOM_SMEM) +=	smem.o
 obj-$(CONFIG_QCOM_SMEM_STATE) += smem_state.o

@@ -21,8 +24,6 @@ obj-$(CONFIG_QCOM_SMP2P)	+= smp2p.o
 obj-$(CONFIG_QCOM_SMSM)	+= smsm.o
 obj-$(CONFIG_QCOM_SOCINFO)	+= socinfo.o
 obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
-obj-$(CONFIG_QCOM_APR) += apr.o
-obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
-obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
-obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o
-obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) +=	kryo-l2-accessors.o
+qmi_helpers-y   += qmi_encdec.o qmi_interface.o
+qcom_rpmh-y                     += rpmh-rsc.o
+qcom_rpmh-y                     += rpmh.o

drivers/soc/qcom/dcc.c new file +1539 -0

1,539 lines not on this page · raw message

Signature · 2 lines

QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

Felipe Balbi

2021-04-15 06:31 UTC #3 lore raw

Re: [PATCH V3 2/4] soc: qcom: dcc:Add driver support for Data Capture and Compare unit(DCC)

Hi,

Quoted 33 lines · Souradeep Chowdhury

drivers/soc/qcom/Makefile +7 -4

index ad675a6..e7f0ccb 100644
@@ -1,19 +1,22 @@
 # SPDX-License-Identifier: GPL-2.0
 CFLAGS_rpmh-rsc.o := -I$(src)
 obj-$(CONFIG_QCOM_AOSS_QMP) +=	qcom_aoss.o
-obj-$(CONFIG_QCOM_GENI_SE) +=	qcom-geni-se.o
+obj-$(CONFIG_QCOM_APR) += apr.o
 obj-$(CONFIG_QCOM_COMMAND_DB) += cmd-db.o
 obj-$(CONFIG_QCOM_CPR)		+= cpr.o
+obj-$(CONFIG_QCOM_DCC) += dcc.o
+obj-$(CONFIG_QCOM_GENI_SE) +=   qcom-geni-se.o
 obj-$(CONFIG_QCOM_GSBI)	+=	qcom_gsbi.o
+obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) += kryo-l2-accessors.o
+obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
 obj-$(CONFIG_QCOM_MDT_LOADER)	+= mdt_loader.o
 obj-$(CONFIG_QCOM_OCMEM)	+= ocmem.o
 obj-$(CONFIG_QCOM_PDR_HELPERS)	+= pdr_interface.o
 obj-$(CONFIG_QCOM_QMI_HELPERS)	+= qmi_helpers.o
-qmi_helpers-y	+= qmi_encdec.o qmi_interface.o
 obj-$(CONFIG_QCOM_RMTFS_MEM)	+= rmtfs_mem.o
 obj-$(CONFIG_QCOM_RPMH)		+= qcom_rpmh.o
-qcom_rpmh-y			+= rpmh-rsc.o
-qcom_rpmh-y			+= rpmh.o
+obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
+obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o
 obj-$(CONFIG_QCOM_SMD_RPM)	+= smd-rpm.o
 obj-$(CONFIG_QCOM_SMEM) +=	smem.o
 obj-$(CONFIG_QCOM_SMEM_STATE) += smem_state.o

@@ -21,8 +24,6 @@ obj-$(CONFIG_QCOM_SMP2P)	+= smp2p.o
 obj-$(CONFIG_QCOM_SMSM)	+= smsm.o

drivers/soc/qcom/Makefile obj-$(CONFIG_QCOM_SMP2P) += smp2p.o · line 29

Quoted 10 lines

drivers/soc/qcom/Makefile +3 -5

 obj-$(CONFIG_QCOM_SOCINFO)	+= socinfo.o
 obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
-obj-$(CONFIG_QCOM_APR) += apr.o
-obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
-obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
-obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o
-obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) +=	kryo-l2-accessors.o
+qmi_helpers-y   += qmi_encdec.o qmi_interface.o
+qcom_rpmh-y                     += rpmh-rsc.o
+qcom_rpmh-y                     += rpmh.o

why so many changes?

Quoted 16 lines

drivers/soc/qcom/dcc.c new file +10 -0

new file mode 100644
index 0000000..fcd5580
@@ -0,0 +1,1539 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
+ */
+
+#include <linux/bitfield.h>
+#include <linux/bitops.h>
+#include <linux/cdev.h>
+#include <linux/delay.h>
+#include <linux/fs.h>

drivers/soc/qcom/dcc.c line 20

Quoted 10 lines

drivers/soc/qcom/dcc.c new file +10 -0

+#include <linux/io.h>
+#include <linux/iopoll.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+
+

one blank line is enough

drivers/soc/qcom/dcc.c line 29

Quoted 9 lines

drivers/soc/qcom/dcc.c new file +9 -0

+#define TIMEOUT_US		100
+
+#define dcc_writel(drvdata, val, off)					\
+	writel((val), drvdata->base + dcc_offset_conv(drvdata, off))
+#define dcc_readl(drvdata, off)						\
+	readl(drvdata->base + dcc_offset_conv(drvdata, off))
+
+#define dcc_sram_readl(drvdata, off)					\
+	readl(drvdata->ram_base + off)

this would be probably be better as static inlines.

Signature · 1 line

balbi

[email protected]

author

2021-04-19 10:32 UTC #4 lore raw

Re: [PATCH V3 2/4] soc: qcom: dcc:Add driver support for Data Capture and Compare unit(DCC)

Quoted 40 lines · Felipe Balbi

Hi,

Quoted 37 lines · Souradeep Chowdhury

drivers/soc/qcom/Makefile +7 -6

index ad675a6..e7f0ccb 100644
@@ -1,19 +1,22 @@
 # SPDX-License-Identifier: GPL-2.0
 CFLAGS_rpmh-rsc.o := -I$(src)
 obj-$(CONFIG_QCOM_AOSS_QMP) +=	qcom_aoss.o
-obj-$(CONFIG_QCOM_GENI_SE) +=	qcom-geni-se.o
+obj-$(CONFIG_QCOM_APR) += apr.o
 obj-$(CONFIG_QCOM_COMMAND_DB) += cmd-db.o
 obj-$(CONFIG_QCOM_CPR)		+= cpr.o
+obj-$(CONFIG_QCOM_DCC) += dcc.o
+obj-$(CONFIG_QCOM_GENI_SE) +=   qcom-geni-se.o
 obj-$(CONFIG_QCOM_GSBI)	+=	qcom_gsbi.o
+obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) += kryo-l2-accessors.o
+obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
 obj-$(CONFIG_QCOM_MDT_LOADER)	+= mdt_loader.o
 obj-$(CONFIG_QCOM_OCMEM)	+= ocmem.o
 obj-$(CONFIG_QCOM_PDR_HELPERS)	+= pdr_interface.o
 obj-$(CONFIG_QCOM_QMI_HELPERS)	+= qmi_helpers.o
-qmi_helpers-y	+= qmi_encdec.o qmi_interface.o
 obj-$(CONFIG_QCOM_RMTFS_MEM)	+= rmtfs_mem.o
 obj-$(CONFIG_QCOM_RPMH)		+= qcom_rpmh.o
-qcom_rpmh-y			+= rpmh-rsc.o
-qcom_rpmh-y			+= rpmh.o
+obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
+obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o
 obj-$(CONFIG_QCOM_SMD_RPM)	+= smd-rpm.o
 obj-$(CONFIG_QCOM_SMEM) +=	smem.o
 obj-$(CONFIG_QCOM_SMEM_STATE) += smem_state.o

@@ -21,8 +24,6 @@ obj-$(CONFIG_QCOM_SMP2P)	+= smp2p.o
 obj-$(CONFIG_QCOM_SMSM)	+= smsm.o
 obj-$(CONFIG_QCOM_SOCINFO)	+= socinfo.o
 obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
-obj-$(CONFIG_QCOM_APR) += apr.o
-obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o

Quoted 8 lines

drivers/soc/qcom/Makefile obj-$(CONFIG_QCOM_SMP2P) += smp2p.o · line 29
Quoted 6 lines
drivers/soc/qcom/Makefile +3 -3
-obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
-obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o
-obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) +=	kryo-l2-accessors.o
+qmi_helpers-y   += qmi_encdec.o qmi_interface.o
+qcom_rpmh-y                     += rpmh-rsc.o
+qcom_rpmh-y                     += rpmh.o
why so many changes?

This has been accidentally sorted based on the config names. Will be fixing this in next version of the patch.

Quoted 22 lines

drivers/soc/qcom/dcc.c new file +3 -0

new file mode 100644
index 0000000..fcd5580
@@ -0,0 +1,1539 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2015-2021, The Linux Foundation. All rights

reserved.
+ */

drivers/soc/qcom/dcc.c new file +10 -0

+
+#include <linux/bitfield.h>
+#include <linux/bitops.h>
+#include <linux/cdev.h>
+#include <linux/delay.h>
+#include <linux/fs.h>
+#include <linux/io.h>
+#include <linux/iopoll.h>
+#include <linux/module.h>
+#include <linux/of.h>

Quoted 8 lines

drivers/soc/qcom/dcc.c line 20
Quoted 6 lines
drivers/soc/qcom/dcc.c new file +6 -0
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+
+
one blank line is enough

Ack

Quoted 12 lines

drivers/soc/qcom/dcc.c line 29

Quoted 10 lines

drivers/soc/qcom/dcc.c new file +9 -0

+#define TIMEOUT_US		100
+
+#define dcc_writel(drvdata, val, off)					\
+	writel((val), drvdata->base + dcc_offset_conv(drvdata, off))
+#define dcc_readl(drvdata, off)						\
+	readl(drvdata->base + dcc_offset_conv(drvdata, off))
+
+#define dcc_sram_readl(drvdata, off)					\
+	readl(drvdata->ram_base + off)

this would be probably be better as static inlines.

These are simple read and write operations used in the driver which just calls the generic writel and readl function. That's why macros have been used here to lesson the overhead of an extra function call.

Bjorn Andersson

2021-04-19 14:32 UTC #5 lore raw

Re: [PATCH V3 2/4] soc: qcom: dcc:Add driver support for Data Capture and Compare unit(DCC)

Quoted 99 lines · On Mon 19 Apr 05:32 CDT 2021, [email protected] wrote:

Quoted 40 lines · Felipe Balbi

Hi,

Quoted 37 lines · Souradeep Chowdhury

drivers/soc/qcom/Makefile +7 -6

index ad675a6..e7f0ccb 100644
@@ -1,19 +1,22 @@
 # SPDX-License-Identifier: GPL-2.0
 CFLAGS_rpmh-rsc.o := -I$(src)
 obj-$(CONFIG_QCOM_AOSS_QMP) +=	qcom_aoss.o
-obj-$(CONFIG_QCOM_GENI_SE) +=	qcom-geni-se.o
+obj-$(CONFIG_QCOM_APR) += apr.o
 obj-$(CONFIG_QCOM_COMMAND_DB) += cmd-db.o
 obj-$(CONFIG_QCOM_CPR)		+= cpr.o
+obj-$(CONFIG_QCOM_DCC) += dcc.o
+obj-$(CONFIG_QCOM_GENI_SE) +=   qcom-geni-se.o
 obj-$(CONFIG_QCOM_GSBI)	+=	qcom_gsbi.o
+obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) += kryo-l2-accessors.o
+obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
 obj-$(CONFIG_QCOM_MDT_LOADER)	+= mdt_loader.o
 obj-$(CONFIG_QCOM_OCMEM)	+= ocmem.o
 obj-$(CONFIG_QCOM_PDR_HELPERS)	+= pdr_interface.o
 obj-$(CONFIG_QCOM_QMI_HELPERS)	+= qmi_helpers.o
-qmi_helpers-y	+= qmi_encdec.o qmi_interface.o
 obj-$(CONFIG_QCOM_RMTFS_MEM)	+= rmtfs_mem.o
 obj-$(CONFIG_QCOM_RPMH)		+= qcom_rpmh.o
-qcom_rpmh-y			+= rpmh-rsc.o
-qcom_rpmh-y			+= rpmh.o
+obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
+obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o
 obj-$(CONFIG_QCOM_SMD_RPM)	+= smd-rpm.o
 obj-$(CONFIG_QCOM_SMEM) +=	smem.o
 obj-$(CONFIG_QCOM_SMEM_STATE) += smem_state.o

@@ -21,8 +24,6 @@ obj-$(CONFIG_QCOM_SMP2P)	+= smp2p.o
 obj-$(CONFIG_QCOM_SMSM)	+= smsm.o
 obj-$(CONFIG_QCOM_SOCINFO)	+= socinfo.o
 obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
-obj-$(CONFIG_QCOM_APR) += apr.o
-obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o

Quoted 8 lines

drivers/soc/qcom/Makefile obj-$(CONFIG_QCOM_SMP2P) += smp2p.o · line 29
Quoted 6 lines
drivers/soc/qcom/Makefile +3 -3
-obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
-obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o
-obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) +=	kryo-l2-accessors.o
+qmi_helpers-y   += qmi_encdec.o qmi_interface.o
+qcom_rpmh-y                     += rpmh-rsc.o
+qcom_rpmh-y                     += rpmh.o
why so many changes?

This has been accidentally sorted based on the config names. Will be fixing this in next version of the patch.

Quoted 22 lines

drivers/soc/qcom/dcc.c new file +3 -0

new file mode 100644
index 0000000..fcd5580
@@ -0,0 +1,1539 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2015-2021, The Linux Foundation. All rights

reserved.
+ */

drivers/soc/qcom/dcc.c new file +10 -0

+
+#include <linux/bitfield.h>
+#include <linux/bitops.h>
+#include <linux/cdev.h>
+#include <linux/delay.h>
+#include <linux/fs.h>
+#include <linux/io.h>
+#include <linux/iopoll.h>
+#include <linux/module.h>
+#include <linux/of.h>

Quoted 8 lines

drivers/soc/qcom/dcc.c line 20
Quoted 6 lines
drivers/soc/qcom/dcc.c new file +6 -0
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+
+
one blank line is enough

Ack

Quoted 12 lines

drivers/soc/qcom/dcc.c line 29

Quoted 10 lines

drivers/soc/qcom/dcc.c new file +9 -0

+#define TIMEOUT_US		100
+
+#define dcc_writel(drvdata, val, off)					\
+	writel((val), drvdata->base + dcc_offset_conv(drvdata, off))
+#define dcc_readl(drvdata, off)						\
+	readl(drvdata->base + dcc_offset_conv(drvdata, off))
+
+#define dcc_sram_readl(drvdata, off)					\
+	readl(drvdata->ram_base + off)

this would be probably be better as static inlines.

Quoted 4 lines

These are simple read and write operations used in the driver which just calls the generic writel and readl function. That's why macros have been used here to lesson the overhead of an extra function call.

The compiler will realize that your static dcc_sram_readl() is cheaper to inline than call and do so for you. So you can expect that there's no difference in the output from the compiler, and if there is then the compiler knows something that you're overlooking.

Regards,
Bjorn

[email protected]

author

2021-04-20 06:36 UTC #6 lore raw

Re: [PATCH V3 2/4] soc: qcom: dcc:Add driver support for Data Capture and Compare unit(DCC)

Quoted 106 lines · Bjorn Andersson

Quoted 99 lines · On Mon 19 Apr 05:32 CDT 2021, [email protected] wrote:

Quoted 40 lines · Felipe Balbi

Hi,

Quoted 37 lines · Souradeep Chowdhury

drivers/soc/qcom/Makefile +7 -6

index ad675a6..e7f0ccb 100644
@@ -1,19 +1,22 @@
 # SPDX-License-Identifier: GPL-2.0
 CFLAGS_rpmh-rsc.o := -I$(src)
 obj-$(CONFIG_QCOM_AOSS_QMP) +=	qcom_aoss.o
-obj-$(CONFIG_QCOM_GENI_SE) +=	qcom-geni-se.o
+obj-$(CONFIG_QCOM_APR) += apr.o
 obj-$(CONFIG_QCOM_COMMAND_DB) += cmd-db.o
 obj-$(CONFIG_QCOM_CPR)		+= cpr.o
+obj-$(CONFIG_QCOM_DCC) += dcc.o
+obj-$(CONFIG_QCOM_GENI_SE) +=   qcom-geni-se.o
 obj-$(CONFIG_QCOM_GSBI)	+=	qcom_gsbi.o
+obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) += kryo-l2-accessors.o
+obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
 obj-$(CONFIG_QCOM_MDT_LOADER)	+= mdt_loader.o
 obj-$(CONFIG_QCOM_OCMEM)	+= ocmem.o
 obj-$(CONFIG_QCOM_PDR_HELPERS)	+= pdr_interface.o
 obj-$(CONFIG_QCOM_QMI_HELPERS)	+= qmi_helpers.o
-qmi_helpers-y	+= qmi_encdec.o qmi_interface.o
 obj-$(CONFIG_QCOM_RMTFS_MEM)	+= rmtfs_mem.o
 obj-$(CONFIG_QCOM_RPMH)		+= qcom_rpmh.o
-qcom_rpmh-y			+= rpmh-rsc.o
-qcom_rpmh-y			+= rpmh.o
+obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
+obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o
 obj-$(CONFIG_QCOM_SMD_RPM)	+= smd-rpm.o
 obj-$(CONFIG_QCOM_SMEM) +=	smem.o
 obj-$(CONFIG_QCOM_SMEM_STATE) += smem_state.o

@@ -21,8 +24,6 @@ obj-$(CONFIG_QCOM_SMP2P)	+= smp2p.o
 obj-$(CONFIG_QCOM_SMSM)	+= smsm.o
 obj-$(CONFIG_QCOM_SOCINFO)	+= socinfo.o
 obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
-obj-$(CONFIG_QCOM_APR) += apr.o
-obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o

Quoted 8 lines

drivers/soc/qcom/Makefile obj-$(CONFIG_QCOM_SMP2P) += smp2p.o · line 29
Quoted 6 lines
drivers/soc/qcom/Makefile +3 -3
-obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
-obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o
-obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) +=	kryo-l2-accessors.o
+qmi_helpers-y   += qmi_encdec.o qmi_interface.o
+qcom_rpmh-y                     += rpmh-rsc.o
+qcom_rpmh-y                     += rpmh.o
why so many changes?

This has been accidentally sorted based on the config names. Will be fixing this in next version of the patch.

Quoted 22 lines

drivers/soc/qcom/dcc.c new file +3 -0

new file mode 100644
index 0000000..fcd5580
@@ -0,0 +1,1539 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2015-2021, The Linux Foundation. All rights

reserved.
+ */

drivers/soc/qcom/dcc.c new file +10 -0

+
+#include <linux/bitfield.h>
+#include <linux/bitops.h>
+#include <linux/cdev.h>
+#include <linux/delay.h>
+#include <linux/fs.h>
+#include <linux/io.h>
+#include <linux/iopoll.h>
+#include <linux/module.h>
+#include <linux/of.h>

Quoted 8 lines

drivers/soc/qcom/dcc.c line 20
Quoted 6 lines
drivers/soc/qcom/dcc.c new file +6 -0
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+
+
one blank line is enough

Ack

Quoted 12 lines

drivers/soc/qcom/dcc.c line 29

Quoted 10 lines

drivers/soc/qcom/dcc.c new file +9 -0

+#define TIMEOUT_US		100
+
+#define dcc_writel(drvdata, val, off)					\
+	writel((val), drvdata->base + dcc_offset_conv(drvdata, off))
+#define dcc_readl(drvdata, off)						\
+	readl(drvdata->base + dcc_offset_conv(drvdata, off))
+
+#define dcc_sram_readl(drvdata, off)					\
+	readl(drvdata->ram_base + off)

this would be probably be better as static inlines.

Quoted 4 lines

These are simple read and write operations used in the driver which just calls the generic writel and readl function. That's why macros have been used here to lesson the overhead of an extra function call.

Quoted 4 lines

The compiler will realize that your static dcc_sram_readl() is cheaper to inline than call and do so for you. So you can expect that there's no difference in the output from the compiler, and if there is then the compiler knows something that you're overlooking.

Ack. Will go for static inline here.

Quoted 3 lines

Regards,
Bjorn

Souradeep Chowdhury

author

2021-04-14 08:38 UTC #7 lore raw

PATCH v3 3/4 MAINTAINERS: Add the entry for DCC(Data Capture and Compare) driver support

In reply to Souradeep Chowdhury

Added the entries for all the files added as a part of driver support for DCC(Data Capture and Compare).

Signed-off-by Souradeep Chowdhury <[email protected]>

---
 MAINTAINERS | 8 ++++++++
 1 file changed, 8 insertions(+)

MAINTAINERS +8 -0

index d92f85c..fb28218 100644
@@ -4969,6 +4969,14 @@ F:	include/linux/tfrc.h
 F:	include/uapi/linux/dccp.h
 F:	net/dccp/
 
+QTI DCC DRIVER
+M:	Souradeep Chowdhury <[email protected]>
+L:	[email protected]
+S:	Maintained
+F:	Documentation/ABI/testing/sysfs-driver-dcc
+F:	Documentation/devicetree/bindings/arm/msm/qcom,dcc.yaml
+F:	drivers/soc/qcom/dcc.c
+
 DECnet NETWORK LAYER
 L:	[email protected]
 S:	Orphan

Signature · 2 lines

QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

Souradeep Chowdhury

author

2021-04-14 08:40 UTC #8 lore raw

PATCH v3 4/4 arm64: dts: qcom: sm8150: Add Data Capture and Compare(DCC) support node

In reply to Souradeep Chowdhury

Add the DCC(Data Capture and Compare) device tree node entry along with the addresses for register regions.

Signed-off-by Souradeep Chowdhury <[email protected]>

---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

arch/arm64/boot/dts/qcom/sm8150.dtsi +6 -0

index e5bb17b..7d4bb28 100644
@@ -654,6 +654,12 @@
 			interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		dma@10a2000 {
+			compatible = "qcom,sm8150-dcc", "qcom,dcc";
+			reg = <0x0 0x010a2000 0x0 0x1000>,
+			      <0x0 0x010ad000 0x0 0x3000>;
+		};
+
 		ufs_mem_hc: ufshc@1d84000 {
 			compatible = "qcom,sm8150-ufshc", "qcom,ufshc",
 				     "jedec,ufs-2.0";

Signature · 2 lines

QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation