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Migrate PXA27x platforms to clock framework

PATCH Superseded Robert Jarzmik 4 participants 14 messages Jul 14, 2014 – Dec 26, 2014

Subsystems (5)

v2 of 3 Superseded Latest is v3 →

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Robert Jarzmik

author maintainer
#0 lore raw

v2 cover Migrate PXA27x platforms to clock framework

This is the second opus of this serie.

Quoted 1 line

From the previous one, the approach was changed as Mike and Haojian asked :

- the device-tree description shrunk to almost nothing
- the device-tree driver is common amongst all PXA variants
- a common clk-pxa.c is (will be) used amongst all PXA variants

As before, the goal remains the same :
- keeping legacy platforms working (ie. without device-tree)
- enable PXA27x to work with a device-tree kernel, and hence open the way to drivers conversion
- be robust enough to support pxa25x and pxa3xx later inclusion with almost no change to clk-pxa-dt.c.

Robert Jarzmik (6):
clk: add pxa clocks infrastructure
clk: dts: document pxa clock binding
arm: pxa: add clock pll selection bits
clk: add pxa27x clock drivers
dts: add devicetree bindings for pxa27x clocks
arm: pxa: Transition pxa27x to clk framework

 .../devicetree/bindings/clock/pxa-clock.txt        |  16 +
 arch/arm/Kconfig                                   |   1 +
 arch/arm/boot/dts/pxa27x.dtsi                      |  20 +-
 arch/arm/mach-pxa/Makefile                         |   8 +-
 arch/arm/mach-pxa/include/mach/pxa2xx-regs.h       |  10 +
 arch/arm/mach-pxa/pxa27x.c                         | 186 +----------
 drivers/clk/Makefile                               |   1 +
 drivers/clk/pxa/Makefile                           |   2 +
 drivers/clk/pxa/clk-pxa.c                          |  97 ++++++
 drivers/clk/pxa/clk-pxa.h                          | 107 ++++++
 drivers/clk/pxa/clk-pxa27x.c                       | 370 +++++++++++++++++++++
 include/dt-bindings/clock/pxa-clock.h              |  77 +++++
 12 files changed, 716 insertions(+), 179 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/pxa-clock.txt
 create mode 100644 drivers/clk/pxa/Makefile
 create mode 100644 drivers/clk/pxa/clk-pxa.c
 create mode 100644 drivers/clk/pxa/clk-pxa.h
 create mode 100644 drivers/clk/pxa/clk-pxa27x.c
 create mode 100644 include/dt-bindings/clock/pxa-clock.h
Signature · 1 line
2.0.0.rc2
author maintainer
#1 lore raw

PATCH v2 1/6 clk: add pxa clocks infrastructure

Add a the common code used by all PXA variants.

This is the first step in the transition from architecture defined clocks (in arch/arm/mach-pxa) towards clock framework. The goal is to have the same features (and not all the features) of the existing clocks, and enable the transition of PXA to device-tree.

All PXA rely on a "CKEN" type clock, which :
- has a gate (bit in CKEN register)
- is generated from a PLL, generally divided
- has an alternate low power clock

Each variant will specialize the CKEN clock :
- pxa25x have no low power clock
- pxa27x in low power use always the 13 MHz ring oscillator
- pxa3xx in low power have specific dividers for each clock

The device-tree provides a list of CLK_* (ex: CLK_USB or CLK_I2C) to get a handle on the clock. While pxa-clock.h will describe all the clocks of all the variants, each variant will only use a subset of it.

---
 drivers/clk/Makefile                  |   1 +
 drivers/clk/pxa/Makefile              |   1 +
 drivers/clk/pxa/clk-pxa.c             |  97 ++++++++++++++++++++++++++++++
 drivers/clk/pxa/clk-pxa.h             | 107 ++++++++++++++++++++++++++++++++++
 include/dt-bindings/clock/pxa-clock.h |  77 ++++++++++++++++++++++++
 5 files changed, 283 insertions(+)
 create mode 100644 drivers/clk/pxa/Makefile
 create mode 100644 drivers/clk/pxa/clk-pxa.c
 create mode 100644 drivers/clk/pxa/clk-pxa.h
 create mode 100644 include/dt-bindings/clock/pxa-clock.h
drivers/clk/Makefile +1 -0
index 567f102..40390ea 100644
@@ -43,6 +43,7 @@ obj-$(CONFIG_ARCH_MMP)			+= mmp/
 endif
 obj-$(CONFIG_PLAT_ORION)		+= mvebu/
 obj-$(CONFIG_ARCH_MXS)			+= mxs/
+obj-$(CONFIG_ARCH_PXA)			+= pxa/
 obj-$(CONFIG_COMMON_CLK_QCOM)		+= qcom/
 obj-$(CONFIG_ARCH_ROCKCHIP)		+= rockchip/
 obj-$(CONFIG_COMMON_CLK_SAMSUNG)	+= samsung/
drivers/clk/pxa/Makefile new file +1 -0
new file mode 100644
index 0000000..cb2bd8f
@@ -0,0 +1 @@
+obj-y				+= clk-pxa.o
drivers/clk/pxa/clk-pxa.c new file +97 -0

97 lines not on this page · raw message

drivers/clk/pxa/clk-pxa.h new file +107 -0

107 lines not on this page · raw message

include/dt-bindings/clock/pxa-clock.h new file +77 -0

77 lines not on this page · raw message

Signature · 1 line
2.0.0.rc2
author maintainer
#2 lore raw

PATCH v2 2/6 clk: dts: document pxa clock binding

In reply to Robert Jarzmik

Document the device-tree binding of Marvell PXA based SoCs. PXA clocks are mostly fixed rate and fixed ratio clocks derived from an external oscillator, and gated by a register set (CKEN or CKEN*).

---
 Documentation/devicetree/bindings/clock/pxa-clock.txt | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/pxa-clock.txt
Documentation/devicetree/bindings/clock/pxa-clock.txt new file +16 -0
new file mode 100644
index 0000000..4b4a902
@@ -0,0 +1,16 @@
+* Clock bindings for Marvell PXA chips
+
+Required properties:
+- compatible: Should be "marvell,pxa-clocks"
+- #clock-cells: Should be <1>
+
+The clock consumer should specify the desired clock by having the clock
+ID in its "clocks" phandle cell (see include/.../pxa-clock.h).
+
+Examples:
+
+pxa2xx_clks: pxa2xx_clks at 41300004 {
+        compatible = "marvell,pxa-clocks";
+        #clock-cells = <1>;
+        status = "okay";
+};
Signature · 1 line
2.0.0.rc2
author maintainer
#3 lore raw

PATCH v2 3/6 arm: pxa: add clock pll selection bits

In reply to Robert Jarzmik

Add missing bits for CCCR and CCSR :
- CPLL and PPLL selection, either full speed or 13MHz
- CPSR masks

---
 arch/arm/mach-pxa/include/mach/pxa2xx-regs.h | 10 ++++++++++
 1 file changed, 10 insertions(+)
arch/arm/mach-pxa/include/mach/pxa2xx-regs.h +10 -0
index ee6ced1..f1dd629 100644
@@ -143,6 +143,16 @@
 #define CCCR_M_MASK	0x0060	/* Memory Frequency to Run Mode Frequency Multiplier */
 #define CCCR_L_MASK	0x001f	/* Crystal Frequency to Memory Frequency Multiplier */
 
+#define CCCR_CPDIS_BIT	(31)
+#define CCCR_PPDIS_BIT	(30)
+#define CCCR_LCD_26_BIT	(27)
+#define CCCR_A_BIT	(25)
+
+#define CCSR_N2_MASK	CCCR_N_MASK
+#define CCSR_M_MASK	CCCR_M_MASK
+#define CCSR_L_MASK	CCCR_L_MASK
+#define CCSR_N2_SHIFT	7
+
 #define CKEN_AC97CONF   (31)    /* AC97 Controller Configuration */
 #define CKEN_CAMERA	(24)	/* Camera Interface Clock Enable */
 #define CKEN_SSP1	(23)	/* SSP1 Unit Clock Enable */
Signature · 1 line
2.0.0.rc2
author maintainer
#4 lore raw

PATCH v2 4/6 clk: add pxa27x clock drivers

In reply to Robert Jarzmik

Move pxa27x clock drivers from arch/arm/mach-pxa to driver/clk. In the move :
- convert to new clock framework legacy clocks
- provide clocks as before for platform data based boards
- provide clocks through devicetree

---
 drivers/clk/pxa/Makefile     |   1 +
 drivers/clk/pxa/clk-pxa27x.c | 370 +++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 371 insertions(+)
 create mode 100644 drivers/clk/pxa/clk-pxa27x.c
drivers/clk/pxa/Makefile +1 -0
index cb2bd8f..4ff2abc 100644
@@ -1 +1,2 @@
 obj-y				+= clk-pxa.o
+obj-$(CONFIG_PXA27x)		+= clk-pxa27x.o
drivers/clk/pxa/clk-pxa27x.c new file +370 -0

370 lines not on this page · raw message

Signature · 1 line
2.0.0.rc2
author maintainer
#5 lore raw

PATCH v2 5/6 dts: add devicetree bindings for pxa27x clocks

In reply to Robert Jarzmik

Add the clock tree description for the PXA27x based boards.

---
 arch/arm/boot/dts/pxa27x.dtsi | 20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)
arch/arm/boot/dts/pxa27x.dtsi +19 -1
index a705469..80fc5d7 100644
@@ -1,5 +1,6 @@
 /* The pxa3xx skeleton simply augments the 2xx version */
-/include/ "pxa2xx.dtsi"
+#include "pxa2xx.dtsi"
+#include "dt-bindings/clock/pxa2xx-clock.h"
 
 / {
 	model = "Marvell PXA27x familiy SoC";
@@ -35,4 +36,21 @@
 			#pwm-cells = <1>;
 		};
 	};
+
+	clocks {
+	       /*
+		* The muxing of external clocks/internal dividers for osc* clock
+		* sources has been hidden under the carpet by now.
+		*/
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		pxa2xx_clks: pxa2xx_clks at 41300004 {
+			compatible = "marvell,pxa-clocks";
+			#clock-cells = <1>;
+			status = "okay";
+		};
+	};
+
 };
Signature · 1 line
2.0.0.rc2
author maintainer
#6 lore raw

PATCH v2 6/6 arm: pxa: Transition pxa27x to clk framework

In reply to Robert Jarzmik

Transition the PXA27x CPUs to the clock framework.
This transition still enables legacy platforms to run without device tree as before, ie relying on platform data encoded in board specific files.

---
 arch/arm/Kconfig           |   1 +
 arch/arm/mach-pxa/Makefile |   8 +-
 arch/arm/mach-pxa/pxa27x.c | 186 +++------------------------------------------
 3 files changed, 17 insertions(+), 178 deletions(-)
arch/arm/Kconfig +1 -0
index 87b63fd..96bdc7b 100644
@@ -642,6 +642,7 @@ config ARCH_PXA
 	select ARCH_REQUIRE_GPIOLIB
 	select ARM_CPU_SUSPEND if PM
 	select AUTO_ZRELADDR
+	select COMMON_CLK if PXA27x
 	select CLKDEV_LOOKUP
 	select CLKSRC_MMIO
 	select GENERIC_CLOCKEVENTS
arch/arm/mach-pxa/Makefile +4 -4
index 648867a..ce15823 100644
@@ -3,16 +3,16 @@
 #
 
 # Common support (must be linked before board specific support)
-obj-y				+= clock.o devices.o generic.o irq.o \
+obj-y				+= devices.o generic.o irq.o \
 				   time.o reset.o
 obj-$(CONFIG_PM)		+= pm.o sleep.o standby.o
 
 # Generic drivers that other drivers may depend upon
 
 # SoC-specific code
-obj-$(CONFIG_PXA25x)		+= mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o
-obj-$(CONFIG_PXA27x)		+= mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o
-obj-$(CONFIG_PXA3xx)		+= mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o
+obj-$(CONFIG_PXA25x)		+= mfp-pxa2xx.o clock.o clock-pxa2xx.o pxa2xx.o pxa25x.o
+obj-$(CONFIG_PXA27x)		+= mfp-pxa2xx.o pxa2xx.o pxa27x.o
+obj-$(CONFIG_PXA3xx)		+= mfp-pxa3xx.o clock.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o
 obj-$(CONFIG_CPU_PXA300)	+= pxa300.o
 obj-$(CONFIG_CPU_PXA320)	+= pxa320.o
 obj-$(CONFIG_CPU_PXA930)	+= pxa930.o
arch/arm/mach-pxa/pxa27x.c +12 -174

211 lines not on this page · raw message

Signature · 1 line
2.0.0.rc2
#7 lore raw

PATCH v2 6/6 arm: pxa: Transition pxa27x to clk framework

Hi Robert,

What happened to this patch ? It looks like the rest of the series got merged, but this one seems to be missing.

Quoted 31 lines · On Monday 14 July 2014 17:54:23 Robert Jarzmik wrote:

Transition the PXA27x CPUs to the clock framework.
This transition still enables legacy platforms to run without device tree as before, ie relying on platform data encoded in board specific files.

---
 arch/arm/Kconfig           |   1 +
 arch/arm/mach-pxa/Makefile |   8 +-
 arch/arm/mach-pxa/pxa27x.c | 186 +++---------------------------------------
 3 files changed, 17 insertions(+), 178 deletions(-)
arch/arm/Kconfig +1 -0
index 87b63fd..96bdc7b 100644
@@ -642,6 +642,7 @@ config ARCH_PXA
 	select ARCH_REQUIRE_GPIOLIB
 	select ARM_CPU_SUSPEND if PM
 	select AUTO_ZRELADDR
+	select COMMON_CLK if PXA27x
 	select CLKDEV_LOOKUP
 	select CLKSRC_MMIO
 	select GENERIC_CLOCKEVENTS
arch/arm/mach-pxa/Makefile +0 -0
index 648867a..ce15823 100644
@@ -3,16 +3,16 @@
 #
 

arch/arm/mach-pxa/Makefile line 13

Quoted 10 lines
arch/arm/mach-pxa/Makefile +1 -2
 # Common support (must be linked before board specific support)
-obj-y				+= clock.o devices.o generic.o irq.o \
+obj-y				+= devices.o generic.o irq.o \
 				   time.o reset.o
 obj-$(CONFIG_PM)		+= pm.o sleep.o standby.o
 
 # Generic drivers that other drivers may depend upon
 
 # SoC-specific code
-obj-$(CONFIG_PXA25x)		+= mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o 

pxa25x.o

arch/arm/mach-pxa/Makefile line 14

Quoted 1 line
arch/arm/mach-pxa/Makefile +0 -1
-obj-$(CONFIG_PXA27x)		+= mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o 

pxa27x.o

Quoted 2 lines
arch/arm/mach-pxa/Makefile +0 -1
-obj-$(CONFIG_PXA3xx)		+= mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o

pxa3xx-ulpi.o +obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o clock.o clock-

pxa2xx.o

Quoted 49 lines

pxa2xx.o pxa25x.o +obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o pxa2xx.o pxa27x.o
+obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o clock.o clock-pxa3xx.o pxa3xx.o
smemc.o pxa3xx-ulpi.o obj-$(CONFIG_CPU_PXA300) += pxa300.o
obj-$(CONFIG_CPU_PXA320) += pxa320.o
obj-$(CONFIG_CPU_PXA930) += pxa930.o

arch/arm/mach-pxa/pxa27x.c +2 -27
index 301471a..6beb32cd 100644
@@ -37,7 +37,8 @@
 
 #include "generic.h"
 #include "devices.h"
-#include "clock.h"
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
 
 void pxa27x_clear_otgph(void)
 {
@@ -73,174 +74,6 @@ void pxa27x_configure_ac97reset(int reset_gpio, bool
 to_gpio) }
 EXPORT_SYMBOL_GPL(pxa27x_configure_ac97reset);
 
-/* Crystal clock: 13MHz */
-#define BASE_CLK	13000000
-
-/*
- * Get the clock frequency as reflected by CCSR and the turbo flag.
- * We assume these values have been applied via a fcs.
- * If info is not 0 we also display the current settings.
- */
-unsigned int pxa27x_get_clk_frequency_khz(int info)
-{
-	unsigned long ccsr, clkcfg;
-	unsigned int l, L, m, M, n2, N, S;
-       	int cccr_a, t, ht, b;
-
-	ccsr = CCSR;
-	cccr_a = CCCR & (1 << 25);
-
-	/* Read clkcfg register: it has turbo, b, half-turbo (and f) */
-	asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );
-	t  = clkcfg & (1 << 0);
-	ht = clkcfg & (1 << 2);
-	b  = clkcfg & (1 << 3);
-
-	l  = ccsr & 0x1f;
-	n2 = (ccsr>>7) & 0xf;
-	m  = (l <= 10) ? 1 : (l <= 20) ? 2 : 4;

arch/arm/mach-pxa/pxa27x.c void pxa27x_configure_ac97reset(int reset_gpio, bool · line 111

Quoted 10 lines
arch/arm/mach-pxa/pxa27x.c +0 -10
-
-	L  = l * BASE_CLK;
-	N  = (L * n2) / 2;
-	M  = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
-	S  = (b) ? L : (L/2);
-
-	if (info) {
-		printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
-			L / 1000000, (L % 1000000) / 10000, l );
-		printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, 

%sactive)\n",

Quoted 165 lines
arch/arm/mach-pxa/pxa27x.c +10 -137
-			N / 1000000, (N % 1000000)/10000, n2 / 2, (n2 % 2)*5,
-			(t) ? "" : "in" );
-		printk( KERN_INFO "Memory clock: %d.%02dMHz (/%d)\n",
-			M / 1000000, (M % 1000000) / 10000, m );
-		printk( KERN_INFO "System bus clock: %d.%02dMHz \n",
-			S / 1000000, (S % 1000000) / 10000 );
-	}
-
-	return (t) ? (N/1000) : (L/1000);
-}
-
-/*
- * Return the current mem clock frequency as reflected by CCCR[A], B, and L
- */
-static unsigned long clk_pxa27x_mem_getrate(struct clk *clk)
-{
-	unsigned long ccsr, clkcfg;
-	unsigned int l, L, m, M;
-       	int cccr_a, b;
-
-	ccsr = CCSR;
-	cccr_a = CCCR & (1 << 25);
-
-	/* Read clkcfg register: it has turbo, b, half-turbo (and f) */
-	asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );
-	b = clkcfg & (1 << 3);
-
-	l = ccsr & 0x1f;
-	m = (l <= 10) ? 1 : (l <= 20) ? 2 : 4;
-
-	L = l * BASE_CLK;
-	M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
-
-	return M;
-}
-
-static const struct clkops clk_pxa27x_mem_ops = {
-	.enable		= clk_dummy_enable,
-	.disable	= clk_dummy_disable,
-	.getrate	= clk_pxa27x_mem_getrate,
-};
-
-/*
- * Return the current LCD clock frequency in units of 10kHz as
- */
-static unsigned int pxa27x_get_lcdclk_frequency_10khz(void)
-{
-	unsigned long ccsr;
-	unsigned int l, L, k, K;
-
-	ccsr = CCSR;
-
-	l = ccsr & 0x1f;
-	k = (l <= 7) ? 1 : (l <= 16) ? 2 : 4;
-
-	L = l * BASE_CLK;
-	K = L / k;
-
-	return (K / 10000);
-}
-
-static unsigned long clk_pxa27x_lcd_getrate(struct clk *clk)
-{
-	return pxa27x_get_lcdclk_frequency_10khz() * 10000;
-}
-
-static const struct clkops clk_pxa27x_lcd_ops = {
-	.enable		= clk_pxa2xx_cken_enable,
-	.disable	= clk_pxa2xx_cken_disable,
-	.getrate	= clk_pxa27x_lcd_getrate,
-};
-
-static DEFINE_PXA2_CKEN(pxa27x_ffuart, FFUART, 14857000, 1);
-static DEFINE_PXA2_CKEN(pxa27x_btuart, BTUART, 14857000, 1);
-static DEFINE_PXA2_CKEN(pxa27x_stuart, STUART, 14857000, 1);
-static DEFINE_PXA2_CKEN(pxa27x_i2s, I2S, 14682000, 0);
-static DEFINE_PXA2_CKEN(pxa27x_i2c, I2C, 32842000, 0);
-static DEFINE_PXA2_CKEN(pxa27x_usb, USB, 48000000, 5);
-static DEFINE_PXA2_CKEN(pxa27x_mmc, MMC, 19500000, 0);
-static DEFINE_PXA2_CKEN(pxa27x_ficp, FICP, 48000000, 0);
-static DEFINE_PXA2_CKEN(pxa27x_usbhost, USBHOST, 48000000, 0);
-static DEFINE_PXA2_CKEN(pxa27x_pwri2c, PWRI2C, 13000000, 0);
-static DEFINE_PXA2_CKEN(pxa27x_keypad, KEYPAD, 32768, 0);
-static DEFINE_PXA2_CKEN(pxa27x_ssp1, SSP1, 13000000, 0);
-static DEFINE_PXA2_CKEN(pxa27x_ssp2, SSP2, 13000000, 0);
-static DEFINE_PXA2_CKEN(pxa27x_ssp3, SSP3, 13000000, 0);
-static DEFINE_PXA2_CKEN(pxa27x_pwm0, PWM0, 13000000, 0);
-static DEFINE_PXA2_CKEN(pxa27x_pwm1, PWM1, 13000000, 0);
-static DEFINE_PXA2_CKEN(pxa27x_ac97, AC97, 24576000, 0);
-static DEFINE_PXA2_CKEN(pxa27x_ac97conf, AC97CONF, 24576000, 0);
-static DEFINE_PXA2_CKEN(pxa27x_msl, MSL, 48000000, 0);
-static DEFINE_PXA2_CKEN(pxa27x_usim, USIM, 48000000, 0);
-static DEFINE_PXA2_CKEN(pxa27x_memstk, MEMSTK, 19500000, 0);
-static DEFINE_PXA2_CKEN(pxa27x_im, IM, 0, 0);
-static DEFINE_PXA2_CKEN(pxa27x_memc, MEMC, 0, 0);
-
-static DEFINE_CK(pxa27x_lcd, LCD, &clk_pxa27x_lcd_ops);
-static DEFINE_CK(pxa27x_camera, CAMERA, &clk_pxa27x_lcd_ops);
-static DEFINE_CLK(pxa27x_mem, &clk_pxa27x_mem_ops, 0, 0);
-
-static struct clk_lookup pxa27x_clkregs[] = {
-	INIT_CLKREG(&clk_pxa27x_lcd, "pxa2xx-fb", NULL),
-	INIT_CLKREG(&clk_pxa27x_camera, "pxa27x-camera.0", NULL),
-	INIT_CLKREG(&clk_pxa27x_ffuart, "pxa2xx-uart.0", NULL),
-	INIT_CLKREG(&clk_pxa27x_btuart, "pxa2xx-uart.1", NULL),
-	INIT_CLKREG(&clk_pxa27x_stuart, "pxa2xx-uart.2", NULL),
-	INIT_CLKREG(&clk_pxa27x_i2s, "pxa2xx-i2s", NULL),
-	INIT_CLKREG(&clk_pxa27x_i2c, "pxa2xx-i2c.0", NULL),
-	INIT_CLKREG(&clk_pxa27x_usb, "pxa27x-udc", NULL),
-	INIT_CLKREG(&clk_pxa27x_mmc, "pxa2xx-mci.0", NULL),
-	INIT_CLKREG(&clk_pxa27x_stuart, "pxa2xx-ir", "UARTCLK"),
-	INIT_CLKREG(&clk_pxa27x_ficp, "pxa2xx-ir", "FICPCLK"),
-	INIT_CLKREG(&clk_pxa27x_usbhost, "pxa27x-ohci", NULL),
-	INIT_CLKREG(&clk_pxa27x_pwri2c, "pxa2xx-i2c.1", NULL),
-	INIT_CLKREG(&clk_pxa27x_keypad, "pxa27x-keypad", NULL),
-	INIT_CLKREG(&clk_pxa27x_ssp1, "pxa27x-ssp.0", NULL),
-	INIT_CLKREG(&clk_pxa27x_ssp2, "pxa27x-ssp.1", NULL),
-	INIT_CLKREG(&clk_pxa27x_ssp3, "pxa27x-ssp.2", NULL),
-	INIT_CLKREG(&clk_pxa27x_pwm0, "pxa27x-pwm.0", NULL),
-	INIT_CLKREG(&clk_pxa27x_pwm1, "pxa27x-pwm.1", NULL),
-	INIT_CLKREG(&clk_pxa27x_ac97, NULL, "AC97CLK"),
-	INIT_CLKREG(&clk_pxa27x_ac97conf, NULL, "AC97CONFCLK"),
-	INIT_CLKREG(&clk_pxa27x_msl, NULL, "MSLCLK"),
-	INIT_CLKREG(&clk_pxa27x_usim, NULL, "USIMCLK"),
-	INIT_CLKREG(&clk_pxa27x_memstk, NULL, "MSTKCLK"),
-	INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
-	INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
-	INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
-	INIT_CLKREG(&clk_dummy, "pxa27x-gpio", NULL),
-	INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
-};
-
 #ifdef CONFIG_PM
 
 #define SAVE(x)		sleep_save[SLEEP_SAVE_##x] = x
@@ -460,8 +293,6 @@ static int __init pxa27x_init(void)
 
 		reset_status = RCSR;
 
-		clkdev_add_table(pxa27x_clkregs, ARRAY_SIZE(pxa27x_clkregs));
-
 		if ((ret = pxa_init_dma(IRQ_DMA, 32)))
 			return ret;
 
@@ -469,10 +300,17 @@ static int __init pxa27x_init(void)
 
 		register_syscore_ops(&pxa_irq_syscore_ops);
 		register_syscore_ops(&pxa2xx_mfp_syscore_ops);
-		register_syscore_ops(&pxa2xx_clock_syscore_ops);
 
-		pxa_register_device(&pxa27x_device_gpio, &pxa27x_gpio_info);
-		ret = platform_add_devices(devices, ARRAY_SIZE(devices));
+		if (!of_have_populated_dt()) {
+			ret = clk_register_clkdev(NULL, NULL,
+						  "pxa27x-gpio");
+			if (!ret)
+				pxa_register_device(&pxa27x_device_gpio,
+						    &pxa27x_gpio_info);
+			if (!ret)
+				ret = platform_add_devices(devices,
+							   ARRAY_SIZE(devices));
+		}
 	}
 
 	return ret;
Signature · 3 lines
Regards,

Laurent Pinchart
author maintainer
#8 lore raw

PATCH v2 6/6 arm: pxa: Transition pxa27x to clk framework

Quoted 4 lines · Laurent Pinchart

Hi Robert,

What happened to this patch ? It looks like the rest of the series got merged, but this one seems to be missing.

It got reverted, because there were 3 boards with a defconfig which required that both pxa27x and pxa25x were ported to common clock framework. As at that time I had not ported pxa25x, I had to revert this one.

But now the situation is brighter. pxa25x was ported, tested, and merged by Mike..Linus, so I can enable again common clock framework for both pxa27x and pxa25x.

Actually it's good you make me think of it, as I've had the "pxa25x + pxa27x common clocks enabler" patch in my local development tree for some time but I didn't post it.

I'll post if for review this weekend I think.

Cheers.

--
Robert

#10 lore raw

v2 cover Migrate PXA27x platforms to clock framework

Quoting Robert Jarzmik (2014-07-21 11:23:51)

Quoted 5 lines
Quoted 1 line · Robert Jarzmik

This is the second opus of this serie.

Ping ?

Hi Robert,

Overall the series looks good to me. The only problem I see is that somewhere in the use of the PARENTS() macro there is a section mismatch introduced. I spent about 5 minutes looking at it and gave up. This problem introduces 26 section mismatch warnings building colibri_pxa270_defconfig.

Once those are fixed up then I will be happy to take this series. Do you want me to take all six patches through the clk tree, including the arm/arm stuff?

Regards,
Mike

Quoted 3 lines

--
Robert

author maintainer
#11 lore raw

v2 cover Migrate PXA27x platforms to clock framework

Quoted 7 lines · Mike Turquette

Quoting Robert Jarzmik (2014-07-21 11:23:51)

Quoted 5 lines
Quoted 1 line · Robert Jarzmik

This is the second opus of this serie.

Ping ?

Quoted 7 lines

Hi Robert,

Overall the series looks good to me. The only problem I see is that somewhere in the use of the PARENTS() macro there is a section mismatch introduced. I spent about 5 minutes looking at it and gave up. This problem introduces 26 section mismatch warnings building colibri_pxa270_defconfig.

OK Mike, I'll fix this. This is probably because pxa27x_clocks array is not __init, and it references parents which are __init. I was lazy letting pxa27x_clocks not __init because I reuse the internal fields "hw" and "gate->hw" later (hence I didn't leave the __init).
This is a bit dirty and I'll launder it.

Moreover, I have one fix which I had fixed wrt boot ordering : the postcore_init() must die. The reason behind is that I have no guarantee of ordering between clocks init and clocksource init, and clocksource relies on clocks.

The right way will be AFAIK to call the core clocks init :
- within the device-tree initialization function : pxa27x_dt_clocks_init() calls pxa27x_clocks_init9)
- directly from pxa27x_init() or pxa_timer_init() in non-device tree setup

Quoted 3 lines

Once those are fixed up then I will be happy to take this series. Do you want me to take all six patches through the clk tree, including the arm/arm stuff?

I would feel more comfortable if :
- you take the 4 first ones (3 clock ones + 1 arm pxa header bit definitions)
- Haojian takes the last 2 ones (pxa ones)

I will check that taking only the first 4 ones doesn't break anything, in case there is a merge window hipcup.

Cheers.

Signature · 1 line
Robert
#12 lore raw

v2 cover Migrate PXA27x platforms to clock framework

Quoting Robert Jarzmik (2014-07-26 01:52:49)

Quoted 35 lines
Quoted 7 lines · Mike Turquette

Quoting Robert Jarzmik (2014-07-21 11:23:51)

Quoted 5 lines
Quoted 1 line · Robert Jarzmik

This is the second opus of this serie.

Ping ?

Quoted 7 lines

Hi Robert,

Overall the series looks good to me. The only problem I see is that somewhere in the use of the PARENTS() macro there is a section mismatch introduced. I spent about 5 minutes looking at it and gave up. This problem introduces 26 section mismatch warnings building colibri_pxa270_defconfig.

OK Mike, I'll fix this. This is probably because pxa27x_clocks array is not __init, and it references parents which are __init. I was lazy letting pxa27x_clocks not __init because I reuse the internal fields "hw" and "gate->hw" later (hence I didn't leave the __init).
This is a bit dirty and I'll launder it.

Moreover, I have one fix which I had fixed wrt boot ordering : the postcore_init() must die. The reason behind is that I have no guarantee of ordering between clocks init and clocksource init, and clocksource relies on clocks.

The right way will be AFAIK to call the core clocks init :
- within the device-tree initialization function : pxa27x_dt_clocks_init() calls pxa27x_clocks_init9)
- directly from pxa27x_init() or pxa_timer_init() in non-device tree setup

Quoted 3 lines

Once those are fixed up then I will be happy to take this series. Do you want me to take all six patches through the clk tree, including the arm/arm stuff?

Quoted 6 lines

I would feel more comfortable if :
- you take the 4 first ones (3 clock ones + 1 arm pxa header bit definitions)
- Haojian takes the last 2 ones (pxa ones)

I will check that taking only the first 4 ones doesn't break anything, in case there is a merge window hipcup.

Sounds good.

Regards,
Mike

Quoted 5 lines

Cheers.

Signature · 1 line
Robert
maintainer
#13 lore raw

v2 cover Migrate PXA27x platforms to clock framework

In reply to Robert Jarzmik
Quoted 32 lines · Robert Jarzmik
Quoted 7 lines · Mike Turquette

Quoting Robert Jarzmik (2014-07-21 11:23:51)

Quoted 5 lines
Quoted 1 line · Robert Jarzmik

This is the second opus of this serie.

Ping ?

Quoted 7 lines

Hi Robert,

Overall the series looks good to me. The only problem I see is that somewhere in the use of the PARENTS() macro there is a section mismatch introduced. I spent about 5 minutes looking at it and gave up. This problem introduces 26 section mismatch warnings building colibri_pxa270_defconfig.

OK Mike, I'll fix this. This is probably because pxa27x_clocks array is not __init, and it references parents which are __init. I was lazy letting pxa27x_clocks not __init because I reuse the internal fields "hw" and "gate->hw" later (hence I didn't leave the __init).
This is a bit dirty and I'll launder it.

Moreover, I have one fix which I had fixed wrt boot ordering : the postcore_init() must die. The reason behind is that I have no guarantee of ordering between clocks init and clocksource init, and clocksource relies on clocks.

The right way will be AFAIK to call the core clocks init :
- within the device-tree initialization function : pxa27x_dt_clocks_init() calls pxa27x_clocks_init9)
- directly from pxa27x_init() or pxa_timer_init() in non-device tree setup

Quoted 7 lines
Quoted 3 lines

Once those are fixed up then I will be happy to take this series. Do you want me to take all six patches through the clk tree, including the arm/arm stuff?

I would feel more comfortable if :
- you take the 4 first ones (3 clock ones + 1 arm pxa header bit definitions)
- Haojian takes the last 2 ones (pxa ones)

I prefer that all these patches could go through clock tree. I just want to avoid
build issue.

Regards
Haojian