Add initial high speed support to USB code.

index 9be86b8..03282f6 100644
@@ -276,7 +276,8 @@ void usb_show_tree_graph(struct usb_device *dev,char *pre)
 	pre[index++]= has_child ? '|' : ' ';
 	pre[index]=0;
 	printf(" %s (%s, %dmA)\n",usb_get_class_desc(dev->config.if_desc[0].bInterfaceClass),
-		dev->slow ? "1.5MBit/s" : "12MBit/s",dev->config.MaxPower * 2);
+		(dev->speed == USB_SPEED_LOW) ? "1.5MBit/s" : (dev->speed == USB_SPEED_FULL)
+		? "12MBit/s" : "480MBit/s", dev->config.MaxPower * 2);
 	if (strlen(dev->mf) ||
 	   strlen(dev->prod) ||
 	   strlen(dev->serial))

index a0107dc..44f35bc 100644
@@ -793,6 +793,11 @@ int usb_new_device(struct usb_device *dev)
 		case 16: dev->maxpacketsize = 1; break;
 		case 32: dev->maxpacketsize = 2; break;
 		case 64: dev->maxpacketsize = 3; break;
+		case 512: dev->maxpacketsize = 6; break;
+		default:
+			printf("XXX bMaxPacketSize0 unsupported (%u)\n",
+			    dev->descriptor.bMaxPacketSize0);
+			break;
 	}
 	dev->devnum = addr;
 

@@ -981,8 +986,10 @@ static int hub_port_reset(struct usb_device *dev, int port,
 		}
 		portstatus = le16_to_cpu(portsts.wPortStatus);
 		portchange = le16_to_cpu(portsts.wPortChange);
-		USB_HUB_PRINTF("portstatus %x, change %x, %s\n", portstatus ,portchange,
-			portstatus&(1<<USB_PORT_FEAT_LOWSPEED) ? "Low Speed" : "High Speed");
+		USB_HUB_PRINTF("portstatus %x, change %x, %s Speed\n", portstatus ,portchange,
+			portstatus&(1<<USB_PORT_FEAT_LOWSPEED) ? "Low" :
+			portstatus&(1<<USB_PORT_FEAT_HIGHSPEED) ?  "High" :
+			"Full");
 		USB_HUB_PRINTF("STAT_C_CONNECTION = %d STAT_CONNECTION = %d  USB_PORT_STAT_ENABLE %d\n",
 			(portchange & USB_PORT_STAT_C_CONNECTION) ? 1 : 0,
 			(portstatus & USB_PORT_STAT_CONNECTION) ? 1 : 0,

@@ -1026,8 +1033,10 @@ void usb_hub_port_connect_change(struct usb_device *dev, int port)
 
 	portstatus = le16_to_cpu(portsts.wPortStatus);
 	portchange = le16_to_cpu(portsts.wPortChange);
-	USB_HUB_PRINTF("portstatus %x, change %x, %s\n", portstatus, portchange,
-		portstatus&(1<<USB_PORT_FEAT_LOWSPEED) ? "Low Speed" : "High Speed");
+	USB_HUB_PRINTF("portstatus %x, change %x, %s Speed\n", portstatus, portchange,
+		portstatus&(1<<USB_PORT_FEAT_LOWSPEED) ? "Low" :
+		portstatus&(1<<USB_PORT_FEAT_HIGHSPEED) ?  "High" :
+		"Full");
 
 	/* Clear the connection change status */
 	usb_clear_port_feature(dev, port + 1, USB_PORT_FEAT_C_CONNECTION);

@@ -1052,10 +1061,21 @@ void usb_hub_port_connect_change(struct usb_device *dev, int port)
 
 	/* Allocate a new device struct for it */
 	usb=usb_alloc_new_device();
-	usb->slow = (portstatus & USB_PORT_STAT_LOW_SPEED) ? 1 : 0;
+	switch (portstatus & USB_PORT_STAT_SPEED) {
+	case 0:
+		usb->speed = USB_SPEED_FULL;
+		break;
+	case USB_PORT_STAT_LOW_SPEED:
+		usb->speed = USB_SPEED_LOW;
+		break;
+	case USB_PORT_STAT_HIGH_SPEED:
+		usb->speed = USB_SPEED_HIGH;
+		break;
+	}
 
 	dev->children[port] = usb;
 	usb->parent=dev;
+	usb->portnr = port + 1;
 	/* Run it through the hoops (find a driver, etc) */
 	if (usb_new_device(usb)) {
 		/* Woops, disable the port */

index 5a6ffdd..410f9cf 100644
@@ -132,7 +132,7 @@ struct usb_config_descriptor {
 
 struct usb_device {
 	int devnum;			/* Device number on USB bus */
-	int slow;			/* Slow device? */
+	int speed;			/* full/low/high */
 	char mf[32];			/* manufacturer */
 	char prod[32];			/* product */
 	char serial[32];		/* serial number */

@@ -161,6 +161,7 @@ struct usb_device {
 	unsigned long status;
 	int act_len;			/* transfered bytes */
 	int maxchild;			/* Number of ports if hub */
+	int portnr;
 	struct usb_device *parent;
 	struct usb_device *children[USB_MAXCHILDREN];
 };

@@ -171,7 +172,7 @@ struct usb_device {
 
 #if defined(CONFIG_USB_UHCI) || defined(CONFIG_USB_OHCI) || \
 	defined(CONFIG_USB_OHCI_NEW) || defined (CONFIG_USB_SL811HS) || \
-	defined(CONFIG_USB_ISP116X_HCD)
+	defined(CONFIG_USB_ISP116X_HCD) || defined (CONFIG_USB_EHCI)
 
 int usb_lowlevel_init(void);
 int usb_lowlevel_stop(void);

@@ -264,7 +265,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
  *  - endpoint number (4 bits)
  *  - current Data0/1 state (1 bit)
  *  - direction (1 bit)
- *  - speed (1 bit)
+ *  - speed (2 bits)
  *  - max packet size (2 bits: 8, 16, 32 or 64)
  *  - pipe type (2 bits: control, interrupt, bulk, isochronous)
  *

@@ -280,7 +281,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
  *  - device:		bits 8-14
  *  - endpoint:		bits 15-18
  *  - Data0/1:		bit 19
- *  - speed:		bit 26		(0 = Full, 1 = Low Speed)
+ *  - speed:		bits 26-27	(0 = Full, 1 = Low, 2 = High)
  *  - pipe type:	bits 30-31	(00 = isochronous, 01 = interrupt, 10 = control, 11 = bulk)
  *
  * Why? Because it's arbitrary, and whatever encoding we select is really

@@ -290,8 +291,8 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
  */
 /* Create various pipes... */
 #define create_pipe(dev,endpoint) \
-		(((dev)->devnum << 8) | (endpoint << 15) | ((dev)->slow << 26) | (dev)->maxpacketsize)
-#define default_pipe(dev) ((dev)->slow <<26)
+		(((dev)->devnum << 8) | (endpoint << 15) | ((dev)->speed << 26) | (dev)->maxpacketsize)
+#define default_pipe(dev) ((dev)->speed << 26)
 
 #define usb_sndctrlpipe(dev,endpoint)	((PIPE_CONTROL << 30) | create_pipe(dev,endpoint))
 #define usb_rcvctrlpipe(dev,endpoint)	((PIPE_CONTROL << 30) | create_pipe(dev,endpoint) | USB_DIR_IN)

@@ -323,7 +324,8 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate);
 #define usb_pipe_endpdev(pipe)	(((pipe) >> 8) & 0x7ff)
 #define usb_pipeendpoint(pipe)	(((pipe) >> 15) & 0xf)
 #define usb_pipedata(pipe)	(((pipe) >> 19) & 1)
-#define usb_pipeslow(pipe)	(((pipe) >> 26) & 1)
+#define usb_pipespeed(pipe)	(((pipe) >> 26) & 3)
+#define usb_pipeslow(pipe)	(usb_pipespeed(pipe) == USB_SPEED_LOW)
 #define usb_pipetype(pipe)	(((pipe) >> 30) & 3)
 #define usb_pipeisoc(pipe)	(usb_pipetype((pipe)) == PIPE_ISOCHRONOUS)
 #define usb_pipeint(pipe)	(usb_pipetype((pipe)) == PIPE_INTERRUPT)

index 353019f..8032e57 100644
@@ -80,6 +80,12 @@
 #define USB_DIR_OUT           0
 #define USB_DIR_IN            0x80
 
+/* USB device speeds */
+#define USB_SPEED_FULL		0x0	/* 12Mbps */
+#define USB_SPEED_LOW		0x1	/* 1.5Mbps */
+#define USB_SPEED_HIGH		0x2	/* 480Mbps */
+#define USB_SPEED_RESERVED	0x3
+
 /* Descriptor types */
 #define USB_DT_DEVICE        0x01
 #define USB_DT_CONFIG        0x02

@@ -202,6 +208,7 @@
 #define USB_PORT_FEAT_RESET          4
 #define USB_PORT_FEAT_POWER          8
 #define USB_PORT_FEAT_LOWSPEED       9
+#define USB_PORT_FEAT_HIGHSPEED      10
 #define USB_PORT_FEAT_C_CONNECTION   16
 #define USB_PORT_FEAT_C_ENABLE       17
 #define USB_PORT_FEAT_C_SUSPEND      18

@@ -216,6 +223,9 @@
 #define USB_PORT_STAT_RESET         0x0010
 #define USB_PORT_STAT_POWER         0x0100
 #define USB_PORT_STAT_LOW_SPEED     0x0200
+#define USB_PORT_STAT_HIGH_SPEED    0x0400	/* support for EHCI */
+#define USB_PORT_STAT_SPEED	\
+	(USB_PORT_STAT_LOW_SPEED | USB_PORT_STAT_HIGH_SPEED)
 
 /* wPortChange bits */
 #define USB_PORT_STAT_C_CONNECTION  0x0001

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new file mode 100644
index 0000000..88e91b9
@@ -0,0 +1,29 @@
+/*-
+ * Copyright (c) 2007-2008, Juniper Networks, Inc.
+ * Copyright (c) 2008, Excito Elektronik i Sk?ne AB
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef USB_EHCI_CORE_H
+#define USB_EHCI_CORE_H
+
+extern int rootdev;
+extern struct ehci_hccr *hccr;
+extern volatile struct ehci_hcor *hcor;
+
+#endif

new file mode 100644
index 0000000..6c03773
@@ -0,0 +1,99 @@
+/*
+ * (C) Copyright 2008, Excito Elektronik i Sk?ne AB
+ *
+ * Author: Tor Krill tor at excito.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <pci.h>
+#include <usb.h>
+#include <mpc83xx.h>
+#include <asm/io.h>
+#include <asm/bitops.h>
+
+#include "usb_ehci.h"
+#include "usb_ehci_fsl.h"
+#include "usb_ehci_core.h"
+
+/*
+ * Create the appropriate control structures to manage
+ * a new EHCI host controller.
+ *
+ * Excerpts from linux ehci fsl driver.
+ */
+int ehci_hcd_init (void)
+{
+	volatile immap_t *im = (immap_t *) CFG_IMMR;
+	uint32_t addr, temp;
+
+	addr = (uint32_t) & (im->usb[0]);
+	hccr = (struct ehci_hccr *)(addr + FSL_SKIP_PCI);
+	hcor = (struct ehci_hcor *)((uint32_t) hccr + hccr->cr_caplength);
+
+	/* Configure clock */
+	clrsetbits_be32 (&(im->clk.sccr), MPC83XX_SCCR_USB_MASK,
+			 MPC83XX_SCCR_USB_DRCM_11);
+
+	/* Confgure interface. */
+	temp = in_be32 ((void *)(addr + FSL_SOC_USB_CTRL));
+	out_be32 ((void *)(addr + FSL_SOC_USB_CTRL), temp
+		  | REFSEL_16MHZ | UTMI_PHY_EN);
+
+	/* Wait for clock to stabilize */
+	do {
+		temp = in_be32 ((void *)(addr + FSL_SOC_USB_CTRL));
+		udelay (1000);
+	} while (!(temp & PHY_CLK_VALID));
+
+	/* Set to Host mode */
+	temp = in_le32 ((void *)(addr + FSL_SOC_USB_USBMODE));
+	out_le32 ((void *)(addr + FSL_SOC_USB_USBMODE), temp | CM_HOST);
+
+	out_be32 ((void *)(addr + FSL_SOC_USB_SNOOP1), SNOOP_SIZE_2GB);
+	out_be32 ((void *)(addr + FSL_SOC_USB_SNOOP2),
+		  0x80000000 | SNOOP_SIZE_2GB);
+
+	/* Init phy */
+	/* TODO: handle different phys? */
+	out_le32 (&(hcor->or_portsc[0]), PORT_PTS_UTMI);
+
+	/* Enable interface. */
+	temp = in_be32 ((void *)(addr + FSL_SOC_USB_CTRL));
+	out_be32 ((void *)(addr + FSL_SOC_USB_CTRL), temp | USB_EN);
+
+	out_be32 ((void *)(addr + FSL_SOC_USB_PRICTRL), 0x0000000c);
+	out_be32 ((void *)(addr + FSL_SOC_USB_AGECNTTHRSH), 0x00000040);
+	out_be32 ((void *)(addr + FSL_SOC_USB_SICTRL), 0x00000001);
+
+	/* Enable interface. */
+	temp = in_be32 ((void *)(addr + FSL_SOC_USB_CTRL));
+	out_be32 ((void *)(addr + FSL_SOC_USB_CTRL), temp | USB_EN);
+
+	temp = in_le32 ((void *)(addr + FSL_SOC_USB_USBMODE));
+
+	return 0;
+}
+
+/*
+ * Destroy the appropriate control structures corresponding
+ * the the EHCI host controller.
+ */
+int ehci_hcd_stop (void)
+{
+	return 0;
+}

82 lines not on this page · raw message

new file mode 100644
index 0000000..d652122
@@ -0,0 +1,135 @@
+/*-
+ * Copyright (c) 2007-2008, Juniper Networks, Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <pci.h>
+#include <usb.h>
+#include "usb_ehci.h"
+#include "usb_ehci_pci.h"
+#include "usb_ehci_core.h"
+
+#ifdef EHCI_DEBUG
+static void dump_pci_reg (pci_dev_t dev, int ofs)
+{
+	uint32_t reg;
+
+	pci_read_config_dword (dev, ofs, &reg);
+	printf ("\t0x%02x: %08x\n", ofs, reg);
+}
+
+static void dump_pci (int enh, pci_dev_t dev)
+{
+	int ofs;
+
+	debug ("\n%s", (enh) ? "EHCI" : "OHCI");
+	for (ofs = 0; ofs < 0x44; ofs += 4)
+		dump_pci_reg (dev, ofs);
+	if (enh)
+		dump_pci_reg (dev, 0x60);
+	dump_pci_reg (dev, 0xdc);
+	dump_pci_reg (dev, 0xe0);
+	if (enh) {
+		dump_pci_reg (dev, 0xe4);
+		dump_pci_reg (dev, 0xe8);
+	}
+}
+
+static void dump_regs (void)
+{
+
+	debug ("usbcmd=%#x, usbsts=%#x, usbintr=%#x,\n\tfrindex=%#x, "
+	       "ctrldssegment=%#x, periodiclistbase=%#x,\n\tasynclistaddr=%#x, "
+	       "configflag=%#x,\n\tportsc[1]=%#x, portsc[2]=%#x, systune=%#x",
+	       swap_32 (hcor->or_usbcmd), swap_32 (hcor->or_usbsts),
+	       swap_32 (hcor->or_usbintr), swap_32 (hcor->or_frindex),
+	       swap_32 (hcor->or_ctrldssegment),
+	       swap_32 (hcor->or_periodiclistbase),
+	       swap_32 (hcor->or_asynclistaddr), swap_32 (hcor->or_configflag),
+	       swap_32 (hcor->or_portsc[0]), swap_32 (hcor->or_portsc[1]),
+	       swap_32 (hcor->or_systune));
+}
+
+static void dump_TD (struct qTD *td)
+{
+
+	debug ("%p: qt_next=%#x, qt_altnext=%#x, qt_token=%#x, "
+	       "qt_buffer={%#x,%#x,%#x,%#x,%#x}", td, swap_32 (td->qt_next),
+	       swap_32 (td->qt_altnext), swap_32 (td->qt_token),
+	       swap_32 (td->qt_buffer[0]), swap_32 (td->qt_buffer[1]),
+	       swap_32 (td->qt_buffer[2]), swap_32 (td->qt_buffer[3]),
+	       swap_32 (td->qt_buffer[4]));
+}
+
+static void dump_QH (struct QH *qh)
+{
+
+	debug ("%p: qh_link=%#x, qh_endpt1=%#x, qh_endpt2=%#x, qh_curtd=%#x",
+	       qh, swap_32 (qh->qh_link), swap_32 (qh->qh_endpt1),
+	       swap_32 (qh->qh_endpt2), swap_32 (qh->qh_curtd));
+	dump_TD (&qh->qh_overlay);
+}
+#endif
+
+/*
+ * Create the appropriate control structures to manage
+ * a new EHCI host controller.
+ */
+int ehci_hcd_init (void)
+{
+	pci_dev_t dev;
+	uint32_t addr;
+
+	dev = pci_find_device (0x1131, 0x1561, 0);
+	if (dev != -1) {
+		volatile uint32_t *hcreg;
+
+		pci_read_config_dword (dev, PCI_BASE_ADDRESS_0, &addr);
+		hcreg = (uint32_t *) (addr + 8);
+		*hcreg = swap_32 (1);
+		udelay (100);
+	}
+
+	dev = pci_find_device (0x1131, 0x1562, 0);
+	if (dev == -1) {
+		printf ("EHCI host controller not found\n");
+		return (-1);
+	}
+
+	pci_read_config_dword (dev, EHCI_PCICS_USBBASE, &addr);
+	hccr = (void *)addr;
+
+	addr += hccr->cr_caplength;
+	hcor = (void *)addr;
+
+	/* Latte/Espresso USB hardware bug workaround */
+	hcor->or_systune |= swap_32 (3);
+
+	return (0);
+}
+
+/*
+ * Destroy the appropriate control structures corresponding
+ * the the EHCI host controller.
+ */
+int ehci_hcd_stop (void)
+{
+
+	return (0);
+}

new file mode 100644
index 0000000..6a4d16e
@@ -0,0 +1,37 @@
+/*-
+ * Copyright (c) 2007-2008, Juniper Networks, Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * PCI Configuration Space.
+ */
+#define	EHCI_PCICS_BASEC		PCI_CLASS_CODE
+#define	EHCI_PCICS_SCC			PCI_CLASS_SUB_CODE
+#define	EHCI_PCICS_PI			PCI_CLASS_PROG
+#define	EHCI_PCICS_USBBASE		PCI_BASE_ADDRESS_0
+#define	EHCI_PCICS_SBRN			0x60
+#define	EHCI_PCICS_FLADJ		0x61
+#define	EHCI_PCICS_PORTWAKECAP		0x62
+
+#define	EHCI_PCICS_USBLEGSUP
+#define	EHCI_PCICS_USBLEGCTLSTS
+
+#define	EHCI_PCI_BASEC			0x0c	/* Serial Bus Controller. */
+#define	EHCI_PCI_SCC			0x03	/* USB Host Controller. */
+#define	EHCI_PCI_PI			0x20	/* USB 2.0 Host Controller. */