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ath10k: Fix DMA burst size

PATCH Applied Sujith Manoharan 3 participants 6 messages Dec 29, 2014 – Jan 12, 2015 Qualcomm Atheros ATH10K wireless driver

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Sujith Manoharan

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#0 lore raw

PATCH 1/1 ath10k: Fix DMA burst size

From: Sujith Manoharan <[email protected]>

A value of zero indicates that 128B is the maximum DMA request size for read/writes. But PCI cards based on AR9880 can support 256B, so enable this for the 10.2 firmware.

Signed-off-by Sujith Manoharan <[email protected]>
---
 drivers/net/wireless/ath/ath10k/hw.h  | 3 +++
 drivers/net/wireless/ath/ath10k/wmi.c | 2 +-
 2 files changed, 4 insertions(+), 1 deletion(-)
drivers/net/wireless/ath/ath10k/hw.h +3 -0
index 5729901..7b771ae 100644
@@ -183,6 +183,9 @@ struct ath10k_pktlog_hdr {
 #define TARGET_10X_NUM_MSDU_DESC		(1024 + 400)
 #define TARGET_10X_MAX_FRAG_ENTRIES		0
 
+/* 10.2 parameters */
+#define TARGET_10_2_DMA_BURST_SIZE		1
+
 /* Target specific defines for WMI-TLV firmware */
 #define TARGET_TLV_NUM_VDEVS			3
 #define TARGET_TLV_NUM_STATIONS			32
drivers/net/wireless/ath/ath10k/wmi.c +1 -1
index ac74290..b103122 100644
@@ -3744,7 +3744,7 @@ static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
 	config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
 	config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
 	config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
-	config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
+	config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
 	config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
 
 	val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
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2.2.1
#1 lore raw
Quoted 8 lines · Sujith Manoharan

From: Sujith Manoharan <[email protected]>

A value of zero indicates that 128B is the maximum DMA request size for read/writes. But PCI cards based on AR9880 can support 256B, so enable this for the 10.2 firmware.

Signed-off-by Sujith Manoharan <[email protected]>

Did you see any throughput improvements with this?

Signature · 1 line
Kalle Valo
#2 lore raw
In reply to Sujith Manoharan
Quoted 6 lines · Sujith Manoharan

From: Sujith Manoharan <[email protected]>

A value of zero indicates that 128B is the maximum DMA request size for read/writes. But PCI cards based on AR9880 can support 256B, so enable this for the 10.2 firmware.

Since it's for cards/chips why do you enable it for 10.2 only? There's 10.1, main and tlv as well which could possibly benefit from this.

Michał

author
#3 lore raw
Quoted 2 lines · Michal Kazior

Since it's for cards/chips why do you enable it for 10.2 only? There's 10.1, main and tlv as well which could possibly benefit from this.

I've not tested it with any of the FW versions other than 10.2 and am not sure if older FW support this properly. We could try it with 10.1, I guess - but even that is in 'maintenance mode' internally.

Sujith

#4 lore raw
Quoted 8 lines · Sujith Manoharan
Quoted 2 lines · Michal Kazior

Since it's for cards/chips why do you enable it for 10.2 only? There's 10.1, main and tlv as well which could possibly benefit from this.

I've not tested it with any of the FW versions other than 10.2 and am not sure if older FW support this properly. We could try it with 10.1, I guess - but even that is in 'maintenance mode' internally.

Yeah, I don't see much point of trying to improve our 10.1 support as all the new development happens on 10.2 branch. Most important is that we don't break 10.1 support ("no regressions" rule), but it in no way does 10.1 need to be in feature parity with 10.2.

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Kalle Valo