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document unused pte bits on i386

PATCH In review Ed L Cashin 1 participant 2 messages Aug 7, 2003

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PATCH 1/1 document unused pte bits on i386

Hi. This small patch documents that bits 9, 10, and 11 are unused by the Linux kernel. The IA-32 Intel Architecture Software Developer's Manual says that these bits are available for programmer use.

I checked and couldn't see any use of these bits in the Linux kernel. If I'm wrong and these bits *are* being used by the linux kernel, a comment in include/asm-i386/pgtable.h would be helpful. If they are not, this patch confirms for developers that the kernel isn't using these bits.

include/asm-i386/pgtable.h renamed from include/asm-i386/pgtable.h~ +3 -0
@@ -118,6 +118,9 @@
 #define _PAGE_DIRTY	0x040
 #define _PAGE_PSE	0x080	/* 4 MB (or 2MB) page, Pentium+, if present.. */
 #define _PAGE_GLOBAL	0x100	/* Global TLB entry PPro+ */
+#define _PAGE_UNUSED1	0x200	/* available for programmer */
+#define _PAGE_UNUSED2	0x400
+#define _PAGE_UNUSED3	0x800
 
 #define _PAGE_FILE	0x040	/* set:pagecache unset:swap */
 #define _PAGE_PROTNONE	0x080	/* If not present */
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--Ed L Cashin            |   PGP public key:
  [email protected]        |   http://noserose.net/e/pgp/
#1 lore raw
Quoted 9 lines · Ed L Cashin

Hi. This small patch documents that bits 9, 10, and 11 are unused by the Linux kernel. The IA-32 Intel Architecture Software Developer's Manual says that these bits are available for programmer use.

I checked and couldn't see any use of these bits in the Linux kernel. If I'm wrong and these bits *are* being used by the linux kernel, a comment in include/asm-i386/pgtable.h would be helpful. If they are not, this patch confirms for developers that the kernel isn't using these bits.

For consistency, there should be the analogous _PAGE_BIT_XXX macros, too, so here's a replacement patch that has those.

include/asm-i386/pgtable.h renamed from include/asm-i386/pgtable.h~ +6 -0
@@ -108,6 +108,9 @@
 #define _PAGE_BIT_DIRTY		6
 #define _PAGE_BIT_PSE		7	/* 4 MB (or 2MB) page, Pentium+, if present.. */
 #define _PAGE_BIT_GLOBAL	8	/* Global TLB entry PPro+ */
+#define _PAGE_BIT_UNUSED1	9	/* available for programmer */
+#define _PAGE_BIT_UNUSED2	10
+#define _PAGE_BIT_UNUSED3	11
 
 #define _PAGE_PRESENT	0x001
 #define _PAGE_RW	0x002
@@ -118,6 +121,9 @@
 #define _PAGE_DIRTY	0x040
 #define _PAGE_PSE	0x080	/* 4 MB (or 2MB) page, Pentium+, if present.. */
 #define _PAGE_GLOBAL	0x100	/* Global TLB entry PPro+ */
+#define _PAGE_UNUSED1	0x200	/* available for programmer */
+#define _PAGE_UNUSED2	0x400
+#define _PAGE_UNUSED3	0x800
 
 #define _PAGE_FILE	0x040	/* set:pagecache unset:swap */
 #define _PAGE_PROTNONE	0x080	/* If not present */
Signature · 2 lines
--Ed L Cashin            |   PGP public key:
  [email protected]        |   http://noserose.net/e/pgp/